diff --git a/drivers/pci/controller/dwc/Kconfig b/drivers/pci/controller/dwc/Kconfig
index a9f528f1d842..ed736f841610 100644
--- a/drivers/pci/controller/dwc/Kconfig
+++ b/drivers/pci/controller/dwc/Kconfig
@@ -97,13 +97,6 @@ config PCIE_RK_THREADED_INIT
 	help
 	  Enables threaded initialize Rockchip DW based PCIe controller.
 
-config PCIE_DW_DMATEST
-	bool "DesignWare PCIe DMA test"
-	depends on PCIE_DW_ROCKCHIP
-	depends on !ROCKCHIP_PCIE_DMA_OBJ
-	help
-	  Enables support for the DW PCIe controller DMA test.
-
 config PCIE_DW_ROCKCHIP_EP
 	bool "Rockchip DesignWare PCIe EP controller"
 	select PCIE_DW
@@ -112,6 +105,19 @@ config PCIE_DW_ROCKCHIP_EP
 	help
 	  Enables support for the DW PCIe controller in the Rockchip SoC.
 
+config PCIE_DW_DMATEST
+	bool "DesignWare PCIe DMA test"
+	depends on (PCIE_DW_ROCKCHIP || PCIE_DW_ROCKCHIP_EP || PCIE_FUNC_RKEP)
+	depends on !ROCKCHIP_PCIE_DMA_OBJ
+	help
+	  Enables support for the DW PCIe controller DMA test.
+
+config PCIE_DW_ROCKCHIP_RC_DMATEST
+	bool "DesignWare PCIe Rockchip RC Enable DMA test"
+	depends on PCIE_DW_DMATEST
+	help
+	  Enables support for the DW PCIe controller DMA test in the Rockchip SoC.
+
 config PCI_EXYNOS
 	tristate "Samsung Exynos PCIe controller"
 	depends on ARCH_EXYNOS || COMPILE_TEST
diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
index f9c84def2614..236c9793a3a5 100644
--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c
+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c
@@ -573,13 +573,16 @@ static int rk_pcie_init_dma_trx(struct rk_pcie *rk_pcie)
 	if (!rk_pcie_udma_enabled(rk_pcie))
 		return 0;
 
+#ifdef PCIE_DW_ROCKCHIP_RC_DMATEST
 	rk_pcie->dma_obj = pcie_dw_dmatest_register(rk_pcie->pci->dev, true);
 	if (IS_ERR(rk_pcie->dma_obj)) {
 		dev_err(rk_pcie->pci->dev, "failed to prepare dmatest\n");
 		return -EINVAL;
-	} else if (!rk_pcie->dma_obj) { /* !CONFIG_ROCKCHIP_PCIE_DMA_OBJ */
-		return 0;
 	}
+#endif
+
+	if (!rk_pcie->dma_obj)
+		return 0;
 
 	/* Enable client write and read interrupt */
 	rk_pcie_writel_apb(rk_pcie, PCIE_CLIENT_INTR_MASK, 0xc000000);