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arm: dts: tl1: add device tree for skt and x301 boards [1/1]
PD#172587 Problem: Bringup tl1 skt & x301. Solution: Add device tree for skt and x301 boards. Verify: test pass on skt board Change-Id: Ia6c16be242b5cc430a38ec6b9cac8c320f7339d7 Signed-off-by: Xingyu Chen <xingyu.chen@amlogic.com> Signed-off-by: Bo Yang <bo.yang@amlogic.com>
This commit is contained in:
Xingyu Chen
14
MAINTAINERS
14
MAINTAINERS
@@ -14708,5 +14708,15 @@ F: arch/arm64/boot/dts/amlogic/firmware_avb_ab.dtsi
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F: arch/arm64/boot/dts/amlogic/partition_mbox_ab_P_32.dtsi
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AMLOGIC BACKLIGHT LDIM DRIVER
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M: Evoke Zhang <evoke.zhang@amlogic.com>
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F: drivers/amlogic/media/vout/backlight/aml_ldim/ldim_spi.c
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M: Evoke Zhang <evoke.zhang@amlogic.com>
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F: drivers/amlogic/media/vout/backlight/aml_ldim/ldim_spi.c
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AMLOGIC MESON TL1 DTS
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M: Xingyu Chen <xingyu.chen@amlogic.com>
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M: Bo Yang <bo.yang@amlogic.com>
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F: arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
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F: arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
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AMLOGIC MESON TL1 PANEL DTS
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M: Evoke Zhang <evoke.zhang@amlogic.com>
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F: arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
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@@ -41,8 +41,14 @@
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reg = <0x0>;
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//timer=<&timer_a>;
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enable-method = "psci";
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clocks = <&scpi_dvfs 0>;
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clock-names = "cpu-cluster.0";
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clocks = <&clkc CLKID_CPU_CLK>,
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<&clkc CLKID_CPU_FCLK_P>,
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<&clkc CLKID_SYS_PLL>;
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clock-names = "core_clk",
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"low_freq_clk_parent",
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"high_freq_clk_parent";
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operating-points-v2 = <&cpu_opp_table0>;
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cpu-supply = <&vddcpu0>;
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//cpu-idle-states = <&SYSTEM_SLEEP_0>;
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};
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@@ -52,8 +58,14 @@
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reg = <0x1>;
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//timer=<&timer_b>;
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enable-method = "psci";
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clocks = <&scpi_dvfs 0>;
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clock-names = "cpu-cluster.0";
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clocks = <&clkc CLKID_CPU_CLK>,
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<&clkc CLKID_CPU_FCLK_P>,
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<&clkc CLKID_SYS_PLL>;
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clock-names = "core_clk",
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"low_freq_clk_parent",
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"high_freq_clk_parent";
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operating-points-v2 = <&cpu_opp_table0>;
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cpu-supply = <&vddcpu0>;
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//cpu-idle-states = <&SYSTEM_SLEEP_0>;
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};
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@@ -63,8 +75,14 @@
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reg = <0x2>;
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//timer=<&timer_c>;
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enable-method = "psci";
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clocks = <&scpi_dvfs 0>;
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clock-names = "cpu-cluster.0";
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clocks = <&clkc CLKID_CPU_CLK>,
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<&clkc CLKID_CPU_FCLK_P>,
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<&clkc CLKID_SYS_PLL>;
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clock-names = "core_clk",
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"low_freq_clk_parent",
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"high_freq_clk_parent";
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operating-points-v2 = <&cpu_opp_table0>;
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cpu-supply = <&vddcpu0>;
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//cpu-idle-states = <&SYSTEM_SLEEP_0>;
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};
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@@ -74,8 +92,14 @@
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reg = <0x0 0x3>;
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//timer=<&timer_d>;
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enable-method = "psci";
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clocks = <&scpi_dvfs 0>;
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clock-names = "cpu-cluster.0";
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clocks = <&clkc CLKID_CPU_CLK>,
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<&clkc CLKID_CPU_FCLK_P>,
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<&clkc CLKID_SYS_PLL>;
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clock-names = "core_clk",
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"low_freq_clk_parent",
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"high_freq_clk_parent";
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operating-points-v2 = <&cpu_opp_table0>;
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cpu-supply = <&vddcpu0>;
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//cpu-idle-states = <&SYSTEM_SLEEP_0>;
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};
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};
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@@ -101,6 +125,23 @@
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bit_resolution =<0>;
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};
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arm_pmu {
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compatible = "arm,cortex-a15-pmu";
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interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0xff634400 0x1000>;
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/* addr = base + offset << 2 */
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sys_cpu_status0_offset = <0xa0>;
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sys_cpu_status0_pmuirq_mask = <0xf>;
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/* default 10ms */
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relax_timer_ns = <10000000>;
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/* default 10000us */
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max_wait_cnt = <10000>;
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};
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gic: interrupt-controller@2c001000 {
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compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
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#interrupt-cells = <3>;
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@@ -155,6 +196,17 @@
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storage_version = <0x8200006C>;
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};
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mailbox: mhu@ff63c400 {
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compatible = "amlogic, meson_mhu";
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reg = <0xff63c400 0x4c>, /* MHU registers */
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<0xfffd7000 0x800>; /* Payload area */
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interrupts = <0 209 1>, /* low priority interrupt */
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<0 210 1>; /* high priority interrupt */
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#mbox-cells = <1>;
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mbox-names = "cpu_to_scp_low", "cpu_to_scp_high";
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mboxes = <&mailbox 0 &mailbox 1>;
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};
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cpu_iomap {
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compatible = "amlogic, iomap";
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#address-cells = <1>;
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@@ -210,6 +262,26 @@
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status = "okay";
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};
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securitykey {
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compatible = "amlogic, securitykey";
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status = "okay";
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storage_query = <0x82000060>;
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storage_read = <0x82000061>;
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storage_write = <0x82000062>;
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storage_tell = <0x82000063>;
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storage_verify = <0x82000064>;
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storage_status = <0x82000065>;
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storage_list = <0x82000067>;
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storage_remove = <0x82000068>;
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storage_in_func = <0x82000023>;
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storage_out_func = <0x82000024>;
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storage_block_func = <0x82000025>;
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storage_size_func = <0x82000027>;
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storage_set_enctype = <0x8200006A>;
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storage_get_enctype = <0x8200006B>;
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storage_version = <0x8200006C>;
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};
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vpu {
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compatible = "amlogic, vpu-tl1";
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status = "okay";
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@@ -228,6 +300,21 @@
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/* 4: 333.3M 5: 400.0M 6: 500.0M 7: 666.7M */
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};
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ethmac: ethernet@ff3f0000 {
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compatible = "amlogic, g12a-eth-dwmac","snps,dwmac";
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reg = <0xff3f0000 0x10000
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0xff634540 0x8
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0xff64c000 0xa0>;
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reg-names = "eth_base", "eth_cfg", "eth_pll";
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interrupts = <0 8 1>;
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interrupt-names = "macirq";
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status = "disabled";
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clocks = <&clkc CLKID_ETH_CORE>;
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clock-names = "ethclk81";
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pll_val = <0x9c0040a 0x927e0000 0xac5f49e5>;
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analog_val = <0x20200000 0x0000c000 0x00000023>;
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};
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pinctrl_aobus: pinctrl@ff800014 {
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compatible = "amlogic,meson-tl1-aobus-pinctrl";
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#address-cells = <1>;
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@@ -328,6 +415,86 @@
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&gpio GPIOC_5 0>;
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};
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saradc:saradc {
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compatible = "amlogic,meson-g12a-saradc";
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status = "disabled";
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#io-channel-cells = <1>;
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clocks = <&xtal>, <&clkc CLKID_SARADC_GATE>;
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clock-names = "xtal", "saradc_clk";
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interrupts = <GIC_SPI 200 IRQ_TYPE_EDGE_RISING>;
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reg = <0xff809000 0x48>;
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};
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vddcpu0: pwmao_d-regulator {
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compatible = "pwm-regulator";
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pwms = <&pwm_AO_cd MESON_PWM_1 1250 0>;
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regulator-name = "vddcpu0";
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regulator-min-microvolt = <721000>;
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regulator-max-microvolt = <1021000>;
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regulator-always-on;
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max-duty-cycle = <1250>;
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/* Voltage Duty-Cycle */
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voltage-table = <1021000 0>,
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<1011000 3>,
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<1001000 6>,
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<991000 10>,
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<981000 13>,
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<971000 16>,
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<961000 20>,
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<951000 23>,
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<941000 26>,
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<931000 30>,
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<921000 33>,
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<911000 36>,
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<901000 40>,
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<891000 43>,
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<881000 46>,
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<871000 50>,
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<861000 53>,
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<851000 56>,
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<841000 60>,
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<831000 63>,
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<821000 67>,
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<811000 70>,
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<801000 73>,
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<791000 76>,
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<781000 80>,
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<771000 83>,
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<761000 86>,
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<751000 90>,
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<741000 93>,
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<731000 96>,
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<721000 100>;
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status = "okay";
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};
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aml_dma {
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compatible = "amlogic,aml_txlx_dma";
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reg = <0xff63e000 0x48>;
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interrupts = <0 180 1>;
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aml_aes {
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compatible = "amlogic,aes_g12a_dma";
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dev_name = "aml_aes_dma";
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status = "okay";
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};
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aml_sha {
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compatible = "amlogic,sha_dma";
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dev_name = "aml_sha_dma";
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status = "okay";
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};
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};
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rng {
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compatible = "amlogic,meson-rng";
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status = "okay";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0xff630218 0x4>;
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quality = /bits/ 16 <1000>;
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};
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soc {
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compatible = "simple-bus";
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#address-cells = <1>;
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@@ -608,7 +775,7 @@
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status = "okay";
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clocks = <&xtal>;
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clock-names = "clk_uart";
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xtal_tick_en = <1>;
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xtal_tick_en = <2>;
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fifosize = < 64 >;
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//pinctrl-names = "default";
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//pinctrl-0 = <&ao_a_uart_pins>;
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@@ -616,6 +783,18 @@
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support-sysrq = <0>;
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};
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uart_AO_B: serial@4000 {
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compatible = "amlogic, meson-uart";
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reg = <0x4000 0x18>;
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interrupts = <0 197 1>;
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status = "disabled";
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clocks = <&xtal>;
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clock-names = "clk_uart";
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fifosize = < 64 >;
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pinctrl-names = "default";
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pinctrl-0 = <&ao_b_uart_pins1>;
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};
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remote: rc@8040 {
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compatible = "amlogic, aml_remote";
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reg = <0x8040 0x44>,
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@@ -644,7 +823,7 @@
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i2c_AO_slave:i2c_slave@6000 {
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compatible = "amlogic, meson-i2c-slave";
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status = "disabled";
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reg = <0x0 0x6000 0x0 0x20>;
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reg = <0x6000 0x20>;
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interrupts = <GIC_SPI 194 IRQ_TYPE_EDGE_RISING>;
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pinctrl-names="default";
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pinctrl-0=<&i2c_ao_slave_pins>;
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@@ -809,6 +988,48 @@
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};
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};
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uart_A: serial@ffd24000 {
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compatible = "amlogic, meson-uart";
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reg = <0xffd24000 0x18>;
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interrupts = <0 26 1>;
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status = "disabled";
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clocks = <&xtal
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&clkc CLKID_UART0>;
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clock-names = "clk_uart",
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"clk_gate";
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fifosize = < 128 >;
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pinctrl-names = "default";
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pinctrl-0 = <&a_uart_pins>;
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};
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uart_B: serial@ffd23000 {
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compatible = "amlogic, meson-uart";
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reg = <0xffd23000 0x18>;
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interrupts = <0 75 1>;
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status = "disabled";
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clocks = <&xtal
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||||
&clkc CLKID_UART1>;
|
||||
clock-names = "clk_uart",
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"clk_gate";
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fifosize = < 64 >;
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pinctrl-names = "default";
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pinctrl-0 = <&b_uart_pins>;
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};
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uart_C: serial@ffd22000 {
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||||
compatible = "amlogic, meson-uart";
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reg = <0xffd22000 0x18>;
|
||||
interrupts = <0 93 1>;
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||||
status = "disabled";
|
||||
clocks = <&xtal
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||||
&clkc CLKID_UART1>;
|
||||
clock-names = "clk_uart",
|
||||
"clk_gate";
|
||||
fifosize = < 64 >;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&c_uart_pins>;
|
||||
};
|
||||
|
||||
sd_emmc_c: emmc@ffe07000 {
|
||||
status = "okay";
|
||||
compatible = "amlogic, meson-mmc-tl1";
|
||||
@@ -905,7 +1126,7 @@
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||||
compatible = "amlogic,aml-spi-nor";
|
||||
status = "disabled";
|
||||
|
||||
reg = <0x0 0xffd14000 0x0 0x80>;
|
||||
reg = <0xffd14000 0x80>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&spifc_all_pins>;
|
||||
clock-names = "core";
|
||||
@@ -921,8 +1142,8 @@
|
||||
|
||||
slc_nand: nand-controller@0xFFE07800 {
|
||||
compatible = "amlogic, aml_mtd_nand";
|
||||
status = "okay";
|
||||
reg = <0x0 0xFFE07800 0x0 0x200>;
|
||||
status = "disabled";
|
||||
reg = <0xFFE07800 0x200>;
|
||||
interrupts = <0 34 1>;
|
||||
|
||||
pinctrl-names = "nand_rb_mod", "nand_norb_mod", "nand_cs_only";
|
||||
@@ -1072,10 +1293,27 @@
|
||||
interrupt-names = "vsync";
|
||||
};
|
||||
|
||||
ionvideo {
|
||||
compatible = "amlogic, ionvideo";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
amlvideo {
|
||||
compatible = "amlogic, amlvideo";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
vdac {
|
||||
compatible = "amlogic, vdac-tl1";
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
dmc_monitor {
|
||||
compatible = "amlogic, dmc_monitor";
|
||||
status = "okay";
|
||||
reg_base = <0xff638800>;
|
||||
interrupts = <GIC_SPI 51 IRQ_TYPE_EDGE_RISING>;
|
||||
};
|
||||
}; /* end of / */
|
||||
|
||||
&pinctrl_aobus {
|
||||
@@ -1199,25 +1437,53 @@
|
||||
|
||||
i2c_ao_2_pins:i2c_ao_2 {
|
||||
mux {
|
||||
groups = "i2c_ao_sck_2",
|
||||
"i2c_ao_sda_3";
|
||||
function = "i2c_ao";
|
||||
groups = "i2c_ao_sck_2",
|
||||
"i2c_ao_sda_3";
|
||||
function = "i2c_ao";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_ao_e_pins:i2c_ao_e {
|
||||
mux {
|
||||
groups = "i2c_ao_sck_e",
|
||||
"i2c_ao_sda_e";
|
||||
function = "i2c_ao";
|
||||
groups = "i2c_ao_sck_e",
|
||||
"i2c_ao_sda_e";
|
||||
function = "i2c_ao";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
i2c_ao_slave_pins:i2c_ao_slave {
|
||||
mux {
|
||||
groups = "i2c_ao_slave_sck",
|
||||
"i2c_ao_slave_sda";
|
||||
function = "i2c_ao_slave";
|
||||
groups = "i2c_ao_slave_sck",
|
||||
"i2c_ao_slave_sda";
|
||||
function = "i2c_ao_slave";
|
||||
};
|
||||
};
|
||||
|
||||
ao_uart_pins:ao_uart {
|
||||
mux {
|
||||
groups = "uart_ao_a_rx",
|
||||
"uart_ao_a_tx";
|
||||
function = "uart_ao_a";
|
||||
};
|
||||
};
|
||||
|
||||
ao_b_uart_pins1:ao_b_uart1 {
|
||||
mux {
|
||||
groups = "uart_ao_b_tx_2",
|
||||
"uart_ao_b_rx_3";
|
||||
function = "uart_ao_b";
|
||||
};
|
||||
};
|
||||
|
||||
ao_b_uart_pins2:ao_b_uart2 {
|
||||
mux {
|
||||
groups = "uart_ao_b_tx_8",
|
||||
"uart_ao_b_rx_9";
|
||||
function = "uart_ao_b";
|
||||
};
|
||||
};
|
||||
};
|
||||
@@ -1503,6 +1769,8 @@
|
||||
groups = "i2c0_sda_c",
|
||||
"i2c0_sck_c";
|
||||
function = "i2c0";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1511,6 +1779,8 @@
|
||||
groups = "i2c0_sda_dv",
|
||||
"i2c0_sck_dv";
|
||||
function = "i2c0";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1519,6 +1789,8 @@
|
||||
groups = "i2c1_sda_z",
|
||||
"i2c1_sck_z";
|
||||
function = "i2c1";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1527,6 +1799,8 @@
|
||||
groups = "i2c1_sda_h",
|
||||
"i2c1_sck_h";
|
||||
function = "i2c1";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1535,6 +1809,8 @@
|
||||
groups = "i2c2_sda_h",
|
||||
"i2c2_sck_h";
|
||||
function = "i2c2";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1543,6 +1819,8 @@
|
||||
groups = "i2c2_sda_z",
|
||||
"i2c2_sck_z";
|
||||
function = "i2c2";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1551,6 +1829,8 @@
|
||||
groups = "i2c3_sda_h1",
|
||||
"i2c3_sck_h0";
|
||||
function = "i2c3";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1559,6 +1839,8 @@
|
||||
groups = "i2c3_sda_h20",
|
||||
"i2c3_sck_h19";
|
||||
function = "i2c3";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1567,6 +1849,8 @@
|
||||
groups = "i2c3_sda_dv",
|
||||
"i2c3_sck_dv";
|
||||
function = "i2c3";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1575,6 +1859,8 @@
|
||||
groups = "i2c3_sda_c",
|
||||
"i2c3_sck_c";
|
||||
function = "i2c3";
|
||||
bias-pull-up;
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
@@ -1597,4 +1883,70 @@
|
||||
drive-strength = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
internal_eth_pins: internal_eth_pins {
|
||||
mux {
|
||||
groups = "eth_link_led",
|
||||
"eth_act_led";
|
||||
function = "eth";
|
||||
};
|
||||
};
|
||||
|
||||
internal_gpio_pins: internal_gpio_pins {
|
||||
mux {
|
||||
groups = "GPIOZ_14",
|
||||
"GPIOZ_15";
|
||||
function = "gpio_periphs";
|
||||
bias-disable;
|
||||
input-enable;
|
||||
};
|
||||
};
|
||||
|
||||
external_eth_pins: external_eth_pins {
|
||||
mux {
|
||||
groups = "eth_mdio",
|
||||
"eth_mdc",
|
||||
"eth_rgmii_rx_clk",
|
||||
"eth_rx_dv",
|
||||
"eth_rxd0",
|
||||
"eth_rxd1",
|
||||
"eth_rxd2_rgmii",
|
||||
"eth_rxd3_rgmii",
|
||||
"eth_rgmii_tx_clk",
|
||||
"eth_txen",
|
||||
"eth_txd0",
|
||||
"eth_txd1",
|
||||
"eth_txd2_rgmii",
|
||||
"eth_txd3_rgmii";
|
||||
function = "eth";
|
||||
drive-strength = <3>;
|
||||
};
|
||||
};
|
||||
|
||||
a_uart_pins:a_uart {
|
||||
mux {
|
||||
groups = "uart_a_tx",
|
||||
"uart_a_rx",
|
||||
"uart_a_cts",
|
||||
"uart_a_rts";
|
||||
function = "uart_a";
|
||||
};
|
||||
};
|
||||
|
||||
b_uart_pins:b_uart {
|
||||
mux {
|
||||
groups = "uart_b_tx",
|
||||
"uart_b_rx";
|
||||
function = "uart_b";
|
||||
};
|
||||
};
|
||||
|
||||
c_uart_pins:c_uart {
|
||||
mux {
|
||||
groups = "uart_c_tx",
|
||||
"uart_c_rx";
|
||||
function = "uart_c";
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
92
arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
Normal file
92
arch/arm/boot/dts/amlogic/mesontl1_skt-panel.dtsi
Normal file
@@ -0,0 +1,92 @@
|
||||
/*
|
||||
* arch/arm64/boot/dts/amlogic/mesontl1_pxp-panel.dtsi
|
||||
*
|
||||
* Copyright (C) 2016 Amlogic, Inc. All rights reserved.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
|
||||
* more details.
|
||||
*
|
||||
*/
|
||||
|
||||
/ {
|
||||
lcd {
|
||||
compatible = "amlogic, lcd-tl1";
|
||||
status = "okay";
|
||||
mode = "tv";
|
||||
fr_auto_policy = <0>; /* 0=disable, 1=60/50hz, 2=60/50/48hz */
|
||||
key_valid = <0>;
|
||||
clocks = <&clkc CLKID_VCLK2_ENCL
|
||||
&clkc CLKID_VCLK2_VENCL
|
||||
&clkc CLKID_TCON
|
||||
&clkc CLKID_FCLK_DIV5
|
||||
&clkc CLKID_TCON_PLL_COMP>;
|
||||
clock-names = "encl_top_gate",
|
||||
"encl_int_gate",
|
||||
"tcon_gate",
|
||||
"fclk_div5",
|
||||
"clk_tcon";
|
||||
reg = <0xff660000 0x8100
|
||||
0xff634400 0x100>;
|
||||
interrupts = <0 3 1
|
||||
0 78 1
|
||||
0 88 1>;
|
||||
interrupt-names = "vsync","vbyone","tcon";
|
||||
pinctrl_version = <2>; /* for uboot */
|
||||
|
||||
/* power type:(0=cpu_gpio, 2=signal, 3=extern, 0xff=ending) */
|
||||
/* power index:(gpios_index, or extern_index, 0xff=invalid) */
|
||||
/* power value:(0=output low, 1=output high, 2=input) */
|
||||
/* power delay:(unit in ms) */
|
||||
|
||||
lvds_0{
|
||||
model_name = "1080p-vfreq";
|
||||
interface = "lvds"; /*lcd_interface(lvds, vbyone)*/
|
||||
basic_setting = <
|
||||
1920 1080 /*h_active, v_active*/
|
||||
2200 1125 /*h_period, v_period*/
|
||||
8 /*lcd_bits */
|
||||
16 9>; /*screen_widht, screen_height*/
|
||||
range_setting = <
|
||||
2060 2650 /*h_period_min,max*/
|
||||
1100 1480 /*v_period_min,max*/
|
||||
120000000 160000000>; /*pclk_min,max*/
|
||||
lcd_timing = <
|
||||
44 148 0 /*hs_width, hs_bp, hs_pol*/
|
||||
5 30 0>; /*vs_width, vs_bp, vs_pol*/
|
||||
clk_attr = <
|
||||
2 /*fr_adj_type
|
||||
*(0=clk, 1=htotal, 2=vtotal, 3=auto_range,
|
||||
* 4=hdmi_mode)
|
||||
*/
|
||||
0 /*clk_ss_level*/
|
||||
1 /*clk_auto_generate*/
|
||||
0>; /*pixel_clk(unit in Hz)*/
|
||||
lvds_attr = <
|
||||
1 /*lvds_repack*/
|
||||
1 /*dual_port*/
|
||||
0 /*pn_swap*/
|
||||
0 /*port_swap*/
|
||||
0>; /*lane_reverse*/
|
||||
phy_attr=<
|
||||
3 0 /*vswing_level, preem_level*/
|
||||
0 0>; /*clk vswing_level, preem_level*/
|
||||
|
||||
/* power step: type, index, value, delay(ms) */
|
||||
power_on_step = <
|
||||
2 0 0 0 /*signal enable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
power_off_step = <
|
||||
2 0 0 10 /*signal disable*/
|
||||
0xff 0 0 0>; /*ending*/
|
||||
backlight_index = <0xff>;
|
||||
};
|
||||
}; /* end of lcd */
|
||||
|
||||
}; /* end of / */
|
||||
@@ -16,7 +16,10 @@
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
|
||||
#include "mesontl1.dtsi"
|
||||
#include "partition_mbox_normal_P_32.dtsi"
|
||||
#include "mesontl1_skt-panel.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Amlogic TL1 PXP";
|
||||
@@ -106,10 +109,17 @@
|
||||
compatible = "shared-dma-pool";
|
||||
/*linux,phandle = <5>;*/
|
||||
reusable;
|
||||
/* 2M-30M for emp or tmds to ddr */
|
||||
size = <0x01e00000>;
|
||||
alignment = <0x10000>;
|
||||
alloc-ranges = <0x30000000 0x50000000>;
|
||||
/* 4M for emp to ddr */
|
||||
/* 32M for tmds to ddr */
|
||||
size = <0x2000000>;
|
||||
alignment = <0x400000>;
|
||||
/* alloc-ranges = <0x400000 0x2000000>; */
|
||||
};
|
||||
|
||||
/* POST PROCESS MANAGER */
|
||||
ppmgr_reserved:linux,ppmgr {
|
||||
compatible = "amlogic, ppmgr_memory";
|
||||
size = <0x0>;
|
||||
};
|
||||
}; /* end of reserved-memory */
|
||||
|
||||
@@ -119,6 +129,12 @@
|
||||
memory-region = <&codec_mm_cma &codec_mm_reserved>;
|
||||
};
|
||||
|
||||
ppmgr {
|
||||
compatible = "amlogic, ppmgr";
|
||||
memory-region = <&ppmgr_reserved>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
vout {
|
||||
compatible = "amlogic, vout";
|
||||
status = "okay";
|
||||
@@ -300,6 +316,28 @@
|
||||
<0 13 1>;
|
||||
};
|
||||
|
||||
amlvecm {
|
||||
compatible = "amlogic, vecm";
|
||||
dev_name = "aml_vecm";
|
||||
status = "okay";
|
||||
gamma_en = <1>;/*1:enabel ;0:disable*/
|
||||
wb_en = <1>;/*1:enabel ;0:disable*/
|
||||
cm_en = <1>;/*1:enabel ;0:disable*/
|
||||
wb_sel = <1>;/*1:mtx ;0:gainoff*/
|
||||
vlock_en = <1>;/*1:enable;0:disable*/
|
||||
vlock_mode = <0x4>;
|
||||
/* vlock work mode:
|
||||
*bit0:auto ENC
|
||||
*bit1:auto PLL
|
||||
*bit2:manual PLL
|
||||
*bit3:manual ENC
|
||||
*bit4:manual soft ENC
|
||||
*bit5:manual MIX PLL ENC
|
||||
*/
|
||||
vlock_pll_m_limit = <1>;
|
||||
vlock_line_limit = <3>;
|
||||
};
|
||||
|
||||
vdin@0 {
|
||||
compatible = "amlogic, vdin";
|
||||
/*memory-region = <&vdin0_cma_reserved>;*/
|
||||
@@ -445,8 +483,90 @@
|
||||
reg-names = "ao_exit","ao";
|
||||
};
|
||||
|
||||
/*DCDC for MP8756GD*/
|
||||
cpu_opp_table0: cpu_opp_table0 {
|
||||
compatible = "operating-points-v2";
|
||||
opp-shared;
|
||||
|
||||
opp00 {
|
||||
opp-hz = /bits/ 64 <100000000>;
|
||||
opp-microvolt = <731000>;
|
||||
};
|
||||
opp01 {
|
||||
opp-hz = /bits/ 64 <250000000>;
|
||||
opp-microvolt = <731000>;
|
||||
};
|
||||
opp02 {
|
||||
opp-hz = /bits/ 64 <500000000>;
|
||||
opp-microvolt = <731000>;
|
||||
};
|
||||
opp03 {
|
||||
opp-hz = /bits/ 64 <667000000>;
|
||||
opp-microvolt = <761000>;
|
||||
};
|
||||
opp04 {
|
||||
opp-hz = /bits/ 64 <1000000000>;
|
||||
opp-microvolt = <781000>;
|
||||
};
|
||||
opp05 {
|
||||
opp-hz = /bits/ 64 <1200000000>;
|
||||
opp-microvolt = <801000>;
|
||||
};
|
||||
opp06 {
|
||||
opp-hz = /bits/ 64 <1398000000>;
|
||||
opp-microvolt = <831000>;
|
||||
};
|
||||
opp07 {
|
||||
opp-hz = /bits/ 64 <1512000000>;
|
||||
opp-microvolt = <861000>;
|
||||
};
|
||||
opp08 {
|
||||
opp-hz = /bits/ 64 <1608000000>;
|
||||
opp-microvolt = <891000>;
|
||||
};
|
||||
opp09 {
|
||||
opp-hz = /bits/ 64 <1704000000>;
|
||||
opp-microvolt = <921000>;
|
||||
};
|
||||
opp10 {
|
||||
opp-hz = /bits/ 64 <1800000000>;
|
||||
opp-microvolt = <981000>;
|
||||
};
|
||||
opp11 {
|
||||
opp-hz = /bits/ 64 <1908000000>;
|
||||
opp-microvolt = <1011000>;
|
||||
};
|
||||
};
|
||||
|
||||
cpufreq-meson {
|
||||
compatible = "amlogic, cpufreq-meson";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&pwm_ao_d_pins3>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
tuner: tuner {
|
||||
status = "okay";
|
||||
tuner_name = "mxl661_tuner";
|
||||
tuner_i2c_adap = <&i2c0>;
|
||||
tuner_i2c_addr = <0x60>;
|
||||
tuner_xtal = <1>; /* 0: 16MHz, 1: 24MHz */
|
||||
tuner_xtal_mode = <3>;
|
||||
/* NO_SHARE_XTAL(0)
|
||||
* SLAVE_XTAL_SHARE(3)
|
||||
*/
|
||||
tuner_xtal_cap = <25>; /* when tuner_xtal_mode = 3, set 25 */
|
||||
};
|
||||
|
||||
}; /* end of / */
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
clock-frequency = <300000>;
|
||||
pinctrl-names="default";
|
||||
pinctrl-0=<&i2c0_dv_pins>;
|
||||
};
|
||||
|
||||
&audiobus {
|
||||
tdma:tdm {
|
||||
compatible = "amlogic, tl1-snd-tdma";
|
||||
@@ -751,3 +871,8 @@
|
||||
mem_alloc = <1>;
|
||||
pxp_mode = <1>; /** 0:normal mode 1:pxp mode */
|
||||
};
|
||||
|
||||
&pwm_AO_cd {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
|
||||
1248
arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
Normal file
1248
arch/arm/boot/dts/amlogic/tl1_t962x2_skt.dts
Normal file
File diff suppressed because it is too large
Load Diff
1248
arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
Normal file
1248
arch/arm/boot/dts/amlogic/tl1_t962x2_x301.dts
Normal file
File diff suppressed because it is too large
Load Diff
Reference in New Issue
Block a user