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https://github.com/hardkernel/linux.git
synced 2026-06-09 12:17:12 +09:00
fix set register error
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@@ -81,6 +81,7 @@ static const unsigned int rk616_reg_defaults[RK616_PGAR_AGC_CTL5 + 1] = {
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[RK616_ADC_INT_CTL2] = 0x000e,
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[RK616_DAC_INT_CTL1] = 0x0050,
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[RK616_DAC_INT_CTL2] = 0x000e,
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[RK616_CLK_CHPUMP] = 0x0001,
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[RK616_PGA_AGC_CTL] = 0x000c,
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[RK616_PWR_ADD1] = 0x007c,
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[RK616_BST_CTL] = 0x0099,
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@@ -143,6 +144,12 @@ static struct rk616_reg_val_typ rk616_mfd_reg_defaults[] = {
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{CRU_CFGMISC_CON, 0x00000000},
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};
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static struct rk616_reg_val_typ rk616_mfd_codec_bit_list[] = {
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{CRU_CFGMISC_CON, AD_DA_LOOP | MICDET2_PIN_F_CODEC | MICDET1_PIN_F_CODEC},
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};
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#define RK616_MFD_CODEC_BIT_LEN ARRAY_SIZE(rk616_mfd_codec_bit_list)
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static struct rk616_reg_val_typ rk616_mfd_reg_cache[] = {
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{CRU_CODEC_DIV, 0x00000000},
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{CRU_IO_CON0, (I2S1_OUT_DISABLE | I2S0_OUT_DISABLE | I2S1_PD_DISABLE | I2S0_PD_DISABLE) |
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@@ -154,6 +161,18 @@ static struct rk616_reg_val_typ rk616_mfd_reg_cache[] = {
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#define RK616_MFD_REG_LEN ARRAY_SIZE(rk616_mfd_reg_cache)
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static int rk616_mfd_codec_bit(unsigned int reg)
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{
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int i;
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for (i = 0; i < RK616_MFD_CODEC_BIT_LEN; i++) {
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if (rk616_mfd_codec_bit_list[i].reg == reg)
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return i;
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}
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return -1;
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}
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static int rk616_mfd_register(unsigned int reg)
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{
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int i;
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@@ -204,7 +223,9 @@ static int rk616_volatile_register(struct snd_soc_codec *codec, unsigned int reg
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{
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switch (reg) {
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case RK616_RESET:
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case RK616_CLK_CHPUMP:
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case RK616_MICKEY_DET_CTL:
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case CRU_CFGMISC_CON:
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return 1;
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default:
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return 0;
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@@ -220,6 +241,7 @@ static int rk616_codec_register(struct snd_soc_codec *codec, unsigned int reg)
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case RK616_ADC_INT_CTL2:
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case RK616_DAC_INT_CTL1:
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case RK616_DAC_INT_CTL2:
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case RK616_CLK_CHPUMP:
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case RK616_PGA_AGC_CTL:
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case RK616_PWR_ADD1:
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case RK616_BST_CTL:
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@@ -345,8 +367,7 @@ static unsigned int rk616_codec_read(struct snd_soc_codec *codec, unsigned int r
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}
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}
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if (value <= 0xffff)
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DBG("%s reg = 0x%x, val= 0x%x\n", __func__, reg, value);
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DBG("%s reg = 0x%x, val= 0x%x\n", __func__, reg, value);
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return value;
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}
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@@ -365,20 +386,29 @@ static int rk616_codec_write(struct snd_soc_codec *codec, unsigned int reg, unsi
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return -EINVAL;
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}
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if (rk616_mfd_mask_register(reg))
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// set codec mask bit
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i = rk616_mfd_codec_bit(reg);
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if (i >= 0) {
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set_bit = rk616_mfd_codec_bit_list[i].value;
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read_value = rk616_codec_read(codec, reg);
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value = (read_value & ~set_bit) | (value & set_bit);
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} else if (rk616_mfd_mask_register(reg)) {
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value = ((0xffff0000 & rk616_read_reg_cache(codec, reg)) | (value & 0x0000ffff));
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}
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// read codec init register
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i = rk616_init_bit_register(reg);
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if (i >= 0) {
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read_value = rk616_codec_read(codec, reg);
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}
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// write i2c
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if (rk616->write_dev(rk616, reg, &value) < 0) {
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printk("%s reg = 0x%x failed\n", __func__, reg);
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return -EIO;
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}
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// set codec init bit
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// widget init bit should be setted 0 after widget power up or unmute,
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// and should be setted 1 after widget power down or mute.
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if (i >= 0) {
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@@ -1524,8 +1554,9 @@ static int rk616_hw_params(struct snd_pcm_substream *substream,
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#ifdef RK616_FOR_MID
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static struct rk616_reg_val_typ power_up_list[] = {
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{0x804, 0x46}, //DAC GSM, 0x06: x1, 0x26: x1.25, 0x46: x1.5, 0x66: x1.75
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{0x828, 0x09}, //Set for Capture
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{0x83c, 0x00}, //power up
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{0x840, 0x69}, //BST_L power up, unmute, and Single-Ended(bit 6), volume 0-20dB(bit 5)
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{0x840, 0x49}, //BST_L power up, unmute, and Single-Ended(bit 6), volume 0-20dB(bit 5)
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{0x848, 0x06}, //MIXINL power up and unmute, MININL from MICMUX, MICMUX from BST_L
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{0x84c, 0x3c}, //MIXINL from MIXMUX volume (bit 3-5)
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{0x860, 0x1f}, //PGAL power up unmute,volume (bit 0-4)
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@@ -1545,6 +1576,12 @@ static struct rk616_reg_val_typ power_up_list[] = {
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{0x89c, 0x7f}, //MICBIAS1 power up (bit 7, Vout = 1.7 * Vref(1.65V) = 2.8V (bit 3-5)
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{0x8a8, 0x09}, //ADCL/R power, and clear ADCL/R buf
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{0x8a8, 0x00}, //ADCL/R power, and clear ADCL/R buf
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{0x894, 0x75}, //power up HPOUTL (bit 7), volume (bit 0-4)
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{0x898, 0x75}, //power up HPOUTR (bit 7), volume (bit 0-4)
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{0x894, 0x35}, //INIT HPOUTL (bit 6), volume (bit 0-4)
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{0x898, 0x35}, //INIT HPOUTR (bit 6), volume (bit 0-4)
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{0x894, 0x15}, //unmute HPOUTL (bit 5), volume (bit 0-4)
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{0x898, 0x15}, //unmute HPOUTR (bit 5), volume (bit 0-4)
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};
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#define RK616_CODEC_POWER_UP_LIST_LEN ARRAY_SIZE(power_up_list)
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@@ -30,6 +30,7 @@
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#define RK616_ADC_INT_CTL2 (RK616_CODEC_BASE + 0x0c)
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#define RK616_DAC_INT_CTL1 (RK616_CODEC_BASE + 0x10)
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#define RK616_DAC_INT_CTL2 (RK616_CODEC_BASE + 0x14)
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#define RK616_CLK_CHPUMP (RK616_CODEC_BASE + 0x1c)
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#define RK616_PGA_AGC_CTL (RK616_CODEC_BASE + 0x28)
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#define RK616_PWR_ADD1 (RK616_CODEC_BASE + 0x3c)
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#define RK616_BST_CTL (RK616_CODEC_BASE + 0x40)
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@@ -747,7 +748,7 @@ enum {
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struct rk616_reg_val_typ {
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unsigned int reg;
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unsigned int value;
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unsigned int value;
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};
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struct rk616_init_bit_typ {
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