From d8b65faa222dcdc55bcd04d402fd7033fb8c9017 Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Thu, 3 Oct 2024 11:18:08 +0800 Subject: [PATCH] PCI: dw: rockchip: Modify the initialization timing of phy 1.controller aasert 2.phy initial 3.controller deassert for fully release 4.wait for phy lock Change-Id: Id7d760825936ecf1c721aa18735e49f644150341 Signed-off-by: Jon Lin --- drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c | 8 ++++++++ drivers/pci/controller/dwc/pcie-dw-rockchip.c | 9 ++++++++- 2 files changed, 16 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c index cbc0c51763b7..786053538d0b 100644 --- a/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c @@ -672,8 +672,16 @@ static int rockchip_pcie_init_host(struct rockchip_pcie *rockchip) if (ret) goto disable_phy; + ret = phy_calibrate(rockchip->phy); + if (ret) { + dev_err(dev, "phy lock failed\n"); + goto disable_controller; + } + return 0; +disable_controller: + reset_control_assert(rockchip->rst); disable_phy: phy_exit(rockchip->phy); phy_power_off(rockchip->phy); diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c index bfaac0895680..735357dbc3dc 100644 --- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c @@ -1506,7 +1506,6 @@ static int rk_pcie_really_probe(void *p) reset_control_assert(rk_pcie->rsts); udelay(10); - reset_control_deassert(rk_pcie->rsts); ret = clk_bulk_prepare_enable(rk_pcie->clk_cnt, rk_pcie->clks); if (ret) { @@ -1520,6 +1519,14 @@ static int rk_pcie_really_probe(void *p) goto disable_clk; } + reset_control_deassert(rk_pcie->rsts); + + ret = phy_calibrate(rk_pcie->phy); + if (ret) { + dev_err(dev, "phy lock failed\n"); + goto disable_phy; + } + /* 5. host registers manipulation */ ret = rk_pcie_host_config(rk_pcie); if (ret) {