From d8d3d3b4db5091de8becdc8f85bfdcfb3d4fdb55 Mon Sep 17 00:00:00 2001 From: Georgi Djakov Date: Mon, 12 Oct 2020 22:40:34 +0300 Subject: [PATCH] FROMLIST: interconnect: qcom: sdm845: Enable keepalive for the MM1 BCM After enabling interconect scaling for display on the db845c board, in certain configurations the board hangs, while the following errors are observed on the console: Error sending AMC RPMH requests (-110) qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 qcom_rpmh TCS Busy, retrying RPMH message send: addr=0x50000 ... In this specific case, the above is related to one of the sequencers being stuck, while client drivers are returning from probe and trying to disable the currently unused clock and interconnect resources. Generally we want to keep the multimedia NoC enabled like the rest of the NoCs, so let's set the keepalive flag on it too. Fixes: aae57773fbe0 ("interconnect: qcom: sdm845: Split qnodes into their respective NoCs") Reported-by: Amit Pundir Signed-off-by: Georgi Djakov Link: https://lore.kernel.org/lkml/20201012194034.26944-1-georgi.djakov@linaro.org/ Signed-off-by: John Stultz Change-Id: I0935e68947919c6a7d38bada810f9e8ed3f61604 --- drivers/interconnect/qcom/sdm845.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/interconnect/qcom/sdm845.c b/drivers/interconnect/qcom/sdm845.c index d79e3163e2c3..67e8fc3396f8 100644 --- a/drivers/interconnect/qcom/sdm845.c +++ b/drivers/interconnect/qcom/sdm845.c @@ -151,7 +151,7 @@ DEFINE_QBCM(bcm_mc0, "MC0", true, &ebi); DEFINE_QBCM(bcm_sh0, "SH0", true, &qns_llcc); DEFINE_QBCM(bcm_mm0, "MM0", false, &qns_mem_noc_hf); DEFINE_QBCM(bcm_sh1, "SH1", false, &qns_apps_io); -DEFINE_QBCM(bcm_mm1, "MM1", false, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1); +DEFINE_QBCM(bcm_mm1, "MM1", true, &qxm_camnoc_hf0_uncomp, &qxm_camnoc_hf1_uncomp, &qxm_camnoc_sf_uncomp, &qxm_camnoc_hf0, &qxm_camnoc_hf1, &qxm_mdp0, &qxm_mdp1); DEFINE_QBCM(bcm_sh2, "SH2", false, &qns_memnoc_snoc); DEFINE_QBCM(bcm_mm2, "MM2", false, &qns2_mem_noc); DEFINE_QBCM(bcm_sh3, "SH3", false, &acm_tcu);