From d9a3c682cbf5ea5139957c98bce4b5e94f192ef7 Mon Sep 17 00:00:00 2001 From: Chandler Chen Date: Thu, 16 May 2024 11:44:46 +0800 Subject: [PATCH] video: rockchip: mpp: add reset ready check for vdpu383 Change-Id: I915959cc5ca9f01934e201bae110af540ac8dccb Signed-off-by: Chandler Chen --- drivers/video/rockchip/mpp/mpp_rkvdec2.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) diff --git a/drivers/video/rockchip/mpp/mpp_rkvdec2.c b/drivers/video/rockchip/mpp/mpp_rkvdec2.c index f94b23e2401b..1edd6400466b 100644 --- a/drivers/video/rockchip/mpp/mpp_rkvdec2.c +++ b/drivers/video/rockchip/mpp/mpp_rkvdec2.c @@ -1416,15 +1416,31 @@ static int rkvdec_vdpu383_reset(struct mpp_dev *mpp) { struct rkvdec2_dev *dec = to_rkvdec2_dev(mpp); struct rkvdec_link_dev *link = dec->link_dec; + int ret = 0; + u32 irq_status = 0; mpp_debug_enter(); + /* disable irq */ + writel(link->info->ip_en_val & BIT(15), link->reg_base + link->info->ip_en_base); /* use ip reset to reset core and mmu */ writel(link->info->ip_reset_en, link->reg_base + link->info->ip_reset_base); - udelay(5); + ret = readl_relaxed_poll_timeout(link->reg_base + link->info->status_base, + irq_status, + irq_status & 0x800, + 0, 200); + if (ret) + dev_err(mpp->dev, "reset timeout\n"); /* clear reset ready status bit */ writel(link->info->ip_reset_mask, link->reg_base + link->info->status_base); + /* clear irq and status */ + writel_relaxed(0xffff0000, link->reg_base + link->info->irq_base); + writel_relaxed(0xffff0000, link->reg_base + link->info->status_base); + + /* enable irq */ + writel(link->info->ip_en_val, link->reg_base + link->info->ip_en_base); + mpp_debug_leave(); return 0;