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hdmirx: update config for TM2 [1/1]

Browse Source 
PD#SWPL-5616

Problem:
bring up hdmirx for TM2

Solution:
hdmirx: add hdmirx TM2 support

Verify:
Verfied on TM2 skt board

Change-Id: I82fd66afc7f26f1bdfd7a4f1fc4cc0d9d7ed3974
Signed-off-by: Lei Yang <lei.yang@amlogic.com>

Conflicts:
	arch/arm/boot/dts/amlogic/tm2_pxp.dts
	arch/arm/boot/dts/amlogic/tm2_t962e2_ab311.dts
	arch/arm/boot/dts/amlogic/tm2_t962e2_ab319.dts
	arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts
	arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts
	arch/arm64/boot/dts/amlogic/tm2_pxp.dts
	arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts
	arch/arm64/boot/dts/amlogic/tm2_t962e2_ab319.dts
	arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts
	arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts
	drivers/amlogic/media/vin/tvin/hdmirx/hdmi_rx_wrapper.c
This commit is contained in:
Lei Yang
2019-04-02 14:36:33 +08:00
committed by Luke Go
parent e7f25b093b
commit da7effbb9a
9 changed files with 160 additions and 13699 deletions
Download Patch File Download Diff File Expand all files Collapse all files

1200
arch/arm/boot/dts/amlogic/tm2_pxp.dts
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1936
arch/arm/boot/dts/amlogic/tm2_t962e2_ab311.dts
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1809
arch/arm/boot/dts/amlogic/tm2_t962e2_ab319.dts
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1807
arch/arm/boot/dts/amlogic/tm2_t962x3_ab309.dts
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1195
arch/arm64/boot/dts/amlogic/tm2_pxp.dts
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1896
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab311.dts
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1808
arch/arm64/boot/dts/amlogic/tm2_t962e2_ab319.dts
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402
arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts → arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts
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@@ -1,5 +1,5 @@
/*
* arch/arm/boot/dts/amlogic/tm2_t962x3_ab301.dts
* arch/arm64/boot/dts/amlogic/tm2_t962x3_ab301.dts
*
* Copyright (C) 2017 Amlogic, Inc. All rights reserved.
*
@@ -40,23 +40,21 @@
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c_AO;
spi0 = &spicc0;
spi1 = &spicc1;
};
memory@00000000 {
device_type = "memory";
linux,usable-memory = <0x0 0x80000000>;
linux,usable-memory = <0x0 0x0 0x0 0x80000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
#address-cells = <2>;
#size-cells = <2>;
ranges;
/* global autoconfigured region for contiguous allocations */
ramoops@0x07400000 {
compatible = "ramoops";
reg = <0x07400000 0x00100000>;
reg = <0x0 0x07400000 0x0 0x00100000>;
record-size = <0x8000>;
console-size = <0x8000>;
ftrace-size = <0x0>;
@@ -66,50 +64,50 @@
secmon_reserved: linux,secmon {
compatible = "shared-dma-pool";
reusable;
size = <0x400000>;
alignment = <0x400000>;
alloc-ranges = <0x05000000 0x400000>;
};
logo_reserved:linux,meson-fb {
compatible = "shared-dma-pool";
reusable;
size = <0x800000>;
alignment = <0x400000>;
alloc-ranges = <0x7f800000 0x800000>;
};
lcd_tcon_reserved:linux,lcd_tcon {
compatible = "shared-dma-pool";
reusable;
size = <0xc00000>;
alignment = <0x400000>;
alloc-ranges = <0x7ec00000 0xc00000>;
size = <0x0 0x400000>;
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x05000000 0x0 0x400000>;
};
codec_mm_cma:linux,codec_mm_cma {
compatible = "shared-dma-pool";
reusable;
/* ion_codec_mm max can alloc size 80M*/
size = <0x13400000>;
alignment = <0x400000>;
size = <0x0 0x13400000>;
alignment = <0x0 0x400000>;
linux,contiguous-region;
alloc-ranges = <0x30000000 0x50000000>;
alloc-ranges = <0x0 0x30000000 0x0 0x50000000>;
};
lcd_tcon_reserved:linux,lcd_tcon {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0xc00000>;
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x7ec00000 0x0 0xc00000>;
};
/* codec shared reserved */
codec_mm_reserved:linux,codec_mm_reserved {
compatible = "amlogic, codec-mm-reserved";
size = <0x0>;
alignment = <0x100000>;
size = <0x0 0x0>;
alignment = <0x0 0x100000>;
//no-map;
};
logo_reserved:linux,meson-fb {
compatible = "shared-dma-pool";
reusable;
size = <0x0 0x800000>;
alignment = <0x0 0x400000>;
alloc-ranges = <0x0 0x7f800000 0x0 0x800000>;
};
ion_cma_reserved:linux,ion-dev {
compatible = "shared-dma-pool";
reusable;
size = <0x2000000>;
alignment = <0x400000>;
size = <0x0 0x8000000>;
alignment = <0x0 0x400000>;
};
/* vdin0 CMA pool */
@@ -117,8 +115,8 @@
// compatible = "shared-dma-pool";
// reusable;
/* 3840x2160x4x4 ~=128 M */
// size = <0xc400000>;
// alignment = <0x400000>;
// size = <0x0 0xc400000>;
// alignment = <0x0 0x400000>;
//};
/* vdin1 CMA pool */
@@ -126,14 +124,14 @@
compatible = "shared-dma-pool";
reusable;
/* 1920x1080x2x4 =16 M */
size = <0x1400000>;
alignment = <0x400000>;
size = <0x0 0x1400000>;
alignment = <0x0 0x400000>;
};
/*demod_reserved:linux,demod {
* compatible = "amlogic, demod-mem";
* size = <0x800000>; //8M //100m 0x6400000
* alloc-ranges = <0x0 0x30000000>;
* size = <0x0 0x800000>; //8M //100m 0x6400000
* alloc-ranges = <0x0 0x0 0x0 0x30000000>;
* //multi-use;
* //no-map;
*};
@@ -143,8 +141,8 @@
compatible = "shared-dma-pool";
reusable;
/* 8M */
size = <0x0800000>;
alignment = <0x400000>;
size = <0x0 0x0800000>;
alignment = <0x0 0x400000>;
};
/*di CMA pool */
@@ -158,8 +156,8 @@
* 10x4736064=45.2M(0x2e) support 12bit
* 10x4074560=40M(0x28) support 10bit
*/
size = <0x02800000>;
alignment = <0x400000>;
size = <0x0 0x02800000>;
alignment = <0x0 0x400000>;
};
/* for hdmi rx emp use */
@@ -169,22 +167,22 @@
reusable;
/* 4M for emp to ddr */
/* 32M for tmds to ddr */
size = <0x400000>;
alignment = <0x400000>;
size = <0x0 0x400000>;
alignment = <0x0 0x400000>;
/* alloc-ranges = <0x400000 0x2000000>; */
};
/* POST PROCESS MANAGER */
ppmgr_reserved:linux,ppmgr {
compatible = "amlogic, ppmgr_memory";
size = <0x0>;
size = <0x0 0x0>;
};
picdec_cma_reserved:linux,picdec {
compatible = "shared-dma-pool";
reusable;
size = <0x0>;
alignment = <0x0>;
size = <0x0 0x0>;
alignment = <0x0 0x0>;
linux,contiguous-region;
};
}; /* end of reserved-memory */
@@ -256,10 +254,9 @@
#sound-dai-cells = <0>;
compatible = "amlogic, tl1_acodec";
status = "okay";
reg = <0xff632000 0x1c>;
reg = <0x0 0xff632000 0x0 0x1c>;
tdmout_index = <0>;
tdmin_index = <0>;
dat1_ch_sel = <1>;
};
aml_dtv_demod {
@@ -273,10 +270,10 @@
clocks = <&clkc CLKID_DAC_CLK>;
clock-names = "vdac_clk_gate";
reg = <0xff650000 0x4000 /*dtv demod base*/
0xff63c000 0x2000 /*hiu reg base*/
0xff800000 0x1000 /*io_aobus_base*/
0xffd01000 0x1000 /*reset*/
reg = <0x0 0xff650000 0x0 0x4000 /*dtv demod base*/
0x0 0xff63c000 0x0 0x2000 /*hiu reg base*/
0x0 0xff800000 0x0 0x1000 /*io_aobus_base*/
0x0 0xffd01000 0x0 0x1000 /*reset*/
>;
dtv_demod0_mem = <0>; // need move to aml_dtv_demod ?
@@ -403,7 +400,6 @@
aml-audio-card,dai-link@4 {
mclk-fs = <128>;
continuous-clock;
/* suffix-name, sync with android audio hal used for */
suffix-name = "alsaPORT-spdif";
cpu {
@@ -437,10 +433,9 @@
sound-dai = <&dummy_codec>;
};
};
};
/* Audio Related end */
/* Audio Related end */
dvb {
compatible = "amlogic, dvb";
status = "okay";
@@ -466,7 +461,7 @@
clocks = <&clkc CLKID_DEMUX
&clkc CLKID_ASYNC_FIFO
&clkc CLKID_AHB_ARB0
/* &clkc CLKID_DOS_PARSER>;*/
/*&clkc CLKID_DOS_PARSER>;*/
&clkc CLKID_U_PARSER>;
clock-names = "demux", "asyncfifo", "ahbarb0", "uparsertop";
};
@@ -511,12 +506,12 @@
flag_cma = <0x101>;
/*MByte, if 10bit disable: 64M(YUV422),
*if 10bit enable: 64*1.5 = 96M(YUV422)
*if support 4K2K-YUV444-10bit-WR:3840*2160*4*6 ~= 200M
*if support 4K2K-YUV422-10bit-wr:3840*2160*3*6 ~= 160M
*if support 4K2K-YUV444-10bit-WR:3840*2160*4*4 ~= 128M
*if support 4K2K-YUV422-10bit-wr:3840*2160*3*4 ~= 96M
*if support 4K2K-YUV422-8BIT-WR:3840*2160*2*4 ~= 64M
*if support 1080p-YUV422-8BIT-WR:1920*1080*2*4 ~= 16M
*/
cma_size = <200>;
cma_size = <190>;
interrupts = <0 83 1>;
rdma-irq = <2>;
clocks = <&clkc CLKID_FCLK_DIV5>,
@@ -534,14 +529,15 @@
*/
tv_bit_mode = <0x215>;
/* afbce_bit_mode: (amlogic frame buff compression encoder)
* bit0 -- enable afbce
* bit1 -- enable afbce compression-lossy
* bit4 -- afbce for 4k
* bit5 -- afbce for 1080p
* bit6 -- afbce for 720p
* bit7 -- afbce for smaller resolution
* bit 0~3:
* 0 -- normal mode, not use afbce
* 1 -- use afbce non-mmu mode
* 2 -- use afbce mmu mode
* bit 4:
* 0 -- afbce compression-lossy disable
* 1 -- afbce compression-lossy enable
*/
afbce_bit_mode = <0x0>;
afbce_bit_mode = <0>;
};
vdin@1 {
@@ -573,7 +569,7 @@
status = "okay";
flag_cma = <1>;/*1:share with codec_mm;0:cma alone*/
cma_size = <5>;/*MByte*/
reg = <0xff654000 0x2000>;/*tvafe reg base*/
reg = <0x0 0xff654000 0x0 0x2000>;/*tvafe reg base*/
reserve-iomap = "true";
tvafe_id = <0>;
//pinctrl-names = "default";
@@ -634,20 +630,20 @@
0xffff 0x0>; /* ending flag */
};
/* for external keypad */
adc_keypad {
compatible = "amlogic, adc_keypad";
status = "okay";
key_name = "power","up","down","enter","left","right","home";
key_name = "vol-", "vol+", "ch+", "ch-",
"menu", "source", "exit";
key_num = <7>;
io-channels = <&saradc SARADC_CH2>,<&saradc SARADC_CH3>;
io-channels = <&saradc SARADC_CH2 &saradc SARADC_CH3>;
io-channel-names = "key-chan-2", "key-chan-3";
key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2 SARADC_CH2
SARADC_CH2 SARADC_CH3 SARADC_CH3>;
key_code = <116 103 108 28 105 106 102>;
key_val = <0 143 266 389 512 143 266>; //val=voltage/1800mV*1023
key_chan = <SARADC_CH2 SARADC_CH2 SARADC_CH2
SARADC_CH2 SARADC_CH3 SARADC_CH3 SARADC_CH3>;
key_code = <114 115 192 193 139 466 174>;
key_val = <0 143 266 389 0 143 266>; //val=voltage/1800mV*1023
key_tolerance = <40 40 40 40 40 40 40>;
};
};
unifykey {
compatible = "amlogic, unifykey";
@@ -788,21 +784,6 @@
};
}; /* End unifykey */
amlvideo2_0 {
compatible = "amlogic, amlvideo2";
dev_name = "amlvideo2";
status = "okay";
amlvideo2_id = <0>;
cma_mode = <1>;
};
amlvideo2_1 {
compatible = "amlogic, amlvideo2";
dev_name = "amlvideo2";
status = "okay";
amlvideo2_id = <1>;
cma_mode = <1>;
};
hdmirx {
compatible = "amlogic, hdmirx_tm2";
@@ -853,13 +834,13 @@
/* MAP_ADDR_MODULE_SEC_AHB2 */
/* MAP_ADDR_MODULE_APB4 */
/* MAP_ADDR_MODULE_TOP */
reg = < 0x0 0x0
0xff63C000 0x2000
0xffe0d000 0x2000
0x0 0x0
0x0 0x0
0x0 0x0
0xff610000 0xa000>;
reg = < 0x0 0x0 0x0 0x0
0x0 0xff63C000 0x0 0x2000
0x0 0xffe0d000 0x0 0x2000
0x0 0x0 0x0 0x0
0x0 0x0 0x0 0x0
0x0 0x0 0x0 0x0
0x0 0xff610000 0x0 0xa000>;
};
aocec: aocec {
@@ -883,16 +864,16 @@
pinctrl-0=<&aoceca_mux>;
pinctrl-1=<&aocecb_mux>;
pinctrl-2=<&aoceca_mux>;
reg = <0xFF80023c 0x4
0xFF800000 0x400>;
reg = <0x0 0xFF80023c 0x0 0x4
0x0 0xFF800000 0x0 0x400>;
reg-names = "ao_exit","ao";
};
p_tsensor: p_tsensor@ff634800 {
compatible = "amlogic, r1p1-tsensor";
status = "okay";
reg = <0xff634800 0x50>,
<0xff800268 0x4>;
reg = <0x0 0xff634800 0x0 0x50>,
<0x0 0xff800268 0x0 0x4>;
cal_type = <0x1>;
cal_a = <324>;
cal_b = <424>;
@@ -908,8 +889,8 @@
d_tsensor: d_tsensor@ff634c00 {
compatible = "amlogic, r1p1-tsensor";
status = "okay";
reg = <0xff634c00 0x50>,
<0xff800230 0x4>;
reg = <0x0 0xff634c00 0x0 0x50>,
<0x0 0xff800230 0x0 0x4>;
cal_type = <0x1>;
cal_a = <324>;
cal_b = <424>;
@@ -925,8 +906,8 @@
s_tsensor: s_tsensor@ff635000 {
compatible = "amlogic, r1p1-tsensor";
status = "okay";
reg = <0xff635000 0x50>,
<0xff80026c 0x4>;
reg = <0x0 0xff635000 0x0 0x50>,
<0x0 0xff80026c 0x0 0x4>;
cal_type = <0x1>;
cal_a = <324>;
cal_b = <424>;
@@ -1092,7 +1073,7 @@
};
};
};
}; /*thermal zone end*/
};/*thermal zone end*/
/*DCDC for MP8756GD*/
cpu_opp_table0: cpu_opp_table0 {
@@ -1101,51 +1082,51 @@
opp00 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <729000>;
opp-microvolt = <699000>;
};
opp01 {
opp-hz = /bits/ 64 <250000000>;
opp-microvolt = <729000>;
opp-microvolt = <699000>;
};
opp02 {
opp-hz = /bits/ 64 <500000000>;
opp-microvolt = <729000>;
opp-microvolt = <709000>;
};
opp03 {
opp-hz = /bits/ 64 <667000000>;
opp-microvolt = <749000>;
opp-microvolt = <719000>;
};
opp04 {
opp-hz = /bits/ 64 <1000000000>;
opp-microvolt = <769000>;
opp-microvolt = <729000>;
};
opp05 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <779000>;
opp-microvolt = <749000>;
};
opp06 {
opp-hz = /bits/ 64 <1404000000>;
opp-microvolt = <789000>;
opp-microvolt = <769000>;
};
opp07 {
opp-hz = /bits/ 64 <1500000000>;
opp-microvolt = <799000>;
opp-microvolt = <779000>;
};
opp08 {
opp-hz = /bits/ 64 <1608000000>;
opp-microvolt = <809000>;
opp-microvolt = <789000>;
};
opp09 {
opp-hz = /bits/ 64 <1704000000>;
opp-microvolt = <849000>;
opp-microvolt = <829000>;
};
opp10 {
opp-hz = /bits/ 64 <1800000000>;
opp-microvolt = <899000>;
opp-microvolt = <879000>;
};
opp11 {
opp-hz = /bits/ 64 <1908000000>;
opp-microvolt = <949000>;
opp-microvolt = <929000>;
};
};
@@ -1164,8 +1145,8 @@
tuner_name_0 = "mxl661_tuner";
tuner_i2c_adap_0 = <&i2c0>;
tuner_i2c_addr_0 = <0x60>;
tuner_xtal_0 = <1>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode_0 = <3>;
tuner_xtal_0 = <0>; /* 0: 16MHz, 1: 24MHz */
tuner_xtal_mode_0 = <0>;
/* NO_SHARE_XTAL(0)
* SLAVE_XTAL_SHARE(3)
*/
@@ -1179,55 +1160,26 @@
btsc_sap_mode = <1>;
/* pinctrl-names="atvdemod_agc_pins"; */
/* pinctrl-0=<&atvdemod_agc_pins>; */
reg = <0xff656000 0x2000 /* demod reg */
0xff63c000 0x2000 /* hiu reg */
0xff634000 0x2000 /* periphs reg */
0xff64a000 0x2000>; /* audio reg */
reg = <0x0 0xff656000 0x0 0x2000 /* demod reg */
0x0 0xff63c000 0x0 0x2000 /* hiu reg */
0x0 0xff634000 0x0 0x2000 /* periphs reg */
0x0 0xff64a000 0x0 0x2000>; /* audio reg */
reg_23cf = <0x88188832>;
/*default:0x88188832;r840 on haier:0x48188832*/
};
bt-dev{
compatible = "amlogic, bt-dev";
status = "okay";
gpio_reset = <&gpio GPIOC_13 GPIO_ACTIVE_HIGH>;
};
wifi{
compatible = "amlogic, aml_wifi";
status = "okay";
interrupt_pin = <&gpio GPIOC_12 GPIO_ACTIVE_HIGH>;
irq_trigger_type = "GPIO_IRQ_LOW";
dhd_static_buf; //dhd_static_buf support
power_on_pin = <&gpio GPIOC_11 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&pwm_b_pins1>;
pwm_config = <&wifi_pwm_conf>;
};
wifi_pwm_conf:wifi_pwm_conf{
pwm_channel1_conf {
pwms = <&pwm_ab MESON_PWM_1 30541 0>;
duty-cycle = <15270>;
times = <8>;
};
pwm_channel2_conf {
pwms = <&pwm_ab MESON_PWM_3 30500 0>;
duty-cycle = <15250>;
times = <12>;
};
};
sd_emmc_b: sdio@ffe05000 {
sd_emmc_b: sd@ffe05000 {
status = "okay";
compatible = "amlogic, meson-mmc-tm2";
reg = <0xffe05000 0x800>;
interrupts = <0 190 4>;
reg = <0x0 0xffe05000 0x0 0x800>;
interrupts = <0 190 1>;
pinctrl-names = "sdio_all_pins",
"sdio_clk_cmd_pins";
pinctrl-0 = <&sdio_all_pins>;
pinctrl-1 = <&sdio_clk_cmd_pins>;
pinctrl-names = "sd_all_pins",
"sd_clk_cmd_pins",
"sd_1bit_pins";
pinctrl-0 = <&sd_all_pins>;
pinctrl-1 = <&sd_clk_cmd_pins>;
pinctrl-2 = <&sd_1bit_pins>;
clocks = <&clkc CLKID_SD_EMMC_B>,
<&clkc CLKID_SD_EMMC_B_P0_COMP>,
@@ -1241,72 +1193,27 @@
cap-mmc-highspeed;
max-frequency = <100000000>;
disable-wp;
sdio {
pinname = "sdio";
sd {
pinname = "sd";
ocr_avail = <0x200080>; /**VDD voltage 3.3 ~ 3.4 */
caps = "MMC_CAP_4_BIT_DATA",
"MMC_CAP_MMC_HIGHSPEED",
"MMC_CAP_SD_HIGHSPEED",
"MMC_CAP_NONREMOVABLE", /**ptm debug */
"MMC_CAP_UHS_SDR12",
"MMC_CAP_UHS_SDR25",
"MMC_CAP_UHS_SDR50",
"MMC_CAP_UHS_SDR104",
"MMC_PM_KEEP_POWER",
"MMC_CAP_SDIO_IRQ";
"MMC_CAP_SD_HIGHSPEED";
//"MMC_CAP_NONREMOVABLE"; /**ptm debug */
f_min = <400000>;
f_max = <200000000>;
max_req_size = <0x20000>; /**128KB*/
card_type = <3>;
no_sduart = <1>;
gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
card_type = <5>;
/* 3:sdio device(ie:sdio-wifi),
* 4:SD combo (IO+mem) card
*/
};
};
/* sd_emmc_b: sd@ffe05000 {
* status = "okay";
* compatible = "amlogic, meson-mmc-tm2";
* reg = <0xffe05000 0x800>;
* interrupts = <0 190 1>;
*
* pinctrl-names = "sd_all_pins",
* "sd_clk_cmd_pins",
* "sd_1bit_pins";
* pinctrl-0 = <&sd_all_pins>;
* pinctrl-1 = <&sd_clk_cmd_pins>;
* pinctrl-2 = <&sd_1bit_pins>;
*
* clocks = <&clkc CLKID_SD_EMMC_B>,
* <&clkc CLKID_SD_EMMC_B_P0_COMP>,
* <&clkc CLKID_FCLK_DIV2>,
* <&clkc CLKID_FCLK_DIV5>,
* <&xtal>;
* clock-names = "core", "clkin0", "clkin1", "clkin2", "xtal";
*
* bus-width = <4>;
* cap-sd-highspeed;
* cap-mmc-highspeed;
* max-frequency = <100000000>;
* disable-wp;
* sd {
* pinname = "sd";
* ocr_avail = <0x200080>;
* caps = "MMC_CAP_4_BIT_DATA",
* "MMC_CAP_MMC_HIGHSPEED",
* "MMC_CAP_SD_HIGHSPEED";
* f_min = <400000>;
* f_max = <200000000>;
* max_req_size = <0x20000>;
* no_sduart = <1>;
* gpio_dat3 = <&gpio GPIOC_3 GPIO_ACTIVE_HIGH>;
* jtag_pin = <&gpio GPIOC_0 GPIO_ACTIVE_HIGH>;
* gpio_cd = <&gpio GPIOC_10 GPIO_ACTIVE_HIGH>;
* card_type = <5>;
* };
* };
*/
}; /* end of / */
&i2c0 {
@@ -1393,7 +1300,7 @@
compatible = "amlogic, tl1-snd-spdif-a";
#sound-dai-cells = <0>;
clocks = <&clkc CLKID_MPLL1
clocks = <&clkc CLKID_MPLL0
&clkc CLKID_FCLK_DIV4
&clkaudio CLKID_AUDIO_GATE_SPDIFIN
&clkaudio CLKID_AUDIO_GATE_SPDIFOUT_A
@@ -1408,7 +1315,8 @@
pinctrl-names = "spdif_pins",
"spdif_pins_mute";
pinctrl-0 = <&spdifout_a>;
pinctrl-0 = <&spdifout_a &spdifin_a>;
pinctrl-1 = <&spdifout_a_mute>;
/*
@@ -1424,7 +1332,7 @@
* 7: "Enable:192K",
*/
asrc_id = <0>;
auto_asrc = <3>;
auto_asrc = <0>;
status = "okay";
};
@@ -1486,6 +1394,9 @@
&clkaudio CLKID_AUDIO_EQDRC>;
clock-names = "gate", "srcpll", "eqdrc";
eq_enable = <1>;
multiband_drc_enable = <0>;
fullband_drc_enable = <0>;
/*
* 0:tdmout_a
* 1:tdmout_b
@@ -1497,7 +1408,7 @@
/* max 0xf, each bit for one lane, usually one lane */
lane_mask = <0x1>;
/* max 0xff, each bit for one channel */
channel_mask = <0xff>;
channel_mask = <0x3>;
status = "okay";
};
@@ -1577,7 +1488,7 @@
* 0: in user space
* 1: in kernel space
*/
level = <1>;
level = <0>;
status = "disabled";
};
@@ -1594,10 +1505,12 @@
};
tdmout_a: tdmout_a {
mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3 */
mux { /* GPIOZ_1, GPIOZ_2, GPIOZ_3, GPIOZ_5, GPIOZ_6 */
groups = "tdma_sclk_z",
"tdma_fs_z",
"tdma_dout0_z";
"tdma_dout0_z",
"tdma_dout2_z",
"tdma_dout3_z";
function = "tdma_out";
bias-pull-down;
};
@@ -1609,7 +1522,14 @@
function = "tdma_in";
};
};
#if 0 //verify tdm/i2s in
tdmin_a: tdmin_a {
mux { /* GPIOZ_7 */
groups = "tdma_din0_z";
function = "tdma_in";
};
};
#endif
tdmout_c: tdmout_c {
mux { /* GPIODV_7, GPIODV_8, GPIODV_9 */
groups = "tdmc_sclk",
@@ -1690,9 +1610,17 @@
output-low;
};
};
}; /* end of pinctrl_periphs */
&pinctrl_aobus {
spdifout: spdifout {
mux { /* gpiao_10 */
groups = "spdif_out_ao";
function = "spdif_out_ao";
};
};
}; /* end of pinctrl_aobus */
&audio_data{
status = "okay";
};
@@ -1707,14 +1635,14 @@
compatible = "ti,tas5805";
#sound-dai-cells = <0>;
codec_name = "tas5805";
reg = <0x2d>;
reg = <0x0 0x2d>;
status = "disable";
};
ad82584f: ad82584f@62 {
compatible = "ESMT, ad82584f";
#sound-dai-cells = <0>;
reg = <0x31>;
reg = <0x0 0x31>;
status = "okay";
reset_pin = <&gpio_ao GPIOAO_6 0>;
};
@@ -1739,8 +1667,6 @@
};
};
&spifc {
status = "disabled";
spi-nor@0 {
@@ -1886,33 +1812,25 @@
lcd_extern_i2c0: lcd_extern_i2c@0 {
compatible = "lcd_ext, i2c";
dev_name = "i2c_T5800Q";
reg = <0x1c>;
reg = <0x0 0x1c>;
status = "okay";
};
lcd_extern_i2c1: lcd_extern_i2c@1 {
compatible = "lcd_ext, i2c";
dev_name = "i2c_ANX6862";
reg = <0x20>;
reg = <0x0 0x20>;
status = "okay";
};
lcd_extern_i2c2: lcd_extern_i2c@2 {
compatible = "lcd_ext, i2c";
dev_name = "i2c_ANX7911";
reg = <0x74>;
reg = <0x0 0x74>;
status = "okay";
};
};
&pwm_ab {
status = "okay";
};
&pwm_cd {
status = "okay";
};
&efuse {
status = "okay";
};

1806
arch/arm64/boot/dts/amlogic/tm2_t962x3_ab309.dts
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