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rk30:sdk: move analysis to dvfs.c, set low voltage more higher to fit some sdks

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chenxing
2012-04-25 16:40:17 +08:00
parent e53c848a80
commit db7be60b2a
1 changed files with 3 additions and 16 deletions
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19
arch/arm/mach-rk30/board-rk30-sdk.c
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@@ -1420,8 +1420,8 @@ static void __init rk30_reserve(void)
* comments : min arm/logic voltage
*/
static struct dvfs_arm_table dvfs_cpu_logic_table[] = {
{.frequency = 252 * 1000, .cpu_volt = 1025 * 1000, .logic_volt = 1025 * 1000},//0.975V/1.000V
{.frequency = 504 * 1000, .cpu_volt = 1025 * 1000, .logic_volt = 1025 * 1000},//0.975V/1.000V
{.frequency = 252 * 1000, .cpu_volt = 1050 * 1000, .logic_volt = 1050 * 1000},//0.975V/1.000V
{.frequency = 504 * 1000, .cpu_volt = 1050 * 1000, .logic_volt = 1050 * 1000},//0.975V/1.000V
{.frequency = 816 * 1000, .cpu_volt = 1050 * 1000, .logic_volt = 1050 * 1000},//1.000V/1.025V
{.frequency = 1008 * 1000, .cpu_volt = 1050 * 1000, .logic_volt = 1050 * 1000},//1.025V/1.050V
{.frequency = 1200 * 1000, .cpu_volt = 1150 * 1000, .logic_volt = 1100 * 1000},//1.100V/1.050V
@@ -1438,21 +1438,8 @@ static struct cpufreq_frequency_table dep_cpu2core_table[DVFS_CPU_TABLE_SIZE];
void __init board_clock_init(void)
{
int i = 0;
for (i = 0; dvfs_cpu_logic_table[i].frequency != CPUFREQ_TABLE_END; i++) {
cpu_dvfs_table[i].frequency = dvfs_cpu_logic_table[i].frequency;
cpu_dvfs_table[i].index = dvfs_cpu_logic_table[i].cpu_volt;
dep_cpu2core_table[i].frequency = dvfs_cpu_logic_table[i].frequency;
dep_cpu2core_table[i].index = dvfs_cpu_logic_table[i].logic_volt;
}
cpu_dvfs_table[i].frequency = CPUFREQ_TABLE_END;
dep_cpu2core_table[i].frequency = CPUFREQ_TABLE_END;
rk30_clock_data_init(periph_pll_default, codec_pll_default, RK30_CLOCKS_DEFAULT_FLAGS);
dvfs_set_freq_volt_table(clk_get(NULL, "cpu"), cpu_dvfs_table);
dvfs_set_depend_table(clk_get(NULL, "cpu"), "vd_core", dep_cpu2core_table);
dvfs_set_arm_logic_volt(dvfs_cpu_logic_table, cpu_dvfs_table, dep_cpu2core_table);
}
MACHINE_START(RK30, "RK30board")