From dbe730198415181118ecff7a1c35bfe7833ef3d3 Mon Sep 17 00:00:00 2001 From: YouMin Chen Date: Mon, 28 Aug 2017 10:10:42 +0800 Subject: [PATCH] clk: rockchip: remove spin_lock in the rockchip_ddrclk_sip_set_rate Change-Id: Ia3d04aef8fbf8093c2a3a89a845f948f69c8611f Signed-off-by: YouMin Chen Signed-off-by: Elaine Zhang --- drivers/clk/rockchip/clk-ddr.c | 9 +-------- drivers/clk/rockchip/clk.c | 2 +- drivers/clk/rockchip/clk.h | 3 +-- 3 files changed, 3 insertions(+), 11 deletions(-) diff --git a/drivers/clk/rockchip/clk-ddr.c b/drivers/clk/rockchip/clk-ddr.c index 59b387f0a4a3..15838ff49a52 100644 --- a/drivers/clk/rockchip/clk-ddr.c +++ b/drivers/clk/rockchip/clk-ddr.c @@ -39,7 +39,6 @@ struct rockchip_ddrclk { int div_shift; int div_width; int ddr_flag; - spinlock_t *lock; }; #define to_rockchip_ddrclk_hw(hw) container_of(hw, struct rockchip_ddrclk, hw) @@ -93,15 +92,11 @@ static int rk_drm_get_lcdc_type(void) static int rockchip_ddrclk_sip_set_rate(struct clk_hw *hw, unsigned long drate, unsigned long prate) { - struct rockchip_ddrclk *ddrclk = to_rockchip_ddrclk_hw(hw); - unsigned long flags; struct arm_smccc_res res; - spin_lock_irqsave(ddrclk->lock, flags); arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, drate, 0, ROCKCHIP_SIP_CONFIG_DRAM_SET_RATE, 0, 0, 0, 0, &res); - spin_unlock_irqrestore(ddrclk->lock, flags); return res.a0; } @@ -306,8 +301,7 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, u8 num_parents, int mux_offset, int mux_shift, int mux_width, int div_shift, int div_width, - int ddr_flag, void __iomem *reg_base, - spinlock_t *lock) + int ddr_flag, void __iomem *reg_base) { struct rockchip_ddrclk *ddrclk; struct clk_init_data init; @@ -341,7 +335,6 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, } ddrclk->reg_base = reg_base; - ddrclk->lock = lock; ddrclk->hw.init = &init; ddrclk->mux_offset = mux_offset; ddrclk->mux_shift = mux_shift; diff --git a/drivers/clk/rockchip/clk.c b/drivers/clk/rockchip/clk.c index 1ab8f544617c..df4e1fe6b33f 100644 --- a/drivers/clk/rockchip/clk.c +++ b/drivers/clk/rockchip/clk.c @@ -588,7 +588,7 @@ void __init rockchip_clk_register_branches( list->muxdiv_offset, list->mux_shift, list->mux_width, list->div_shift, list->div_width, list->div_flags, - ctx->reg_base, &ctx->lock); + ctx->reg_base); break; } diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 9c4bb8712a95..105015253ef0 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -368,8 +368,7 @@ struct clk *rockchip_clk_register_ddrclk(const char *name, int flags, u8 num_parents, int mux_offset, int mux_shift, int mux_width, int div_shift, int div_width, - int ddr_flags, void __iomem *reg_base, - spinlock_t *lock); + int ddr_flags, void __iomem *reg_base); #define ROCKCHIP_INVERTER_HIWORD_MASK BIT(0)