diff --git a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
index 9f533676498b..372d64661d24 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rv1126b.dtsi
@@ -32,6 +32,9 @@
 		i2c3 = &i2c3;
 		i2c4 = &i2c4;
 		i2c5 = &i2c5;
+		mmc0 = &emmc;
+		mmc1 = &sdmmc0;
+		mmc2 = &sdmmc1;
 		serial0 = &uart0;
 	};
 
@@ -370,6 +373,17 @@
 		interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
+	emmc: mmc@21470000 {
+		compatible = "rockchip,rv1126b-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x21470000 0x4000>;
+		interrupts = <GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_EMMC>, <&cru CCLK_EMMC>;
+		clock-names = "biu", "ciu";
+		fifo-depth = <0x100>;
+		max-frequency = <200000000>;
+		status = "disabled";
+	};
+
 	can0: can@21d40000 {
 		compatible = "rockchip,rv1126b-canfd";
 		reg = <0x21d40000 0x1000>;
@@ -396,6 +410,33 @@
 		status = "disabled";
 	};
 
+	sdmmc0: mmc@21d60000 {
+		compatible = "rockchip,rv1126b-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x21d60000 0x4000>;
+		interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC0>, <&cru CCLK_SDMMC0>;
+		clock-names = "biu", "ciu";
+		fifo-depth = <0x100>;
+		max-frequency = <200000000>;
+		pinctrl-names = "normal", "idle";
+		pinctrl-0 = <&sdmmc0_clk_pins &sdmmc0_cmd_pins &sdmmc0_detn_pins &sdmmc0_bus4_pins>;
+		pinctrl-1 = <&sdmmc0_idle_pins &sdmmc0_detn_pins>;
+		status = "disabled";
+	};
+
+	sdmmc1: mmc@21f60000 {
+		compatible = "rockchip,rv1126b-dw-mshc", "rockchip,rk3288-dw-mshc";
+		reg = <0x21f60000 0x4000>;
+		interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_SDMMC1>, <&cru CCLK_SDMMC1>;
+		clock-names = "biu", "ciu";
+		fifo-depth = <0x100>;
+		max-frequency = <200000000>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sdmmc1_clk_pins &sdmmc1_cmd_pins &sdmmc1_detn_pins &sdmmc1_bus4_pins>;
+		status = "disabled";
+	};
+
 	hw_decompress: decompress@22100000 {
 		compatible = "rockchip,hw-decompress";
 		reg = <0x22100000 0x1000>;