From ddacbfc334f4c6790dc42d99a8754d36837827b6 Mon Sep 17 00:00:00 2001 From: Liang Chen Date: Thu, 19 May 2022 20:56:10 +0800 Subject: [PATCH] ARM: dts: rockchip: rv1106: assign clock frequency for pvtpll Change-Id: Ib48f003b4ce5a0cc55f60eb8aa121750588e5837 Signed-off-by: Liang Chen --- arch/arm/boot/dts/rv1106.dtsi | 40 +++++++++++++++++++++++++++++------ 1 file changed, 33 insertions(+), 7 deletions(-) diff --git a/arch/arm/boot/dts/rv1106.dtsi b/arch/arm/boot/dts/rv1106.dtsi index bdfbedada2f7..7d8a17e4e7ed 100644 --- a/arch/arm/boot/dts/rv1106.dtsi +++ b/arch/arm/boot/dts/rv1106.dtsi @@ -62,6 +62,39 @@ spi2 = &sfc; }; + clocks { + compatible = "simple-bus"; + + cpu_pvtpll: cpu-pvtpll { + compatible = "fixed-clock"; + clock-frequency = <1300000000>; + clock-output-names = "cpu_pvtpll"; + #clock-cells = <0>; + status = "disabled"; + }; + + rkvenc_pvtpll: pvtpll-0 { + compatible = "fixed-clock"; + clock-frequency = <410000000>; + clock-output-names = "clk_pvtpll_0"; + #clock-cells = <0>; + }; + + npu_pvtpll: pvtpll-1 { + compatible = "fixed-clock"; + clock-frequency = <420000000>; + clock-output-names = "clk_pvtpll_1"; + #clock-cells = <0>; + }; + + xin24m: oscillator { + compatible = "fixed-clock"; + clock-frequency = <24000000>; + clock-output-names = "xin24m"; + #clock-cells = <0>; + }; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -294,13 +327,6 @@ clock-frequency = <24000000>; }; - xin24m: oscillator { - compatible = "fixed-clock"; - clock-frequency = <24000000>; - clock-output-names = "xin24m"; - #clock-cells = <0>; - }; - grf: syscon@ff000000 { compatible = "rockchip,rv1106-grf", "syscon", "simple-mfd"; reg = <0xff000000 0x68000>;