From ddaecd89d2ae5ef682667867fbb003e962622d1d Mon Sep 17 00:00:00 2001 From: Guochun Huang Date: Wed, 19 Oct 2022 05:56:00 +0000 Subject: [PATCH] drm/rockchip: dsi: add rk312x support Signed-off-by: Guochun Huang Change-Id: Iedf823a62e28b760444f064d6ccfed6a4fe5f36c --- .../gpu/drm/rockchip/dw-mipi-dsi-rockchip.c | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c index 6922f56d1fad..015f983ad39e 100644 --- a/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw-mipi-dsi-rockchip.c @@ -149,6 +149,11 @@ #define PX30_DSI_TURNDISABLE BIT(5) #define PX30_DSI_LCDC_SEL BIT(0) +#define RK3128_GRF_LVDS_CON0 0x0150 +#define RK3128_DSI_FORCETXSTOPMODE (0xf << 10) +#define RK3128_DSI_FORCERXMODE (0x1 << 9) +#define RK3128_DSI_TURNDISABLE (0x1 << 8) + #define RK3288_GRF_SOC_CON6 0x025c #define RK3288_DSI0_LCDC_SEL BIT(6) #define RK3288_DSI1_LCDC_SEL BIT(9) @@ -213,6 +218,7 @@ enum { enum soc_type { PX30, + RK3128, RK3288, RK3399, RK3568, @@ -1283,6 +1289,21 @@ static const struct rockchip_dw_dsi_chip_data px30_chip_data[] = { { /* sentinel */ } }; +static const struct rockchip_dw_dsi_chip_data rk3128_chip_data[] = { + { + .reg = 0x10110000, + .lanecfg1_grf_reg = RK3128_GRF_LVDS_CON0, + .lanecfg1 = HIWORD_UPDATE(0, RK3128_DSI_TURNDISABLE | + RK3128_DSI_FORCETXSTOPMODE | + RK3128_DSI_FORCERXMODE), + .flags = DW_MIPI_NEEDS_HCLK, + .max_data_lanes = 4, + .max_bit_rate_per_lane = 1000000000UL, + .soc_type = RK3128, + }, + { /* sentinel */ } +}; + static const struct rockchip_dw_dsi_chip_data rk3288_chip_data[] = { { .reg = 0xff960000, @@ -1407,6 +1428,9 @@ static const struct of_device_id dw_mipi_dsi_rockchip_dt_ids[] = { { .compatible = "rockchip,px30-mipi-dsi", .data = &px30_chip_data, + }, { + .compatible = "rockchip,rk3128-mipi-dsi", + .data = &rk3128_chip_data, }, { .compatible = "rockchip,rk3288-mipi-dsi", .data = &rk3288_chip_data,