From deb2de164b73fd609532e7ae5a04b1fe7e3fbc32 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Thu, 9 Feb 2023 15:27:01 +0800 Subject: [PATCH] clk: rockchip: rk3562: Add ROCKCHIP_PLL_ALLOW_POWER_DOWN flag Signed-off-by: Finley Xiao Change-Id: I7047fee17bd26e6b23fb84b431010880ff577276 --- drivers/clk/rockchip/clk-pll.c | 7 +++++-- drivers/clk/rockchip/clk.h | 1 + 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/drivers/clk/rockchip/clk-pll.c b/drivers/clk/rockchip/clk-pll.c index 15e41d50f107..91a067401967 100644 --- a/drivers/clk/rockchip/clk-pll.c +++ b/drivers/clk/rockchip/clk-pll.c @@ -1685,8 +1685,11 @@ struct clk *rockchip_clk_register_pll(struct rockchip_clk_provider *ctx, init.name = pll_name; #ifndef CONFIG_ROCKCHIP_LOW_PERFORMANCE - /* keep all plls untouched for now */ - init.flags = flags | CLK_IGNORE_UNUSED; + if (clk_pll_flags & ROCKCHIP_PLL_ALLOW_POWER_DOWN) + init.flags = flags; + else + /* keep all plls untouched for now */ + init.flags = flags | CLK_IGNORE_UNUSED; #else init.flags = flags; #endif diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index 4ace4dfb0a3f..79852e59a0c7 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -578,6 +578,7 @@ struct rockchip_pll_clock { #define ROCKCHIP_PLL_SYNC_RATE BIT(0) /* normal mode only. now only for pll_rk3036, pll_rk3328 type */ #define ROCKCHIP_PLL_FIXED_MODE BIT(1) +#define ROCKCHIP_PLL_ALLOW_POWER_DOWN BIT(2) #define PLL(_type, _id, _name, _pnames, _flags, _con, _mode, _mshift, \ _lshift, _pflags, _rtable) \