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tvin: vdin: add vdin1 scaler preview for vdin0 preview [1/1]
PD#SWPL-4115 Problem: vdin preview error when input 4K Solution: use vdin1 as double write function Verify: x301 Change-Id: I4ed15dd5c445ed3c38b4a2535be075210dcbdac7 Signed-off-by: Xuhua Zhang <xuhua.zhang@amlogic.com>
This commit is contained in:
@@ -953,7 +953,7 @@ static void vdin_dump_state(struct vdin_dev_s *devp)
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devp->afbce_info->frame_body_size);
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devp->afbce_info->frame_body_size);
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}
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}
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}
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}
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pr_info("tl1 preview flag = %d\n", tl1_vdin1_preview_flag);
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pr_info("Vdin driver version : %s\n", VDIN_VER);
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pr_info("Vdin driver version : %s\n", VDIN_VER);
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}
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}
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@@ -78,9 +78,15 @@ static unsigned int vdin_addr_offset[VDIN_MAX_DEVS] = {0, 0x80};
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static struct vdin_dev_s *vdin_devp[VDIN_MAX_DEVS];
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static struct vdin_dev_s *vdin_devp[VDIN_MAX_DEVS];
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static unsigned long mem_start, mem_end;
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static unsigned long mem_start, mem_end;
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static unsigned int use_reserved_mem;
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static unsigned int use_reserved_mem;
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static int afbc_init_flag;
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static int afbc_init_flag[VDIN_MAX_DEVS];
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static int afbc_write_down_flag;
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static int afbc_write_down_flag[VDIN_MAX_DEVS];
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static unsigned int pr_times;
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static unsigned int pr_times;
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unsigned int tl1_vdin1_preview_flag;
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static unsigned int tl1_vdin1_data_readied;
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static unsigned int tl1_vdin1_canvas_addr;
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static unsigned int tl1_vdin1_height;
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static unsigned int tl1_vdin1_width;
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spinlock_t tl1_preview_lock;
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/*
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/*
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* canvas_config_mode
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* canvas_config_mode
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* 0: canvas_config in driver probe
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* 0: canvas_config in driver probe
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@@ -89,12 +95,12 @@ static unsigned int pr_times;
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*/
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*/
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static int canvas_config_mode = 2;
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static int canvas_config_mode = 2;
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static bool work_mode_simple;
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static bool work_mode_simple;
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static int max_ignore_frames = 2;
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static int phase_lock_flag;
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static int phase_lock_flag;
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static int max_ignore_frames[2] = {2, 2};
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/*game_mode_switch_frames:min num is 5 by 1080p60hz input test*/
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/*game_mode_switch_frames:min num is 5 by 1080p60hz input test*/
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static int game_mode_switch_frames = 10;
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static int game_mode_switch_frames = 10;
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static int game_mode_phlock_switch_frames = 60;
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static int game_mode_phlock_switch_frames = 60;
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static int ignore_frames;
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static int ignore_frames[2] = {0, 0};
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static unsigned int dv_work_delby;
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static unsigned int dv_work_delby;
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/* viu isr select:
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/* viu isr select:
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* enable viu_hw_irq for the bandwidth is enough on gxbb/gxtvbb and laters ic
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* enable viu_hw_irq for the bandwidth is enough on gxbb/gxtvbb and laters ic
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@@ -109,11 +115,11 @@ MODULE_PARM_DESC(canvas_config_mode, "canvas configure mode");
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module_param(work_mode_simple, bool, 0664);
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module_param(work_mode_simple, bool, 0664);
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MODULE_PARM_DESC(work_mode_simple, "enable/disable simple work mode");
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MODULE_PARM_DESC(work_mode_simple, "enable/disable simple work mode");
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module_param(max_ignore_frames, int, 0664);
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//module_param(max_ignore_frames, int, 0664);
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MODULE_PARM_DESC(max_ignore_frames, "ignore first <n> frames");
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//MODULE_PARM_DESC(max_ignore_frames, "ignore first <n> frames");
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module_param(ignore_frames, int, 0664);
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//module_param(ignore_frames, int, 0664);
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MODULE_PARM_DESC(ignore_frames, "ignore first <n> frames");
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//MODULE_PARM_DESC(ignore_frames, "ignore first <n> frames");
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module_param(dv_work_delby, uint, 0664);
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module_param(dv_work_delby, uint, 0664);
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MODULE_PARM_DESC(dv_work_delby, "dv_work_delby");
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MODULE_PARM_DESC(dv_work_delby, "dv_work_delby");
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@@ -230,8 +236,11 @@ int vdin_open_fe(enum tvin_port_e port, int index, struct vdin_dev_s *devp)
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if (devp->msr_clk != NULL)
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if (devp->msr_clk != NULL)
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clk_prepare_enable(devp->msr_clk);
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clk_prepare_enable(devp->msr_clk);
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if (devp->frontend->dec_ops && devp->frontend->dec_ops->open)
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if (tl1_vdin1_preview_flag == 0) {
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ret = devp->frontend->dec_ops->open(devp->frontend, port);
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if (devp->frontend->dec_ops && devp->frontend->dec_ops->open)
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ret =
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devp->frontend->dec_ops->open(devp->frontend, port);
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}
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/* check open status */
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/* check open status */
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if (ret)
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if (ret)
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return 1;
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return 1;
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@@ -535,7 +544,7 @@ void vdin_start_dec(struct vdin_dev_s *devp)
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}
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}
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#endif
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#endif
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afbc_write_down_flag = 0;
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afbc_write_down_flag[devp->index] = 0;
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/* h_active/v_active will be used by bellow calling */
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/* h_active/v_active will be used by bellow calling */
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if (devp->afbce_mode == 0) {
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if (devp->afbce_mode == 0) {
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if (canvas_config_mode == 1)
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if (canvas_config_mode == 1)
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@@ -663,6 +672,13 @@ void vdin_start_dec(struct vdin_dev_s *devp)
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pr_info("vdin.%d start time: %ums, run time:%ums.\n",
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pr_info("vdin.%d start time: %ums, run time:%ums.\n",
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devp->index, jiffies_to_msecs(jiffies),
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devp->index, jiffies_to_msecs(jiffies),
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jiffies_to_msecs(jiffies)-devp->start_time);
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jiffies_to_msecs(jiffies)-devp->start_time);
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if ((devp->afbce_mode == 1) && is_meson_tl1_cpu() &&
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(devp->h_active >= 1920) && (devp->v_active >= 1080)) {
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spin_lock_init(&tl1_preview_lock);
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tl1_vdin1_preview_flag = 1;
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max_ignore_frames[devp->index] = 9;
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}
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}
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}
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/*
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/*
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@@ -687,10 +703,12 @@ void vdin_stop_dec(struct vdin_dev_s *devp)
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}
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}
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#endif
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#endif
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disable_irq_nosync(devp->irq);
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disable_irq_nosync(devp->irq);
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afbc_init_flag = 0;
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afbc_init_flag[devp->index] = 0;
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max_ignore_frames[devp->index] = 2;
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if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
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if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
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while (++afbc_write_down_flag < afbc_write_down_test_times) {
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while (++afbc_write_down_flag[devp->index] <
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afbc_write_down_test_times) {
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if (vdin_afbce_read_writedown_flag() == 0)
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if (vdin_afbce_read_writedown_flag() == 0)
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usleep_range(5000, 5001);
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usleep_range(5000, 5001);
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else
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else
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@@ -742,8 +760,9 @@ void vdin_stop_dec(struct vdin_dev_s *devp)
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rdma_clear(devp->rdma_handle);
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rdma_clear(devp->rdma_handle);
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#endif
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#endif
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devp->flags &= (~VDIN_FLAG_RDMA_ENABLE);
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devp->flags &= (~VDIN_FLAG_RDMA_ENABLE);
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ignore_frames = 0;
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ignore_frames[devp->index] = 0;
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devp->cycle = 0;
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devp->cycle = 0;
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/* clear color para*/
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/* clear color para*/
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memset(&devp->prop, 0, sizeof(devp->prop));
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memset(&devp->prop, 0, sizeof(devp->prop));
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if (time_en)
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if (time_en)
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@@ -771,6 +790,12 @@ int start_tvin_service(int no, struct vdin_parm_s *para)
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__func__, no);
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__func__, no);
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return -1;
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return -1;
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}
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}
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if (tl1_vdin1_preview_flag == 1) {
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pr_err("[vdin]%s vdin%d use for preview, return.\n",
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__func__, no);
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return -1;
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}
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fmt = devp->parm.info.fmt;
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fmt = devp->parm.info.fmt;
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if (vdin_dbg_en) {
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if (vdin_dbg_en) {
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pr_info("**[%s]cfmt:%d;dfmt:%d;dest_hactive:%d;",
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pr_info("**[%s]cfmt:%d;dfmt:%d;dest_hactive:%d;",
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@@ -1307,7 +1332,7 @@ static void vdin_hist_tgt(struct vdin_dev_s *devp, struct vframe_s *vf)
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*/
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*/
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irqreturn_t vdin_isr(int irq, void *dev_id)
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irqreturn_t vdin_isr(int irq, void *dev_id)
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{
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{
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ulong flags = 0;
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ulong flags = 0, flags1 = 0;
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struct vdin_dev_s *devp = (struct vdin_dev_s *)dev_id;
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struct vdin_dev_s *devp = (struct vdin_dev_s *)dev_id;
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enum tvin_sm_status_e state;
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enum tvin_sm_status_e state;
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@@ -1349,15 +1374,15 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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offset = devp->addr_offset;
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offset = devp->addr_offset;
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if (afbc_init_flag == 0) {
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if (afbc_init_flag[devp->index] == 0) {
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afbc_init_flag = 1;
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afbc_init_flag[devp->index] = 1;
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/*set mem power on*/
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/*set mem power on*/
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if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
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if (is_meson_tl1_cpu() && (devp->afbce_mode == 1)) {
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vdin_afbce_hw_enable(devp);
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vdin_afbce_hw_enable(devp);
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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} else if (afbc_init_flag == 1) {
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} else if (afbc_init_flag[devp->index] == 1) {
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afbc_init_flag = 2;
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afbc_init_flag[devp->index] = 2;
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if (is_meson_tl1_cpu() && (devp->afbce_mode == 1))
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if (is_meson_tl1_cpu() && (devp->afbce_mode == 1))
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return IRQ_HANDLED;
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return IRQ_HANDLED;
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}
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}
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@@ -1412,6 +1437,27 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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devp->dv.dv_crc_check = true;
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devp->dv.dv_crc_check = true;
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if ((devp->dv.dv_crc_check == true) ||
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if ((devp->dv.dv_crc_check == true) ||
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(!(dv_dbg_mask & DV_CRC_CHECK))) {
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(!(dv_dbg_mask & DV_CRC_CHECK))) {
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spin_lock_irqsave(&tl1_preview_lock, flags1);
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if ((devp->index == 0) &&
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(tl1_vdin1_preview_flag == 1)) {
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if (tl1_vdin1_data_readied == 1) {
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tl1_vdin1_data_readied = 0;
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devp->last_wr_vfe->vf.canvas0Addr =
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tl1_vdin1_canvas_addr;
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devp->last_wr_vfe->vf.height =
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tl1_vdin1_height;
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devp->last_wr_vfe->vf.width =
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tl1_vdin1_width;
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}
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} else if ((devp->index == 1) &&
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(tl1_vdin1_preview_flag == 1)) {
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tl1_vdin1_canvas_addr =
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devp->last_wr_vfe->vf.canvas0Addr;
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tl1_vdin1_height = devp->last_wr_vfe->vf.height;
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tl1_vdin1_width = devp->last_wr_vfe->vf.width;
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tl1_vdin1_data_readied = 1;
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}
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spin_unlock_irqrestore(&tl1_preview_lock, flags1);
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provider_vf_put(devp->last_wr_vfe, devp->vfp);
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provider_vf_put(devp->last_wr_vfe, devp->vfp);
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if (time_en) {
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if (time_en) {
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devp->last_wr_vfe->vf.ready_clock[1] =
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devp->last_wr_vfe->vf.ready_clock[1] =
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@@ -1431,16 +1477,23 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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vdin_vf_disp_mode_update(devp->last_wr_vfe, devp->vfp);
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vdin_vf_disp_mode_update(devp->last_wr_vfe, devp->vfp);
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devp->last_wr_vfe = NULL;
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devp->last_wr_vfe = NULL;
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if ((devp->index == 1) && (tl1_vdin1_preview_flag == 1)) {
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//if (vdin_dbg_en)
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//pr_info("vdin1 preview dont notify receiver.\n");
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} else {
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#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
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#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
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if (((devp->dv.dolby_input & (1 << devp->index)) ||
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if (((devp->dv.dolby_input & (1 << devp->index)) ||
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(devp->dv.dv_flag && is_dolby_vision_enable())) &&
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(devp->dv.dv_flag && is_dolby_vision_enable()))
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(devp->dv.dv_config == true))
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&& (devp->dv.dv_config == true))
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vf_notify_receiver("dv_vdin",
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vf_notify_receiver("dv_vdin",
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VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
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VFRAME_EVENT_PROVIDER_VFRAME_READY,
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else
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NULL);
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else
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#endif
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#endif
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vf_notify_receiver(devp->name,
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vf_notify_receiver(devp->name,
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VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
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VFRAME_EVENT_PROVIDER_VFRAME_READY,
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NULL);
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}
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}
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}
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/*check vs is valid base on the time during continuous vs*/
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/*check vs is valid base on the time during continuous vs*/
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if (vdin_check_cycle(devp) && (!(isr_flag & VDIN_BYPASS_CYC_CHECK))
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if (vdin_check_cycle(devp) && (!(isr_flag & VDIN_BYPASS_CYC_CHECK))
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@@ -1514,7 +1567,7 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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pre_prop->vdin_hdr_Flag = prop->vdin_hdr_Flag;
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pre_prop->vdin_hdr_Flag = prop->vdin_hdr_Flag;
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pre_prop->color_fmt_range = prop->color_fmt_range;
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pre_prop->color_fmt_range = prop->color_fmt_range;
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pre_prop->dest_cfmt = prop->dest_cfmt;
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pre_prop->dest_cfmt = prop->dest_cfmt;
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ignore_frames = 0;
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ignore_frames[devp->index] = 0;
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vdin_drop_cnt++;
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vdin_drop_cnt++;
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goto irq_handled;
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goto irq_handled;
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}
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}
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@@ -1549,8 +1602,8 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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VFRAME_PHASE_DB : VFRAME_PHASE_DR;
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VFRAME_PHASE_DB : VFRAME_PHASE_DR;
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if (ignore_frames < max_ignore_frames) {
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if (ignore_frames[devp->index] < max_ignore_frames[devp->index]) {
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ignore_frames++;
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ignore_frames[devp->index]++;
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devp->vdin_irq_flag = 12;
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devp->vdin_irq_flag = 12;
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vdin_drop_cnt++;
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vdin_drop_cnt++;
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goto irq_handled;
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goto irq_handled;
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@@ -1561,27 +1614,43 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
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devp->vdin_irq_flag = 13;
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devp->vdin_irq_flag = 13;
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vdin_drop_cnt++;
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vdin_drop_cnt++;
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if (devp->flags&VDIN_FLAG_RDMA_ENABLE)
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if (devp->flags&VDIN_FLAG_RDMA_ENABLE)
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ignore_frames = 0;
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ignore_frames[devp->index] = 0;
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goto irq_handled;
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goto irq_handled;
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}
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}
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|
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next_wr_vfe = provider_vf_peek(devp->vfp);
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next_wr_vfe = provider_vf_peek(devp->vfp);
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if (!next_wr_vfe) {
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if (!next_wr_vfe) {
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devp->vdin_irq_flag = 14;
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/*add for force vdin buffer recycle*/
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vdin_drop_cnt++;
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if (devp->flags & VDIN_FLAG_FORCE_RECYCLE) {
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vf_drop_cnt = vdin_drop_cnt;/*avoid do skip*/
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next_wr_vfe = receiver_vf_get(devp->vfp);
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goto irq_handled;
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if (next_wr_vfe)
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receiver_vf_put(&next_wr_vfe->vf, devp->vfp);
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else
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pr_err("[vdin.%d]force recycle error,no buffer in ready list",
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devp->index);
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} else {
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devp->vdin_irq_flag = 14;
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vdin_drop_cnt++;
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vf_drop_cnt = vdin_drop_cnt;/*avoid do skip*/
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goto irq_handled;
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}
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}
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}
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|
|
||||||
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if ((devp->index == 1) && (tl1_vdin1_preview_flag == 1)) {
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//if (vdin_dbg_en)
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//pr_info("vdin1 preview dont notify receiver.\n");
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} else {
|
||||||
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
|
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
|
||||||
if (((devp->dv.dolby_input & (1 << devp->index)) ||
|
if (((devp->dv.dolby_input & (1 << devp->index)) ||
|
||||||
(devp->dv.dv_flag && is_dolby_vision_enable())) &&
|
(devp->dv.dv_flag && is_dolby_vision_enable())) &&
|
||||||
(devp->dv.dv_config == true))
|
(devp->dv.dv_config == true))
|
||||||
vdin2nr = vf_notify_receiver("dv_vdin",
|
vdin2nr = vf_notify_receiver("dv_vdin",
|
||||||
VFRAME_EVENT_PROVIDER_QUREY_VDIN2NR, NULL);
|
VFRAME_EVENT_PROVIDER_QUREY_VDIN2NR, NULL);
|
||||||
else
|
else
|
||||||
#endif
|
#endif
|
||||||
vdin2nr = vf_notify_receiver(devp->name,
|
vdin2nr = vf_notify_receiver(devp->name,
|
||||||
VFRAME_EVENT_PROVIDER_QUREY_VDIN2NR, NULL);
|
VFRAME_EVENT_PROVIDER_QUREY_VDIN2NR, NULL);
|
||||||
|
}
|
||||||
/*if vdin-nr,di must get
|
/*if vdin-nr,di must get
|
||||||
* vdin current field type which di pre will read
|
* vdin current field type which di pre will read
|
||||||
*/
|
*/
|
||||||
@@ -1658,8 +1727,32 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
|
|||||||
vdin_dolby_addr_update(devp, next_wr_vfe->vf.index);
|
vdin_dolby_addr_update(devp, next_wr_vfe->vf.index);
|
||||||
} else
|
} else
|
||||||
devp->dv.dv_crc_check = true;
|
devp->dv.dv_crc_check = true;
|
||||||
|
|
||||||
if ((devp->dv.dv_crc_check == true) ||
|
if ((devp->dv.dv_crc_check == true) ||
|
||||||
(!(dv_dbg_mask & DV_CRC_CHECK))) {
|
(!(dv_dbg_mask & DV_CRC_CHECK))) {
|
||||||
|
spin_lock_irqsave(&tl1_preview_lock, flags1);
|
||||||
|
if ((devp->index == 0) &&
|
||||||
|
(tl1_vdin1_preview_flag == 1)) {
|
||||||
|
if (tl1_vdin1_data_readied == 1) {
|
||||||
|
tl1_vdin1_data_readied = 0;
|
||||||
|
curr_wr_vfe->vf.canvas0Addr =
|
||||||
|
tl1_vdin1_canvas_addr;
|
||||||
|
curr_wr_vfe->vf.height =
|
||||||
|
tl1_vdin1_height;
|
||||||
|
curr_wr_vfe->vf.width =
|
||||||
|
tl1_vdin1_width;
|
||||||
|
}
|
||||||
|
} else if ((devp->index == 1) &&
|
||||||
|
(tl1_vdin1_preview_flag == 1)) {
|
||||||
|
tl1_vdin1_canvas_addr =
|
||||||
|
curr_wr_vfe->vf.canvas0Addr;
|
||||||
|
tl1_vdin1_height =
|
||||||
|
curr_wr_vfe->vf.height;
|
||||||
|
tl1_vdin1_width =
|
||||||
|
curr_wr_vfe->vf.width;
|
||||||
|
tl1_vdin1_data_readied = 1;
|
||||||
|
}
|
||||||
|
spin_unlock_irqrestore(&tl1_preview_lock, flags1);
|
||||||
provider_vf_put(curr_wr_vfe, devp->vfp);
|
provider_vf_put(curr_wr_vfe, devp->vfp);
|
||||||
if (vdin_dbg_en) {
|
if (vdin_dbg_en) {
|
||||||
curr_wr_vfe->vf.ready_clock[1] = sched_clock();
|
curr_wr_vfe->vf.ready_clock[1] = sched_clock();
|
||||||
@@ -1743,25 +1836,63 @@ irqreturn_t vdin_isr(int irq, void *dev_id)
|
|||||||
|
|
||||||
if (!(devp->flags&VDIN_FLAG_RDMA_ENABLE) ||
|
if (!(devp->flags&VDIN_FLAG_RDMA_ENABLE) ||
|
||||||
(devp->game_mode & VDIN_GAME_MODE_1)) {
|
(devp->game_mode & VDIN_GAME_MODE_1)) {
|
||||||
|
if ((devp->index == 1) && (tl1_vdin1_preview_flag == 1)) {
|
||||||
|
//if (vdin_dbg_en)
|
||||||
|
//pr_info("vdin1 preview dont notify receiver.\n");
|
||||||
|
} else {
|
||||||
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
|
#ifdef CONFIG_AMLOGIC_MEDIA_ENHANCEMENT_DOLBYVISION
|
||||||
if (((devp->dv.dolby_input & (1 << devp->index)) ||
|
if (((devp->dv.dolby_input & (1 << devp->index)) ||
|
||||||
(devp->dv.dv_flag && is_dolby_vision_enable())) &&
|
(devp->dv.dv_flag && is_dolby_vision_enable()))
|
||||||
(devp->dv.dv_config == true))
|
&& (devp->dv.dv_config == true))
|
||||||
vf_notify_receiver("dv_vdin",
|
vf_notify_receiver("dv_vdin",
|
||||||
VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
|
VFRAME_EVENT_PROVIDER_VFRAME_READY,
|
||||||
else
|
NULL);
|
||||||
|
else
|
||||||
#endif
|
#endif
|
||||||
|
vf_notify_receiver(devp->name,
|
||||||
|
VFRAME_EVENT_PROVIDER_VFRAME_READY,
|
||||||
|
NULL);
|
||||||
|
}
|
||||||
|
} else if (devp->game_mode & VDIN_GAME_MODE_2) {
|
||||||
|
spin_lock_irqsave(&tl1_preview_lock, flags1);
|
||||||
|
if ((devp->index == 0) &&
|
||||||
|
(tl1_vdin1_preview_flag == 1)) {
|
||||||
|
if (tl1_vdin1_data_readied == 1) {
|
||||||
|
tl1_vdin1_data_readied = 0;
|
||||||
|
next_wr_vfe->vf.canvas0Addr =
|
||||||
|
tl1_vdin1_canvas_addr;
|
||||||
|
next_wr_vfe->vf.height =
|
||||||
|
tl1_vdin1_height;
|
||||||
|
next_wr_vfe->vf.width =
|
||||||
|
tl1_vdin1_width;
|
||||||
|
}
|
||||||
|
} else if ((devp->index == 1) &&
|
||||||
|
(tl1_vdin1_preview_flag == 1)) {
|
||||||
|
tl1_vdin1_canvas_addr =
|
||||||
|
next_wr_vfe->vf.canvas0Addr;
|
||||||
|
tl1_vdin1_height =
|
||||||
|
next_wr_vfe->vf.height;
|
||||||
|
tl1_vdin1_width =
|
||||||
|
next_wr_vfe->vf.width;
|
||||||
|
tl1_vdin1_data_readied = 1;
|
||||||
|
}
|
||||||
|
spin_unlock_irqrestore(&tl1_preview_lock, flags1);
|
||||||
|
provider_vf_put(next_wr_vfe, devp->vfp);
|
||||||
|
if ((devp->index == 1) && (tl1_vdin1_preview_flag == 1)) {
|
||||||
|
//if (vdin_dbg_en)
|
||||||
|
//pr_info("vdin1 preview dont notify receiver.\n");
|
||||||
|
} else {
|
||||||
vf_notify_receiver(devp->name,
|
vf_notify_receiver(devp->name,
|
||||||
VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
|
VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
|
||||||
} else if (devp->game_mode & VDIN_GAME_MODE_2) {
|
if (vdin_dbg_en) {
|
||||||
provider_vf_put(next_wr_vfe, devp->vfp);
|
next_wr_vfe->vf.ready_clock[1] =
|
||||||
vf_notify_receiver(devp->name,
|
sched_clock();
|
||||||
VFRAME_EVENT_PROVIDER_VFRAME_READY, NULL);
|
pr_info("vdin put latency %lld us.first %lld us\n",
|
||||||
if (vdin_dbg_en) {
|
func_div(next_wr_vfe->vf.ready_clock[1],
|
||||||
next_wr_vfe->vf.ready_clock[1] = sched_clock();
|
1000),
|
||||||
pr_info("vdin put latency %lld us. first %lld us.\n",
|
func_div(next_wr_vfe->vf.ready_clock[0],
|
||||||
func_div(next_wr_vfe->vf.ready_clock[1], 1000),
|
1000));
|
||||||
func_div(next_wr_vfe->vf.ready_clock[0], 1000));
|
}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
devp->frame_cnt++;
|
devp->frame_cnt++;
|
||||||
@@ -2060,6 +2191,7 @@ static int vdin_open(struct inode *inode, struct file *file)
|
|||||||
static int vdin_release(struct inode *inode, struct file *file)
|
static int vdin_release(struct inode *inode, struct file *file)
|
||||||
{
|
{
|
||||||
struct vdin_dev_s *devp = file->private_data;
|
struct vdin_dev_s *devp = file->private_data;
|
||||||
|
struct vdin_dev_s *devp_vdin1 = vdin_devp[1];
|
||||||
|
|
||||||
if (!(devp->flags & VDIN_FLAG_FS_OPENED)) {
|
if (!(devp->flags & VDIN_FLAG_FS_OPENED)) {
|
||||||
if (vdin_dbg_en)
|
if (vdin_dbg_en)
|
||||||
@@ -2093,6 +2225,28 @@ static int vdin_release(struct inode *inode, struct file *file)
|
|||||||
|
|
||||||
file->private_data = NULL;
|
file->private_data = NULL;
|
||||||
|
|
||||||
|
if (tl1_vdin1_preview_flag == 1) {
|
||||||
|
tl1_vdin1_preview_flag = 0;
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_FS_OPENED);
|
||||||
|
if (devp_vdin1->flags & VDIN_FLAG_DEC_STARTED) {
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_DEC_STOP_ISR;
|
||||||
|
vdin_stop_dec(devp_vdin1);
|
||||||
|
/* init flag */
|
||||||
|
devp_vdin1->flags &= ~VDIN_FLAG_DEC_STOP_ISR;
|
||||||
|
/* clear the flag of decode started */
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_DEC_STARTED);
|
||||||
|
}
|
||||||
|
if (devp_vdin1->flags & VDIN_FLAG_DEC_OPENED) {
|
||||||
|
vdin_close_fe(devp_vdin1);
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_DEC_OPENED);
|
||||||
|
}
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_SNOW_FLAG);
|
||||||
|
|
||||||
|
/* free irq */
|
||||||
|
if (devp_vdin1->flags & VDIN_FLAG_ISR_REQ)
|
||||||
|
free_irq(devp_vdin1->irq, (void *)devp_vdin1);
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_ISR_REQ);
|
||||||
|
}
|
||||||
/* reset the hardware limit to vertical [0-1079] */
|
/* reset the hardware limit to vertical [0-1079] */
|
||||||
/* WRITE_VCBUS_REG(VPP_PREBLEND_VD1_V_START_END, 0x00000437); */
|
/* WRITE_VCBUS_REG(VPP_PREBLEND_VD1_V_START_END, 0x00000437); */
|
||||||
/*if (vdin_dbg_en)*/
|
/*if (vdin_dbg_en)*/
|
||||||
@@ -2117,6 +2271,7 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||||||
long ret = 0;
|
long ret = 0;
|
||||||
int callmaster_status = 0;
|
int callmaster_status = 0;
|
||||||
struct vdin_dev_s *devp = NULL;
|
struct vdin_dev_s *devp = NULL;
|
||||||
|
struct vdin_dev_s *devp_vdin1 = NULL;
|
||||||
void __user *argp = (void __user *)arg;
|
void __user *argp = (void __user *)arg;
|
||||||
struct vdin_parm_s param;
|
struct vdin_parm_s param;
|
||||||
ulong flags;
|
ulong flags;
|
||||||
@@ -2208,7 +2363,7 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||||||
de_fmt_flag = 0;
|
de_fmt_flag = 0;
|
||||||
fmt = devp->parm.info.fmt = parm.info.fmt;
|
fmt = devp->parm.info.fmt = parm.info.fmt;
|
||||||
}
|
}
|
||||||
devp->fmt_info_p =
|
devp->fmt_info_p =
|
||||||
(struct tvin_format_s *)tvin_get_fmt_info(fmt);
|
(struct tvin_format_s *)tvin_get_fmt_info(fmt);
|
||||||
if (!devp->fmt_info_p) {
|
if (!devp->fmt_info_p) {
|
||||||
pr_err("TVIN_IOC_START_DEC(%d) error, fmt is null\n",
|
pr_err("TVIN_IOC_START_DEC(%d) error, fmt is null\n",
|
||||||
@@ -2223,6 +2378,61 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||||||
pr_info("TVIN_IOC_START_DEC port %s, decode started ok\n\n",
|
pr_info("TVIN_IOC_START_DEC port %s, decode started ok\n\n",
|
||||||
tvin_port_str(devp->parm.port));
|
tvin_port_str(devp->parm.port));
|
||||||
mutex_unlock(&devp->fe_lock);
|
mutex_unlock(&devp->fe_lock);
|
||||||
|
|
||||||
|
devp_vdin1 = vdin_devp[1];
|
||||||
|
mutex_lock(&devp_vdin1->fe_lock);
|
||||||
|
if ((tl1_vdin1_preview_flag == 1) &&
|
||||||
|
!(devp_vdin1->flags & VDIN_FLAG_DEC_STARTED)) {
|
||||||
|
msleep(150);
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_FS_OPENED;
|
||||||
|
if (!(devp_vdin1->flags & VDIN_FLAG_ISR_REQ)) {
|
||||||
|
ret = request_irq(devp_vdin1->irq, vdin_isr,
|
||||||
|
IRQF_SHARED,
|
||||||
|
devp_vdin1->irq_name,
|
||||||
|
(void *)devp_vdin1);
|
||||||
|
if (ret != 0) {
|
||||||
|
pr_info("tl1_vdin1_preview request irq error.\n");
|
||||||
|
return -1;
|
||||||
|
}
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_ISR_REQ;
|
||||||
|
disable_irq_nosync(devp_vdin1->irq);
|
||||||
|
/*init queue*/
|
||||||
|
init_waitqueue_head(&devp_vdin1->queue);
|
||||||
|
}
|
||||||
|
|
||||||
|
devp_vdin1->unstable_flag = false;
|
||||||
|
devp_vdin1->parm.info.fmt = fmt;
|
||||||
|
devp_vdin1->parm.port = devp->parm.port;
|
||||||
|
devp_vdin1->fmt_info_p = (struct tvin_format_s *)
|
||||||
|
tvin_get_fmt_info(fmt);
|
||||||
|
if (!(devp_vdin1->flags & VDIN_FLAG_DEC_OPENED)) {
|
||||||
|
ret = vdin_open_fe(devp_vdin1->parm.port,
|
||||||
|
0, devp_vdin1);
|
||||||
|
if (ret) {
|
||||||
|
pr_err("TVIN_IOC_OPEN(%d) failed to open port 0x%x\n",
|
||||||
|
devp_vdin1->index,
|
||||||
|
devp_vdin1->parm.port);
|
||||||
|
ret = -EFAULT;
|
||||||
|
mutex_unlock(&devp_vdin1->fe_lock);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_DEC_OPENED;
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_FORCE_RECYCLE;
|
||||||
|
|
||||||
|
devp_vdin1->debug.scaler4w = 1280;
|
||||||
|
devp_vdin1->debug.scaler4h = 720;
|
||||||
|
devp_vdin1->debug.dest_cfmt = TVIN_YUV422;
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_MANUAL_CONVERSION;
|
||||||
|
|
||||||
|
vdin_start_dec(devp_vdin1);
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_DEC_STARTED;
|
||||||
|
|
||||||
|
pr_info("TVIN_IOC_START_DEC port %s, vdin1 used for preview\n",
|
||||||
|
tvin_port_str(devp_vdin1->parm.port));
|
||||||
|
}
|
||||||
|
mutex_unlock(&devp_vdin1->fe_lock);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case TVIN_IOC_STOP_DEC: {
|
case TVIN_IOC_STOP_DEC: {
|
||||||
@@ -2249,6 +2459,30 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||||||
if (vdin_dbg_en)
|
if (vdin_dbg_en)
|
||||||
pr_info("TVIN_IOC_STOP_DEC(%d) port %s, decode stop ok\n\n",
|
pr_info("TVIN_IOC_STOP_DEC(%d) port %s, decode stop ok\n\n",
|
||||||
parm->index, tvin_port_str(parm->port));
|
parm->index, tvin_port_str(parm->port));
|
||||||
|
|
||||||
|
if (tl1_vdin1_preview_flag == 1) {
|
||||||
|
devp_vdin1 = vdin_devp[1];
|
||||||
|
msleep(20);
|
||||||
|
if (!(devp_vdin1->flags & VDIN_FLAG_DEC_STARTED)) {
|
||||||
|
pr_err("TVIN_IOC_STOP_DEC(%d) decode havn't started\n",
|
||||||
|
devp_vdin1->index);
|
||||||
|
ret = -EPERM;
|
||||||
|
mutex_unlock(&devp->fe_lock);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
devp_vdin1->flags |= VDIN_FLAG_DEC_STOP_ISR;
|
||||||
|
vdin_stop_dec(devp_vdin1);
|
||||||
|
/* init flag */
|
||||||
|
devp_vdin1->flags &= ~VDIN_FLAG_DEC_STOP_ISR;
|
||||||
|
/* devp->flags &= ~VDIN_FLAG_FORCE_UNSTABLE; */
|
||||||
|
/* clear the flag of decode started */
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_DEC_STARTED);
|
||||||
|
if (vdin_dbg_en)
|
||||||
|
pr_info("vdin1 TVIN_IOC_STOP_DEC(%d) port %s stop ok\n\n",
|
||||||
|
parm->index,
|
||||||
|
tvin_port_str(parm->port));
|
||||||
|
}
|
||||||
|
|
||||||
mutex_unlock(&devp->fe_lock);
|
mutex_unlock(&devp->fe_lock);
|
||||||
reset_tvin_smr(parm->index);
|
reset_tvin_smr(parm->index);
|
||||||
break;
|
break;
|
||||||
@@ -2299,6 +2533,25 @@ static long vdin_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
|
|||||||
pr_info("TVIN_IOC_CLOSE(%d) port %s closed ok\n\n",
|
pr_info("TVIN_IOC_CLOSE(%d) port %s closed ok\n\n",
|
||||||
parm->index,
|
parm->index,
|
||||||
tvin_port_str(port));
|
tvin_port_str(port));
|
||||||
|
|
||||||
|
if (tl1_vdin1_preview_flag == 1) {
|
||||||
|
msleep(20);
|
||||||
|
devp_vdin1 = vdin_devp[1];
|
||||||
|
tl1_vdin1_preview_flag = 0;
|
||||||
|
if (!(devp_vdin1->flags & VDIN_FLAG_DEC_OPENED)) {
|
||||||
|
pr_err("TVIN_IOC_CLOSE(%d) you have not opened port\n",
|
||||||
|
devp_vdin1->index);
|
||||||
|
ret = -EPERM;
|
||||||
|
mutex_unlock(&devp->fe_lock);
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
vdin_close_fe(devp_vdin1);
|
||||||
|
devp_vdin1->flags &= (~VDIN_FLAG_DEC_OPENED);
|
||||||
|
if (vdin_dbg_en)
|
||||||
|
pr_info("vdin1 TVIN_IOC_CLOSE(%d) port %s closed ok\n\n",
|
||||||
|
parm->index,
|
||||||
|
tvin_port_str(port));
|
||||||
|
}
|
||||||
mutex_unlock(&devp->fe_lock);
|
mutex_unlock(&devp->fe_lock);
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -45,7 +45,7 @@
|
|||||||
#include "vdin_vf.h"
|
#include "vdin_vf.h"
|
||||||
#include "vdin_regs.h"
|
#include "vdin_regs.h"
|
||||||
|
|
||||||
#define VDIN_VER "Ref.2019/01/03"
|
#define VDIN_VER "Ref.2019/03/01"
|
||||||
|
|
||||||
/*the counter of vdin*/
|
/*the counter of vdin*/
|
||||||
#define VDIN_MAX_DEVS 2
|
#define VDIN_MAX_DEVS 2
|
||||||
@@ -363,6 +363,8 @@ struct vdin_v4l2_param_s {
|
|||||||
int fps;
|
int fps;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
extern unsigned int tl1_vdin1_preview_flag;
|
||||||
|
|
||||||
extern struct vframe_provider_s *vf_get_provider_by_name(
|
extern struct vframe_provider_s *vf_get_provider_by_name(
|
||||||
const char *provider_name);
|
const char *provider_name);
|
||||||
extern bool enable_reset;
|
extern bool enable_reset;
|
||||||
|
|||||||
Reference in New Issue
Block a user