From df347526e6d2ef58fb3fa533759dcda844e249ce Mon Sep 17 00:00:00 2001 From: ZhengRong Ruan Date: Thu, 28 Aug 2025 15:55:22 +0800 Subject: [PATCH] arm64: dts: rockchip: add rv1126b-evb2-v12-fastboot-spi-nand.dts Signed-off-by: ZhengRong Ruan Change-Id: I6434268022e5e65234d25cfdc0daf31776786a00 --- arch/arm64/boot/dts/rockchip/Makefile | 1 + .../rv1126b-evb2-v12-fastboot-spi-nand.dts | 24 +++++++++++++++++++ 2 files changed, 25 insertions(+) create mode 100644 arch/arm64/boot/dts/rockchip/rv1126b-evb2-v12-fastboot-spi-nand.dts diff --git a/arch/arm64/boot/dts/rockchip/Makefile b/arch/arm64/boot/dts/rockchip/Makefile index a2129674aedc..c96078654665 100644 --- a/arch/arm64/boot/dts/rockchip/Makefile +++ b/arch/arm64/boot/dts/rockchip/Makefile @@ -403,6 +403,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-rgb-Q7050ITH2641AA1T.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v10-sii9022-bt1120-to-hdmi.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v12.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v12-fastboot-emmc.dtb +dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb2-v12-fastboot-spi-nand.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb3-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-evb4-v10.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += rv1126b-iotest-v10.dtb diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v12-fastboot-spi-nand.dts b/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v12-fastboot-spi-nand.dts new file mode 100644 index 000000000000..d5ac2eec46fc --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v12-fastboot-spi-nand.dts @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2025 Rockchip Electronics Co., Ltd. + */ + +#include "rv1126b-evb2-v12.dts" +#include "rv1126b-fastboot-spi-nand.dtsi" + +/ { + model = "Rockchip RV1126B EVB2 V12 Arm64 Board"; + compatible = "rockchip,rv1126b-evb2-v12-fastboot-spi-nand", "rockchip,rv1126b"; + + chosen { + bootargs = "loglevel=0 initcall_debug=0 earlycon=uart8250,mmio32,0x20810000 console=ttyFIQ0 root=/dev/rd0 rootfstype=erofs rootflags=dax snd_soc_core.prealloc_buffer_size_kbytes=16 coherent_pool=32K"; + }; +}; + +&ramdisk_r { + reg = <0x48c40000 (40 * 0x00100000)>; +}; + +&ramdisk_c { + reg = <0x4b440000 (20 * 0x00100000)>; +};