drm/rockchip: vop2: update default axi id for rk3576 esmart2/3

Cluster0 win0: 	2, 3    		[AXI0]
Cluster0 win1: 	4, 5    		[AXI0]
Cluster1 win0: 	6, 7    		[AXI0]
Cluster1 win1: 	8, 9    		[AXI0]
esmart0: 	a, b			[AXI0]
esmart1: 	c, d        		[AXI0]
esmart2: 	a, b      	     	[AXI1]
esmart3: 	c, d           		[AXI1]
lut dma: 	0x10, 0x11, 0x12	[AXI0]
dci dma: 	0x13        		[AXI0]
metadata: 	0x14        		[AXI0]

Signed-off-by: Sandy Huang <hjc@rock-chips.com>
Change-Id: I1bd2db0a154a3c5f54c31ae55062ad2ba78abfc3
This commit is contained in:
Sandy Huang
2024-02-18 19:52:02 +08:00
committed by Tao Huang
parent a601d1332e
commit e0dafef0e0

View File

@@ -3627,7 +3627,7 @@ static const struct vop2_win_data rk3576_vop_win_data[] = {
.area_size = ARRAY_SIZE(rk3568_area_data),
.pd_id = VOP2_PD_ESMART,
.type = DRM_PLANE_TYPE_PRIMARY,
.axi_id = 0,
.axi_id = 1,
.axi_yrgb_id = 0x0a,
.axi_uv_id = 0x0b,
.possible_crtcs = 0x5,/* vp0 or vp2 */
@@ -3656,7 +3656,7 @@ static const struct vop2_win_data rk3576_vop_win_data[] = {
.area_size = ARRAY_SIZE(rk3568_area_data),
.pd_id = VOP2_PD_ESMART,
.type = DRM_PLANE_TYPE_OVERLAY,
.axi_id = 0,
.axi_id = 1,
.axi_yrgb_id = 0x0c,
.axi_uv_id = 0x0d,
.possible_crtcs = 0x6,/* vp1 or vp2 */