mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-05 02:21:52 +09:00
Merge 0296f97335 ("hfs/hfsplus: fix slab-out-of-bounds in hfs_bnode_read_key") into android14-6.1-lts
Steps on the way to 6.1.135 Change-Id: I766b7c23167bd4867279298f0369085573093520 Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
This commit is contained in:
@@ -888,6 +888,14 @@ static u8 spectre_bhb_loop_affected(void)
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{
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u8 k = 0;
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static const struct midr_range spectre_bhb_k132_list[] = {
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MIDR_ALL_VERSIONS(MIDR_CORTEX_X3),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_V2),
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};
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static const struct midr_range spectre_bhb_k38_list[] = {
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A715),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A720),
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};
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static const struct midr_range spectre_bhb_k32_list[] = {
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A78),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A78AE),
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@@ -901,6 +909,7 @@ static u8 spectre_bhb_loop_affected(void)
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};
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static const struct midr_range spectre_bhb_k24_list[] = {
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A76AE),
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MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
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MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
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MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),
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@@ -916,7 +925,11 @@ static u8 spectre_bhb_loop_affected(void)
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{},
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};
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if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))
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if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k132_list))
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k = 132;
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else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k38_list))
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k = 38;
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else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k32_list))
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k = 32;
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else if (is_midr_in_range_list(read_cpuid_id(), spectre_bhb_k24_list))
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k = 24;
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@@ -19,16 +19,9 @@
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#ifndef __ASSEMBLY__
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void arch_kgdb_breakpoint(void);
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extern unsigned long kgdb_compiled_break;
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static inline void arch_kgdb_breakpoint(void)
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{
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asm(".global kgdb_compiled_break\n"
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".option norvc\n"
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"kgdb_compiled_break: ebreak\n"
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".option rvc\n");
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}
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#endif /* !__ASSEMBLY__ */
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#define DBG_REG_ZERO "zero"
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@@ -273,6 +273,12 @@ void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)
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regs->epc = pc;
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}
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noinline void arch_kgdb_breakpoint(void)
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{
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asm(".global kgdb_compiled_break\n"
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"kgdb_compiled_break: ebreak\n");
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}
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void kgdb_arch_handle_qxfer_pkt(char *remcom_in_buffer,
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char *remcom_out_buffer)
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{
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@@ -76,6 +76,9 @@ static struct resource bss_res = { .name = "Kernel bss", };
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static struct resource elfcorehdr_res = { .name = "ELF Core hdr", };
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#endif
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static int num_standard_resources;
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static struct resource *standard_resources;
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static int __init add_resource(struct resource *parent,
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struct resource *res)
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{
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@@ -149,7 +152,7 @@ static void __init init_resources(void)
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struct resource *res = NULL;
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struct resource *mem_res = NULL;
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size_t mem_res_sz = 0;
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int num_resources = 0, res_idx = 0;
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int num_resources = 0, res_idx = 0, non_resv_res = 0;
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int ret = 0;
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/* + 1 as memblock_alloc() might increase memblock.reserved.cnt */
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@@ -213,6 +216,7 @@ static void __init init_resources(void)
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/* Add /memory regions to the resource tree */
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for_each_mem_region(region) {
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res = &mem_res[res_idx--];
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non_resv_res++;
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if (unlikely(memblock_is_nomap(region))) {
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res->name = "Reserved";
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@@ -230,6 +234,9 @@ static void __init init_resources(void)
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goto error;
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}
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num_standard_resources = non_resv_res;
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standard_resources = &mem_res[res_idx + 1];
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/* Clean-up any unused pre-allocated resources */
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if (res_idx >= 0)
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memblock_free(mem_res, (res_idx + 1) * sizeof(*mem_res));
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@@ -241,6 +248,33 @@ static void __init init_resources(void)
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memblock_free(mem_res, mem_res_sz);
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}
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static int __init reserve_memblock_reserved_regions(void)
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{
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u64 i, j;
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for (i = 0; i < num_standard_resources; i++) {
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struct resource *mem = &standard_resources[i];
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phys_addr_t r_start, r_end, mem_size = resource_size(mem);
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if (!memblock_is_region_reserved(mem->start, mem_size))
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continue;
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for_each_reserved_mem_range(j, &r_start, &r_end) {
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resource_size_t start, end;
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start = max(PFN_PHYS(PFN_DOWN(r_start)), mem->start);
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end = min(PFN_PHYS(PFN_UP(r_end)) - 1, mem->end);
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if (start > mem->end || end < mem->start)
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continue;
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reserve_region_with_split(mem, start, end, "Reserved");
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}
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}
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return 0;
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}
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arch_initcall(reserve_memblock_reserved_regions);
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static void __init parse_dtb(void)
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{
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@@ -753,22 +753,21 @@ void __init e820__memory_setup_extended(u64 phys_addr, u32 data_len)
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void __init e820__register_nosave_regions(unsigned long limit_pfn)
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{
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int i;
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unsigned long pfn = 0;
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u64 last_addr = 0;
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for (i = 0; i < e820_table->nr_entries; i++) {
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struct e820_entry *entry = &e820_table->entries[i];
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if (pfn < PFN_UP(entry->addr))
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register_nosave_region(pfn, PFN_UP(entry->addr));
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pfn = PFN_DOWN(entry->addr + entry->size);
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if (entry->type != E820_TYPE_RAM && entry->type != E820_TYPE_RESERVED_KERN)
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register_nosave_region(PFN_UP(entry->addr), pfn);
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continue;
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if (pfn >= limit_pfn)
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break;
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if (last_addr < entry->addr)
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register_nosave_region(PFN_DOWN(last_addr), PFN_UP(entry->addr));
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last_addr = entry->addr + entry->size;
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}
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register_nosave_region(PFN_DOWN(last_addr), limit_pfn);
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}
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#ifdef CONFIG_ACPI
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@@ -22,8 +22,8 @@ static const char * const profile_names[] = {
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};
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static_assert(ARRAY_SIZE(profile_names) == PLATFORM_PROFILE_LAST);
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static ssize_t platform_profile_choices_show(struct device *dev,
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struct device_attribute *attr,
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static ssize_t platform_profile_choices_show(struct kobject *kobj,
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struct kobj_attribute *attr,
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char *buf)
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{
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int len = 0;
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@@ -49,8 +49,8 @@ static ssize_t platform_profile_choices_show(struct device *dev,
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return len;
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}
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static ssize_t platform_profile_show(struct device *dev,
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struct device_attribute *attr,
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static ssize_t platform_profile_show(struct kobject *kobj,
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struct kobj_attribute *attr,
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char *buf)
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{
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enum platform_profile_option profile = PLATFORM_PROFILE_BALANCED;
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@@ -77,8 +77,8 @@ static ssize_t platform_profile_show(struct device *dev,
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return sysfs_emit(buf, "%s\n", profile_names[profile]);
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}
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static ssize_t platform_profile_store(struct device *dev,
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struct device_attribute *attr,
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static ssize_t platform_profile_store(struct kobject *kobj,
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struct kobj_attribute *attr,
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const char *buf, size_t count)
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{
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int err, i;
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@@ -115,12 +115,12 @@ static ssize_t platform_profile_store(struct device *dev,
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return count;
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}
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static DEVICE_ATTR_RO(platform_profile_choices);
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static DEVICE_ATTR_RW(platform_profile);
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static struct kobj_attribute attr_platform_profile_choices = __ATTR_RO(platform_profile_choices);
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static struct kobj_attribute attr_platform_profile = __ATTR_RW(platform_profile);
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static struct attribute *platform_profile_attrs[] = {
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&dev_attr_platform_profile_choices.attr,
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&dev_attr_platform_profile.attr,
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&attr_platform_profile_choices.attr,
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&attr_platform_profile.attr,
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NULL
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};
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@@ -817,6 +817,8 @@ out_free:
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rtl_dev_err(hdev, "mandatory config file %s not found",
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btrtl_dev->ic_info->cfg_name);
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ret = btrtl_dev->cfg_len;
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if (!ret)
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ret = -EINVAL;
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goto err_free;
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}
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}
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@@ -102,7 +102,8 @@ static inline struct sk_buff *hci_uart_dequeue(struct hci_uart *hu)
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if (!skb) {
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percpu_down_read(&hu->proto_lock);
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if (test_bit(HCI_UART_PROTO_READY, &hu->flags))
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if (test_bit(HCI_UART_PROTO_READY, &hu->flags) ||
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test_bit(HCI_UART_PROTO_INIT, &hu->flags))
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skb = hu->proto->dequeue(hu);
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percpu_up_read(&hu->proto_lock);
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@@ -124,7 +125,8 @@ int hci_uart_tx_wakeup(struct hci_uart *hu)
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if (!percpu_down_read_trylock(&hu->proto_lock))
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return 0;
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if (!test_bit(HCI_UART_PROTO_READY, &hu->flags))
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if (!test_bit(HCI_UART_PROTO_READY, &hu->flags) &&
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!test_bit(HCI_UART_PROTO_INIT, &hu->flags))
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goto no_schedule;
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set_bit(HCI_UART_TX_WAKEUP, &hu->tx_state);
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@@ -278,7 +280,8 @@ static int hci_uart_send_frame(struct hci_dev *hdev, struct sk_buff *skb)
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percpu_down_read(&hu->proto_lock);
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if (!test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
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if (!test_bit(HCI_UART_PROTO_READY, &hu->flags) &&
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!test_bit(HCI_UART_PROTO_INIT, &hu->flags)) {
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percpu_up_read(&hu->proto_lock);
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return -EUNATCH;
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}
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@@ -582,7 +585,8 @@ static void hci_uart_tty_wakeup(struct tty_struct *tty)
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if (tty != hu->tty)
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return;
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if (test_bit(HCI_UART_PROTO_READY, &hu->flags))
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if (test_bit(HCI_UART_PROTO_READY, &hu->flags) ||
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test_bit(HCI_UART_PROTO_INIT, &hu->flags))
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hci_uart_tx_wakeup(hu);
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}
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||||
@@ -608,7 +612,8 @@ static void hci_uart_tty_receive(struct tty_struct *tty, const u8 *data,
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percpu_down_read(&hu->proto_lock);
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||||
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags)) {
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||||
if (!test_bit(HCI_UART_PROTO_READY, &hu->flags) &&
|
||||
!test_bit(HCI_UART_PROTO_INIT, &hu->flags)) {
|
||||
percpu_up_read(&hu->proto_lock);
|
||||
return;
|
||||
}
|
||||
@@ -709,13 +714,16 @@ static int hci_uart_set_proto(struct hci_uart *hu, int id)
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||||
|
||||
hu->proto = p;
|
||||
|
||||
set_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||
set_bit(HCI_UART_PROTO_INIT, &hu->flags);
|
||||
|
||||
err = hci_uart_register_dev(hu);
|
||||
if (err) {
|
||||
return err;
|
||||
}
|
||||
|
||||
set_bit(HCI_UART_PROTO_READY, &hu->flags);
|
||||
clear_bit(HCI_UART_PROTO_INIT, &hu->flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
@@ -90,6 +90,7 @@ struct hci_uart {
|
||||
#define HCI_UART_REGISTERED 1
|
||||
#define HCI_UART_PROTO_READY 2
|
||||
#define HCI_UART_NO_SUSPEND_NOTIFIER 3
|
||||
#define HCI_UART_PROTO_INIT 4
|
||||
|
||||
/* TX states */
|
||||
#define HCI_UART_SENDING 1
|
||||
|
||||
@@ -115,12 +115,12 @@ int caam_qi_enqueue(struct device *qidev, struct caam_drv_req *req)
|
||||
qm_fd_addr_set64(&fd, addr);
|
||||
|
||||
do {
|
||||
refcount_inc(&req->drv_ctx->refcnt);
|
||||
ret = qman_enqueue(req->drv_ctx->req_fq, &fd);
|
||||
if (likely(!ret)) {
|
||||
refcount_inc(&req->drv_ctx->refcnt);
|
||||
if (likely(!ret))
|
||||
return 0;
|
||||
}
|
||||
|
||||
refcount_dec(&req->drv_ctx->refcnt);
|
||||
if (ret != -EBUSY)
|
||||
break;
|
||||
num_retries++;
|
||||
|
||||
@@ -403,6 +403,7 @@ static void ssip_reset(struct hsi_client *cl)
|
||||
del_timer(&ssi->rx_wd);
|
||||
del_timer(&ssi->tx_wd);
|
||||
del_timer(&ssi->keep_alive);
|
||||
cancel_work_sync(&ssi->work);
|
||||
ssi->main_state = 0;
|
||||
ssi->send_state = 0;
|
||||
ssi->recv_state = 0;
|
||||
|
||||
@@ -76,12 +76,14 @@ static inline int ib_init_umem_odp(struct ib_umem_odp *umem_odp,
|
||||
|
||||
npfns = (end - start) >> PAGE_SHIFT;
|
||||
umem_odp->pfn_list = kvcalloc(
|
||||
npfns, sizeof(*umem_odp->pfn_list), GFP_KERNEL);
|
||||
npfns, sizeof(*umem_odp->pfn_list),
|
||||
GFP_KERNEL | __GFP_NOWARN);
|
||||
if (!umem_odp->pfn_list)
|
||||
return -ENOMEM;
|
||||
|
||||
umem_odp->dma_list = kvcalloc(
|
||||
ndmas, sizeof(*umem_odp->dma_list), GFP_KERNEL);
|
||||
ndmas, sizeof(*umem_odp->dma_list),
|
||||
GFP_KERNEL | __GFP_NOWARN);
|
||||
if (!umem_odp->dma_list) {
|
||||
ret = -ENOMEM;
|
||||
goto out_pfn_list;
|
||||
|
||||
@@ -642,7 +642,7 @@ static int hns_roce_register_device(struct hns_roce_dev *hr_dev)
|
||||
if (ret)
|
||||
return ret;
|
||||
}
|
||||
dma_set_max_seg_size(dev, UINT_MAX);
|
||||
dma_set_max_seg_size(dev, SZ_2G);
|
||||
ret = ib_register_device(ib_dev, "hns_%d", dev);
|
||||
if (ret) {
|
||||
dev_err(dev, "ib_register_device failed!\n");
|
||||
|
||||
@@ -380,7 +380,7 @@ static void *usnic_ib_device_add(struct pci_dev *dev)
|
||||
if (!us_ibdev) {
|
||||
usnic_err("Device %s context alloc failed\n",
|
||||
netdev_name(pci_get_drvdata(dev)));
|
||||
return ERR_PTR(-EFAULT);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
us_ibdev->ufdev = usnic_fwd_dev_alloc(dev);
|
||||
@@ -500,8 +500,8 @@ static struct usnic_ib_dev *usnic_ib_discover_pf(struct usnic_vnic *vnic)
|
||||
}
|
||||
|
||||
us_ibdev = usnic_ib_device_add(parent_pci);
|
||||
if (IS_ERR_OR_NULL(us_ibdev)) {
|
||||
us_ibdev = us_ibdev ? us_ibdev : ERR_PTR(-EFAULT);
|
||||
if (!us_ibdev) {
|
||||
us_ibdev = ERR_PTR(-EFAULT);
|
||||
goto out;
|
||||
}
|
||||
|
||||
@@ -569,10 +569,10 @@ static int usnic_ib_pci_probe(struct pci_dev *pdev,
|
||||
}
|
||||
|
||||
pf = usnic_ib_discover_pf(vf->vnic);
|
||||
if (IS_ERR_OR_NULL(pf)) {
|
||||
usnic_err("Failed to discover pf of vnic %s with err%ld\n",
|
||||
pci_name(pdev), PTR_ERR(pf));
|
||||
err = pf ? PTR_ERR(pf) : -EFAULT;
|
||||
if (IS_ERR(pf)) {
|
||||
err = PTR_ERR(pf);
|
||||
usnic_err("Failed to discover pf of vnic %s with err%d\n",
|
||||
pci_name(pdev), err);
|
||||
goto out_clean_vnic;
|
||||
}
|
||||
|
||||
|
||||
@@ -2029,9 +2029,8 @@ int md_bitmap_get_stats(struct bitmap *bitmap, struct md_bitmap_stats *stats)
|
||||
|
||||
if (!bitmap)
|
||||
return -ENOENT;
|
||||
if (bitmap->mddev->bitmap_info.external)
|
||||
return -ENOENT;
|
||||
if (!bitmap->storage.sb_page) /* no superblock */
|
||||
if (!bitmap->mddev->bitmap_info.external &&
|
||||
!bitmap->storage.sb_page)
|
||||
return -EINVAL;
|
||||
sb = kmap_local_page(bitmap->storage.sb_page);
|
||||
stats->sync_size = le64_to_cpu(sb->sync_size);
|
||||
|
||||
@@ -1772,6 +1772,7 @@ retry_discard:
|
||||
* The discard bio returns only first r10bio finishes
|
||||
*/
|
||||
if (first_copy) {
|
||||
md_account_bio(mddev, &bio);
|
||||
r10_bio->master_bio = bio;
|
||||
set_bit(R10BIO_Discard, &r10_bio->state);
|
||||
first_copy = false;
|
||||
|
||||
@@ -724,6 +724,15 @@ static void b53_enable_mib(struct b53_device *dev)
|
||||
b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
|
||||
}
|
||||
|
||||
static void b53_enable_stp(struct b53_device *dev)
|
||||
{
|
||||
u8 gc;
|
||||
|
||||
b53_read8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, &gc);
|
||||
gc |= GC_RX_BPDU_EN;
|
||||
b53_write8(dev, B53_MGMT_PAGE, B53_GLOBAL_CONFIG, gc);
|
||||
}
|
||||
|
||||
static u16 b53_default_pvid(struct b53_device *dev)
|
||||
{
|
||||
if (is5325(dev) || is5365(dev))
|
||||
@@ -863,6 +872,7 @@ static int b53_switch_reset(struct b53_device *dev)
|
||||
}
|
||||
|
||||
b53_enable_mib(dev);
|
||||
b53_enable_stp(dev);
|
||||
|
||||
return b53_flush_arl(dev, FAST_AGE_STATIC);
|
||||
}
|
||||
|
||||
@@ -1724,6 +1724,8 @@ static int mv88e6xxx_vtu_get(struct mv88e6xxx_chip *chip, u16 vid,
|
||||
if (!chip->info->ops->vtu_getnext)
|
||||
return -EOPNOTSUPP;
|
||||
|
||||
memset(entry, 0, sizeof(*entry));
|
||||
|
||||
entry->vid = vid ? vid - 1 : mv88e6xxx_max_vid(chip);
|
||||
entry->valid = false;
|
||||
|
||||
@@ -1859,7 +1861,16 @@ static int mv88e6xxx_mst_put(struct mv88e6xxx_chip *chip, u8 sid)
|
||||
struct mv88e6xxx_mst *mst, *tmp;
|
||||
int err;
|
||||
|
||||
if (!sid)
|
||||
/* If the SID is zero, it is for a VLAN mapped to the default MSTI,
|
||||
* and mv88e6xxx_stu_setup() made sure it is always present, and thus,
|
||||
* should not be removed here.
|
||||
*
|
||||
* If the chip lacks STU support, numerically the "sid" variable will
|
||||
* happen to also be zero, but we don't want to rely on that fact, so
|
||||
* we explicitly test that first. In that case, there is also nothing
|
||||
* to do here.
|
||||
*/
|
||||
if (!mv88e6xxx_has_stu(chip) || !sid)
|
||||
return 0;
|
||||
|
||||
list_for_each_entry_safe(mst, tmp, &chip->msts, node) {
|
||||
|
||||
@@ -743,7 +743,8 @@ void mv88e6xxx_teardown_devlink_regions_global(struct dsa_switch *ds)
|
||||
int i;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(mv88e6xxx_regions); i++)
|
||||
dsa_devlink_region_destroy(chip->regions[i]);
|
||||
if (chip->regions[i])
|
||||
dsa_devlink_region_destroy(chip->regions[i]);
|
||||
}
|
||||
|
||||
void mv88e6xxx_teardown_devlink_regions_port(struct dsa_switch *ds, int port)
|
||||
|
||||
@@ -2273,6 +2273,7 @@ int cxgb4_init_ethtool_filters(struct adapter *adap)
|
||||
eth_filter->port[i].bmap = bitmap_zalloc(nentries, GFP_KERNEL);
|
||||
if (!eth_filter->port[i].bmap) {
|
||||
ret = -ENOMEM;
|
||||
kvfree(eth_filter->port[i].loc_array);
|
||||
goto free_eth_finfo;
|
||||
}
|
||||
}
|
||||
|
||||
@@ -574,6 +574,7 @@
|
||||
#define IGC_PTM_STAT_T4M1_OVFL BIT(3) /* T4 minus T1 overflow */
|
||||
#define IGC_PTM_STAT_ADJUST_1ST BIT(4) /* 1588 timer adjusted during 1st PTM cycle */
|
||||
#define IGC_PTM_STAT_ADJUST_CYC BIT(5) /* 1588 timer adjusted during non-1st PTM cycle */
|
||||
#define IGC_PTM_STAT_ALL GENMASK(5, 0) /* Used to clear all status */
|
||||
|
||||
/* PCIe PTM Cycle Control */
|
||||
#define IGC_PTM_CYCLE_CTRL_CYC_TIME(msec) ((msec) & 0x3ff) /* PTM Cycle Time (msec) */
|
||||
|
||||
@@ -6725,6 +6725,7 @@ static int igc_probe(struct pci_dev *pdev,
|
||||
|
||||
err_register:
|
||||
igc_release_hw_control(adapter);
|
||||
igc_ptp_stop(adapter);
|
||||
err_eeprom:
|
||||
if (!igc_check_reset_block(hw))
|
||||
igc_reset_phy(hw);
|
||||
|
||||
@@ -844,45 +844,60 @@ static void igc_ptm_log_error(struct igc_adapter *adapter, u32 ptm_stat)
|
||||
}
|
||||
}
|
||||
|
||||
static void igc_ptm_trigger(struct igc_hw *hw)
|
||||
{
|
||||
u32 ctrl;
|
||||
|
||||
/* To "manually" start the PTM cycle we need to set the
|
||||
* trigger (TRIG) bit
|
||||
*/
|
||||
ctrl = rd32(IGC_PTM_CTRL);
|
||||
ctrl |= IGC_PTM_CTRL_TRIG;
|
||||
wr32(IGC_PTM_CTRL, ctrl);
|
||||
/* Perform flush after write to CTRL register otherwise
|
||||
* transaction may not start
|
||||
*/
|
||||
wrfl();
|
||||
}
|
||||
|
||||
static void igc_ptm_reset(struct igc_hw *hw)
|
||||
{
|
||||
u32 ctrl;
|
||||
|
||||
ctrl = rd32(IGC_PTM_CTRL);
|
||||
ctrl &= ~IGC_PTM_CTRL_TRIG;
|
||||
wr32(IGC_PTM_CTRL, ctrl);
|
||||
/* Write to clear all status */
|
||||
wr32(IGC_PTM_STAT, IGC_PTM_STAT_ALL);
|
||||
}
|
||||
|
||||
static int igc_phc_get_syncdevicetime(ktime_t *device,
|
||||
struct system_counterval_t *system,
|
||||
void *ctx)
|
||||
{
|
||||
u32 stat, t2_curr_h, t2_curr_l, ctrl;
|
||||
struct igc_adapter *adapter = ctx;
|
||||
struct igc_hw *hw = &adapter->hw;
|
||||
u32 stat, t2_curr_h, t2_curr_l;
|
||||
int err, count = 100;
|
||||
ktime_t t1, t2_curr;
|
||||
|
||||
/* Get a snapshot of system clocks to use as historic value. */
|
||||
ktime_get_snapshot(&adapter->snapshot);
|
||||
|
||||
/* Doing this in a loop because in the event of a
|
||||
* badly timed (ha!) system clock adjustment, we may
|
||||
* get PTM errors from the PCI root, but these errors
|
||||
* are transitory. Repeating the process returns valid
|
||||
* data eventually.
|
||||
*/
|
||||
do {
|
||||
/* Doing this in a loop because in the event of a
|
||||
* badly timed (ha!) system clock adjustment, we may
|
||||
* get PTM errors from the PCI root, but these errors
|
||||
* are transitory. Repeating the process returns valid
|
||||
* data eventually.
|
||||
*/
|
||||
/* Get a snapshot of system clocks to use as historic value. */
|
||||
ktime_get_snapshot(&adapter->snapshot);
|
||||
|
||||
/* To "manually" start the PTM cycle we need to clear and
|
||||
* then set again the TRIG bit.
|
||||
*/
|
||||
ctrl = rd32(IGC_PTM_CTRL);
|
||||
ctrl &= ~IGC_PTM_CTRL_TRIG;
|
||||
wr32(IGC_PTM_CTRL, ctrl);
|
||||
ctrl |= IGC_PTM_CTRL_TRIG;
|
||||
wr32(IGC_PTM_CTRL, ctrl);
|
||||
|
||||
/* The cycle only starts "for real" when software notifies
|
||||
* that it has read the registers, this is done by setting
|
||||
* VALID bit.
|
||||
*/
|
||||
wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID);
|
||||
igc_ptm_trigger(hw);
|
||||
|
||||
err = readx_poll_timeout(rd32, IGC_PTM_STAT, stat,
|
||||
stat, IGC_PTM_STAT_SLEEP,
|
||||
IGC_PTM_STAT_TIMEOUT);
|
||||
igc_ptm_reset(hw);
|
||||
|
||||
if (err < 0) {
|
||||
netdev_err(adapter->netdev, "Timeout reading IGC_PTM_STAT register\n");
|
||||
return err;
|
||||
@@ -891,15 +906,7 @@ static int igc_phc_get_syncdevicetime(ktime_t *device,
|
||||
if ((stat & IGC_PTM_STAT_VALID) == IGC_PTM_STAT_VALID)
|
||||
break;
|
||||
|
||||
if (stat & ~IGC_PTM_STAT_VALID) {
|
||||
/* An error occurred, log it. */
|
||||
igc_ptm_log_error(adapter, stat);
|
||||
/* The STAT register is write-1-to-clear (W1C),
|
||||
* so write the previous error status to clear it.
|
||||
*/
|
||||
wr32(IGC_PTM_STAT, stat);
|
||||
continue;
|
||||
}
|
||||
igc_ptm_log_error(adapter, stat);
|
||||
} while (--count);
|
||||
|
||||
if (!count) {
|
||||
@@ -1063,8 +1070,12 @@ void igc_ptp_suspend(struct igc_adapter *adapter)
|
||||
**/
|
||||
void igc_ptp_stop(struct igc_adapter *adapter)
|
||||
{
|
||||
if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
|
||||
return;
|
||||
|
||||
igc_ptp_suspend(adapter);
|
||||
|
||||
adapter->ptp_flags &= ~IGC_PTP_ENABLED;
|
||||
if (adapter->ptp_clock) {
|
||||
ptp_clock_unregister(adapter->ptp_clock);
|
||||
netdev_info(adapter->netdev, "PHC removed\n");
|
||||
@@ -1081,10 +1092,13 @@ void igc_ptp_stop(struct igc_adapter *adapter)
|
||||
void igc_ptp_reset(struct igc_adapter *adapter)
|
||||
{
|
||||
struct igc_hw *hw = &adapter->hw;
|
||||
u32 cycle_ctrl, ctrl;
|
||||
u32 cycle_ctrl, ctrl, stat;
|
||||
unsigned long flags;
|
||||
u32 timadj;
|
||||
|
||||
if (!(adapter->ptp_flags & IGC_PTP_ENABLED))
|
||||
return;
|
||||
|
||||
/* reset the tstamp_config */
|
||||
igc_ptp_set_timestamp_mode(adapter, &adapter->tstamp_config);
|
||||
|
||||
@@ -1116,14 +1130,19 @@ void igc_ptp_reset(struct igc_adapter *adapter)
|
||||
ctrl = IGC_PTM_CTRL_EN |
|
||||
IGC_PTM_CTRL_START_NOW |
|
||||
IGC_PTM_CTRL_SHRT_CYC(IGC_PTM_SHORT_CYC_DEFAULT) |
|
||||
IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT) |
|
||||
IGC_PTM_CTRL_TRIG;
|
||||
IGC_PTM_CTRL_PTM_TO(IGC_PTM_TIMEOUT_DEFAULT);
|
||||
|
||||
wr32(IGC_PTM_CTRL, ctrl);
|
||||
|
||||
/* Force the first cycle to run. */
|
||||
wr32(IGC_PTM_STAT, IGC_PTM_STAT_VALID);
|
||||
igc_ptm_trigger(hw);
|
||||
|
||||
if (readx_poll_timeout_atomic(rd32, IGC_PTM_STAT, stat,
|
||||
stat, IGC_PTM_STAT_SLEEP,
|
||||
IGC_PTM_STAT_TIMEOUT))
|
||||
netdev_err(adapter->netdev, "Timeout reading IGC_PTM_STAT register\n");
|
||||
|
||||
igc_ptm_reset(hw);
|
||||
break;
|
||||
default:
|
||||
/* No work to do. */
|
||||
|
||||
@@ -2553,7 +2553,7 @@ static void at76_disconnect(struct usb_interface *interface)
|
||||
|
||||
wiphy_info(priv->hw->wiphy, "disconnecting\n");
|
||||
at76_delete_device(priv);
|
||||
usb_put_dev(priv->udev);
|
||||
usb_put_dev(interface_to_usbdev(interface));
|
||||
dev_info(&interface->dev, "disconnected\n");
|
||||
}
|
||||
|
||||
|
||||
@@ -342,8 +342,10 @@ void wl1251_tx_work(struct work_struct *work)
|
||||
while ((skb = skb_dequeue(&wl->tx_queue))) {
|
||||
if (!woken_up) {
|
||||
ret = wl1251_ps_elp_wakeup(wl);
|
||||
if (ret < 0)
|
||||
if (ret < 0) {
|
||||
skb_queue_head(&wl->tx_queue, skb);
|
||||
goto out;
|
||||
}
|
||||
woken_up = true;
|
||||
}
|
||||
|
||||
|
||||
@@ -5578,8 +5578,6 @@ static bool pci_bus_resetable(struct pci_bus *bus)
|
||||
return false;
|
||||
|
||||
list_for_each_entry(dev, &bus->devices, bus_list) {
|
||||
if (!pci_reset_supported(dev))
|
||||
return false;
|
||||
if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET ||
|
||||
(dev->subordinate && !pci_bus_resetable(dev->subordinate)))
|
||||
return false;
|
||||
@@ -5656,8 +5654,6 @@ static bool pci_slot_resetable(struct pci_slot *slot)
|
||||
list_for_each_entry(dev, &slot->bus->devices, bus_list) {
|
||||
if (!dev->slot || dev->slot != slot)
|
||||
continue;
|
||||
if (!pci_reset_supported(dev))
|
||||
return false;
|
||||
if (dev->dev_flags & PCI_DEV_FLAGS_NO_BUS_RESET ||
|
||||
(dev->subordinate && !pci_bus_resetable(dev->subordinate)))
|
||||
return false;
|
||||
|
||||
@@ -427,11 +427,14 @@ static int asus_pega_lucid_set(struct asus_laptop *asus, int unit, bool enable)
|
||||
|
||||
static int pega_acc_axis(struct asus_laptop *asus, int curr, char *method)
|
||||
{
|
||||
unsigned long long val = (unsigned long long)curr;
|
||||
acpi_status status;
|
||||
int i, delta;
|
||||
unsigned long long val;
|
||||
for (i = 0; i < PEGA_ACC_RETRIES; i++) {
|
||||
acpi_evaluate_integer(asus->handle, method, NULL, &val);
|
||||
|
||||
for (i = 0; i < PEGA_ACC_RETRIES; i++) {
|
||||
status = acpi_evaluate_integer(asus->handle, method, NULL, &val);
|
||||
if (ACPI_FAILURE(status))
|
||||
continue;
|
||||
/* The output is noisy. From reading the ASL
|
||||
* dissassembly, timeout errors are returned with 1's
|
||||
* in the high word, and the lack of locking around
|
||||
|
||||
@@ -1654,6 +1654,7 @@ ptp_ocp_signal_set(struct ptp_ocp *bp, int gen, struct ptp_ocp_signal *s)
|
||||
if (!s->start) {
|
||||
/* roundup() does not work on 32-bit systems */
|
||||
s->start = DIV64_U64_ROUND_UP(start_ns, s->period);
|
||||
s->start *= s->period;
|
||||
s->start = ktime_add(s->start, s->phase);
|
||||
}
|
||||
|
||||
|
||||
@@ -2502,6 +2502,7 @@ static void prep_ata_v2_hw(struct hisi_hba *hisi_hba,
|
||||
struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
|
||||
struct sas_ata_task *ata_task = &task->ata_task;
|
||||
struct sas_tmf_task *tmf = slot->tmf;
|
||||
int phy_id;
|
||||
u8 *buf_cmd;
|
||||
int has_data = 0, hdr_tag = 0;
|
||||
u32 dw0, dw1 = 0, dw2 = 0;
|
||||
@@ -2509,10 +2510,14 @@ static void prep_ata_v2_hw(struct hisi_hba *hisi_hba,
|
||||
/* create header */
|
||||
/* dw0 */
|
||||
dw0 = port->id << CMD_HDR_PORT_OFF;
|
||||
if (parent_dev && dev_is_expander(parent_dev->dev_type))
|
||||
if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
|
||||
dw0 |= 3 << CMD_HDR_CMD_OFF;
|
||||
else
|
||||
} else {
|
||||
phy_id = device->phy->identify.phy_identifier;
|
||||
dw0 |= (1U << phy_id) << CMD_HDR_PHY_ID_OFF;
|
||||
dw0 |= CMD_HDR_FORCE_PHY_MSK;
|
||||
dw0 |= 4 << CMD_HDR_CMD_OFF;
|
||||
}
|
||||
|
||||
if (tmf && ata_task->force_phy) {
|
||||
dw0 |= CMD_HDR_FORCE_PHY_MSK;
|
||||
|
||||
@@ -357,6 +357,10 @@
|
||||
#define CMD_HDR_RESP_REPORT_MSK (0x1 << CMD_HDR_RESP_REPORT_OFF)
|
||||
#define CMD_HDR_TLR_CTRL_OFF 6
|
||||
#define CMD_HDR_TLR_CTRL_MSK (0x3 << CMD_HDR_TLR_CTRL_OFF)
|
||||
#define CMD_HDR_PHY_ID_OFF 8
|
||||
#define CMD_HDR_PHY_ID_MSK (0x1ff << CMD_HDR_PHY_ID_OFF)
|
||||
#define CMD_HDR_FORCE_PHY_OFF 17
|
||||
#define CMD_HDR_FORCE_PHY_MSK (0x1U << CMD_HDR_FORCE_PHY_OFF)
|
||||
#define CMD_HDR_PORT_OFF 18
|
||||
#define CMD_HDR_PORT_MSK (0xf << CMD_HDR_PORT_OFF)
|
||||
#define CMD_HDR_PRIORITY_OFF 27
|
||||
@@ -1385,15 +1389,21 @@ static void prep_ata_v3_hw(struct hisi_hba *hisi_hba,
|
||||
struct hisi_sas_cmd_hdr *hdr = slot->cmd_hdr;
|
||||
struct asd_sas_port *sas_port = device->port;
|
||||
struct hisi_sas_port *port = to_hisi_sas_port(sas_port);
|
||||
int phy_id;
|
||||
u8 *buf_cmd;
|
||||
int has_data = 0, hdr_tag = 0;
|
||||
u32 dw1 = 0, dw2 = 0;
|
||||
|
||||
hdr->dw0 = cpu_to_le32(port->id << CMD_HDR_PORT_OFF);
|
||||
if (parent_dev && dev_is_expander(parent_dev->dev_type))
|
||||
if (parent_dev && dev_is_expander(parent_dev->dev_type)) {
|
||||
hdr->dw0 |= cpu_to_le32(3 << CMD_HDR_CMD_OFF);
|
||||
else
|
||||
} else {
|
||||
phy_id = device->phy->identify.phy_identifier;
|
||||
hdr->dw0 |= cpu_to_le32((1U << phy_id)
|
||||
<< CMD_HDR_PHY_ID_OFF);
|
||||
hdr->dw0 |= CMD_HDR_FORCE_PHY_MSK;
|
||||
hdr->dw0 |= cpu_to_le32(4U << CMD_HDR_CMD_OFF);
|
||||
}
|
||||
|
||||
switch (task->data_dir) {
|
||||
case DMA_TO_DEVICE:
|
||||
|
||||
@@ -3207,11 +3207,14 @@ iscsi_set_host_param(struct iscsi_transport *transport,
|
||||
}
|
||||
|
||||
/* see similar check in iscsi_if_set_param() */
|
||||
if (strlen(data) > ev->u.set_host_param.len)
|
||||
return -EINVAL;
|
||||
if (strlen(data) > ev->u.set_host_param.len) {
|
||||
err = -EINVAL;
|
||||
goto out;
|
||||
}
|
||||
|
||||
err = transport->set_host_param(shost, ev->u.set_host_param.param,
|
||||
data, ev->u.set_host_param.len);
|
||||
out:
|
||||
scsi_host_put(shost);
|
||||
return err;
|
||||
}
|
||||
|
||||
@@ -348,6 +348,7 @@ config GRACE_PERIOD
|
||||
config LOCKD
|
||||
tristate
|
||||
depends on FILE_LOCKING
|
||||
select CRC32
|
||||
select GRACE_PERIOD
|
||||
|
||||
config LOCKD_V4
|
||||
|
||||
@@ -1642,8 +1642,7 @@ static int btrfs_show_options(struct seq_file *seq, struct dentry *dentry)
|
||||
subvol_name = btrfs_get_subvol_name_from_objectid(info,
|
||||
BTRFS_I(d_inode(dentry))->root->root_key.objectid);
|
||||
if (!IS_ERR(subvol_name)) {
|
||||
seq_puts(seq, ",subvol=");
|
||||
seq_escape(seq, subvol_name, " \t\n\\");
|
||||
seq_show_option(seq, "subvol", subvol_name);
|
||||
kfree(subvol_name);
|
||||
}
|
||||
return 0;
|
||||
|
||||
@@ -67,6 +67,12 @@ void hfs_bnode_read_key(struct hfs_bnode *node, void *key, int off)
|
||||
else
|
||||
key_len = tree->max_key_len + 1;
|
||||
|
||||
if (key_len > sizeof(hfs_btree_key) || key_len < 1) {
|
||||
memset(key, 0, sizeof(hfs_btree_key));
|
||||
pr_err("hfs: Invalid key length: %d\n", key_len);
|
||||
return;
|
||||
}
|
||||
|
||||
hfs_bnode_read(node, key, off, key_len);
|
||||
}
|
||||
|
||||
|
||||
@@ -67,6 +67,12 @@ void hfs_bnode_read_key(struct hfs_bnode *node, void *key, int off)
|
||||
else
|
||||
key_len = tree->max_key_len + 2;
|
||||
|
||||
if (key_len > sizeof(hfsplus_btree_key) || key_len < 1) {
|
||||
memset(key, 0, sizeof(hfsplus_btree_key));
|
||||
pr_err("hfsplus: Invalid key length: %d\n", key_len);
|
||||
return;
|
||||
}
|
||||
|
||||
hfs_bnode_read(node, key, off, key_len);
|
||||
}
|
||||
|
||||
|
||||
@@ -2,6 +2,7 @@
|
||||
config NFS_FS
|
||||
tristate "NFS client support"
|
||||
depends on INET && FILE_LOCKING && MULTIUSER
|
||||
select CRC32
|
||||
select LOCKD
|
||||
select SUNRPC
|
||||
select NFS_ACL_SUPPORT if NFS_V3_ACL
|
||||
@@ -194,7 +195,6 @@ config NFS_USE_KERNEL_DNS
|
||||
config NFS_DEBUG
|
||||
bool
|
||||
depends on NFS_FS && SUNRPC_DEBUG
|
||||
select CRC32
|
||||
default y
|
||||
|
||||
config NFS_DISABLE_UDP_SUPPORT
|
||||
|
||||
@@ -826,33 +826,11 @@ u64 nfs_timespec_to_change_attr(const struct timespec64 *ts)
|
||||
return ((u64)ts->tv_sec << 30) + ts->tv_nsec;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CRC32
|
||||
/**
|
||||
* nfs_fhandle_hash - calculate the crc32 hash for the filehandle
|
||||
* @fh - pointer to filehandle
|
||||
*
|
||||
* returns a crc32 hash for the filehandle that is compatible with
|
||||
* the one displayed by "wireshark".
|
||||
*/
|
||||
static inline u32 nfs_fhandle_hash(const struct nfs_fh *fh)
|
||||
{
|
||||
return ~crc32_le(0xFFFFFFFF, &fh->data[0], fh->size);
|
||||
}
|
||||
static inline u32 nfs_stateid_hash(const nfs4_stateid *stateid)
|
||||
{
|
||||
return ~crc32_le(0xFFFFFFFF, &stateid->other[0],
|
||||
NFS4_STATEID_OTHER_SIZE);
|
||||
}
|
||||
#else
|
||||
static inline u32 nfs_fhandle_hash(const struct nfs_fh *fh)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
static inline u32 nfs_stateid_hash(nfs4_stateid *stateid)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
static inline bool nfs_error_is_fatal(int err)
|
||||
{
|
||||
|
||||
@@ -148,16 +148,12 @@ static inline void nfs4_copy_sessionid(struct nfs4_sessionid *dst,
|
||||
memcpy(dst->data, src->data, NFS4_MAX_SESSIONID_LEN);
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CRC32
|
||||
/*
|
||||
* nfs_session_id_hash - calculate the crc32 hash for the session id
|
||||
* @session - pointer to session
|
||||
*/
|
||||
#define nfs_session_id_hash(sess_id) \
|
||||
(~crc32_le(0xFFFFFFFF, &(sess_id)->data[0], sizeof((sess_id)->data)))
|
||||
#else
|
||||
#define nfs_session_id_hash(session) (0)
|
||||
#endif
|
||||
#else /* defined(CONFIG_NFS_V4_1) */
|
||||
|
||||
static inline int nfs4_init_session(struct nfs_client *clp)
|
||||
|
||||
@@ -4,6 +4,7 @@ config NFSD
|
||||
depends on INET
|
||||
depends on FILE_LOCKING
|
||||
depends on FSNOTIFY
|
||||
select CRC32
|
||||
select LOCKD
|
||||
select SUNRPC
|
||||
select EXPORTFS
|
||||
|
||||
@@ -4941,7 +4941,7 @@ static void nfsd_break_one_deleg(struct nfs4_delegation *dp)
|
||||
queued = nfsd4_run_cb(&dp->dl_recall);
|
||||
WARN_ON_ONCE(!queued);
|
||||
if (!queued)
|
||||
nfs4_put_stid(&dp->dl_stid);
|
||||
refcount_dec(&dp->dl_stid.sc_count);
|
||||
}
|
||||
|
||||
/* Called from break_lease() with flc_lock held. */
|
||||
|
||||
@@ -263,7 +263,6 @@ static inline bool fh_fsid_match(const struct knfsd_fh *fh1,
|
||||
return true;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_CRC32
|
||||
/**
|
||||
* knfsd_fh_hash - calculate the crc32 hash for the filehandle
|
||||
* @fh - pointer to filehandle
|
||||
@@ -275,12 +274,6 @@ static inline u32 knfsd_fh_hash(const struct knfsd_fh *fh)
|
||||
{
|
||||
return ~crc32_le(0xFFFFFFFF, fh->fh_raw, fh->fh_size);
|
||||
}
|
||||
#else
|
||||
static inline u32 knfsd_fh_hash(const struct knfsd_fh *fh)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
|
||||
/**
|
||||
* fh_clear_pre_post_attrs - Reset pre/post attributes
|
||||
|
||||
@@ -241,6 +241,7 @@ static inline struct bdi_writeback *inode_to_wb(const struct inode *inode)
|
||||
{
|
||||
#ifdef CONFIG_LOCKDEP
|
||||
WARN_ON_ONCE(debug_locks &&
|
||||
(inode->i_sb->s_iflags & SB_I_CGROUPWB) &&
|
||||
(!lockdep_is_held(&inode->i_lock) &&
|
||||
!lockdep_is_held(&inode->i_mapping->i_pages.xa_lock) &&
|
||||
!lockdep_is_held(&inode->i_wb->list_lock)));
|
||||
|
||||
@@ -10,6 +10,7 @@
|
||||
|
||||
#include <linux/sunrpc/msg_prot.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/crc32.h>
|
||||
#include <uapi/linux/nfs.h>
|
||||
|
||||
/*
|
||||
@@ -44,4 +45,16 @@ enum nfs3_stable_how {
|
||||
/* used by direct.c to mark verf as invalid */
|
||||
NFS_INVALID_STABLE_HOW = -1
|
||||
};
|
||||
|
||||
/**
|
||||
* nfs_fhandle_hash - calculate the crc32 hash for the filehandle
|
||||
* @fh - pointer to filehandle
|
||||
*
|
||||
* returns a crc32 hash for the filehandle that is compatible with
|
||||
* the one displayed by "wireshark".
|
||||
*/
|
||||
static inline u32 nfs_fhandle_hash(const struct nfs_fh *fh)
|
||||
{
|
||||
return ~crc32_le(0xFFFFFFFF, &fh->data[0], fh->size);
|
||||
}
|
||||
#endif /* _LINUX_NFS_H */
|
||||
|
||||
@@ -86,7 +86,7 @@ static bool sugov_should_update_freq(struct sugov_policy *sg_policy, u64 time)
|
||||
|
||||
if (unlikely(sg_policy->limits_changed)) {
|
||||
sg_policy->limits_changed = false;
|
||||
sg_policy->need_freq_update = cpufreq_driver_test_flags(CPUFREQ_NEED_UPDATE_LIMITS);
|
||||
sg_policy->need_freq_update = true;
|
||||
return true;
|
||||
}
|
||||
|
||||
@@ -98,10 +98,22 @@ static bool sugov_should_update_freq(struct sugov_policy *sg_policy, u64 time)
|
||||
static bool sugov_update_next_freq(struct sugov_policy *sg_policy, u64 time,
|
||||
unsigned int next_freq)
|
||||
{
|
||||
if (sg_policy->need_freq_update)
|
||||
if (sg_policy->need_freq_update) {
|
||||
sg_policy->need_freq_update = false;
|
||||
else if (sg_policy->next_freq == next_freq)
|
||||
/*
|
||||
* The policy limits have changed, but if the return value of
|
||||
* cpufreq_driver_resolve_freq() after applying the new limits
|
||||
* is still equal to the previously selected frequency, the
|
||||
* driver callback need not be invoked unless the driver
|
||||
* specifically wants that to happen on every update of the
|
||||
* policy limits.
|
||||
*/
|
||||
if (sg_policy->next_freq == next_freq &&
|
||||
!cpufreq_driver_test_flags(CPUFREQ_NEED_UPDATE_LIMITS))
|
||||
return false;
|
||||
} else if (sg_policy->next_freq == next_freq) {
|
||||
return false;
|
||||
}
|
||||
|
||||
sg_policy->next_freq = next_freq;
|
||||
sg_policy->last_freq_update_time = time;
|
||||
|
||||
@@ -6248,11 +6248,12 @@ static void process_adv_report(struct hci_dev *hdev, u8 type, bdaddr_t *bdaddr,
|
||||
* event or send an immediate device found event if the data
|
||||
* should not be stored for later.
|
||||
*/
|
||||
if (!ext_adv && !has_pending_adv_report(hdev)) {
|
||||
if (!has_pending_adv_report(hdev)) {
|
||||
/* If the report will trigger a SCAN_REQ store it for
|
||||
* later merging.
|
||||
*/
|
||||
if (type == LE_ADV_IND || type == LE_ADV_SCAN_IND) {
|
||||
if (!ext_adv && (type == LE_ADV_IND ||
|
||||
type == LE_ADV_SCAN_IND)) {
|
||||
store_pending_adv_report(hdev, bdaddr, bdaddr_type,
|
||||
rssi, flags, data, len);
|
||||
return;
|
||||
|
||||
@@ -4162,7 +4162,8 @@ static struct l2cap_chan *l2cap_connect(struct l2cap_conn *conn,
|
||||
|
||||
/* Check if the ACL is secure enough (if not SDP) */
|
||||
if (psm != cpu_to_le16(L2CAP_PSM_SDP) &&
|
||||
!hci_conn_check_link_mode(conn->hcon)) {
|
||||
(!hci_conn_check_link_mode(conn->hcon) ||
|
||||
!l2cap_check_enc_key_size(conn->hcon))) {
|
||||
conn->disc_reason = HCI_ERROR_AUTH_FAILURE;
|
||||
result = L2CAP_CR_SEC_BLOCK;
|
||||
goto response;
|
||||
|
||||
@@ -715,8 +715,8 @@ static int br_vlan_add_existing(struct net_bridge *br,
|
||||
u16 flags, bool *changed,
|
||||
struct netlink_ext_ack *extack)
|
||||
{
|
||||
bool would_change = __vlan_flags_would_change(vlan, flags);
|
||||
bool becomes_brentry = false;
|
||||
bool would_change = false;
|
||||
int err;
|
||||
|
||||
if (!br_vlan_is_brentry(vlan)) {
|
||||
@@ -725,6 +725,8 @@ static int br_vlan_add_existing(struct net_bridge *br,
|
||||
return -EINVAL;
|
||||
|
||||
becomes_brentry = true;
|
||||
} else {
|
||||
would_change = __vlan_flags_would_change(vlan, flags);
|
||||
}
|
||||
|
||||
/* Master VLANs that aren't brentries weren't notified before,
|
||||
|
||||
@@ -180,7 +180,7 @@ static int dsa_port_do_tag_8021q_vlan_del(struct dsa_port *dp, u16 vid)
|
||||
|
||||
err = ds->ops->tag_8021q_vlan_del(ds, port, vid);
|
||||
if (err) {
|
||||
refcount_inc(&v->refcount);
|
||||
refcount_set(&v->refcount, 1);
|
||||
return err;
|
||||
}
|
||||
|
||||
|
||||
@@ -688,6 +688,9 @@ static void ieee80211_do_stop(struct ieee80211_sub_if_data *sdata, bool going_do
|
||||
if (sdata->vif.type == NL80211_IFTYPE_AP_VLAN)
|
||||
ieee80211_txq_remove_vlan(local, sdata);
|
||||
|
||||
if (sdata->vif.txq)
|
||||
ieee80211_txq_purge(sdata->local, to_txq_info(sdata->vif.txq));
|
||||
|
||||
sdata->bss = NULL;
|
||||
|
||||
if (local->open_count == 0)
|
||||
|
||||
@@ -551,6 +551,9 @@ static int mctp_sk_hash(struct sock *sk)
|
||||
{
|
||||
struct net *net = sock_net(sk);
|
||||
|
||||
/* Bind lookup runs under RCU, remain live during that. */
|
||||
sock_set_flag(sk, SOCK_RCU_FREE);
|
||||
|
||||
mutex_lock(&net->mctp.bind_lock);
|
||||
sk_add_node_rcu(sk, &net->mctp.binds);
|
||||
mutex_unlock(&net->mctp.bind_lock);
|
||||
|
||||
@@ -2860,7 +2860,8 @@ static int validate_set(const struct nlattr *a,
|
||||
size_t key_len;
|
||||
|
||||
/* There can be only one key in a action */
|
||||
if (nla_total_size(nla_len(ovs_key)) != nla_len(a))
|
||||
if (!nla_ok(ovs_key, nla_len(a)) ||
|
||||
nla_total_size(nla_len(ovs_key)) != nla_len(a))
|
||||
return -EINVAL;
|
||||
|
||||
key_len = nla_len(ovs_key);
|
||||
|
||||
@@ -63,6 +63,10 @@
|
||||
#define CDC_WSA_TX_SPKR_PROT_CLK_DISABLE 0
|
||||
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK GENMASK(3, 0)
|
||||
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K 0
|
||||
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K 1
|
||||
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K 2
|
||||
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K 3
|
||||
#define CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K 4
|
||||
#define CDC_WSA_TX0_SPKR_PROT_PATH_CFG0 (0x0248)
|
||||
#define CDC_WSA_TX1_SPKR_PROT_PATH_CTL (0x0264)
|
||||
#define CDC_WSA_TX1_SPKR_PROT_PATH_CFG0 (0x0268)
|
||||
@@ -344,6 +348,7 @@ struct wsa_macro {
|
||||
int ear_spkr_gain;
|
||||
int spkr_gain_offset;
|
||||
int spkr_mode;
|
||||
u32 pcm_rate_vi;
|
||||
int is_softclip_on[WSA_MACRO_SOFTCLIP_MAX];
|
||||
int softclip_clk_users[WSA_MACRO_SOFTCLIP_MAX];
|
||||
struct regmap *regmap;
|
||||
@@ -971,6 +976,7 @@ static int wsa_macro_hw_params(struct snd_pcm_substream *substream,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct snd_soc_component *component = dai->component;
|
||||
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
|
||||
int ret;
|
||||
|
||||
switch (substream->stream) {
|
||||
@@ -982,6 +988,11 @@ static int wsa_macro_hw_params(struct snd_pcm_substream *substream,
|
||||
__func__, params_rate(params));
|
||||
return ret;
|
||||
}
|
||||
break;
|
||||
case SNDRV_PCM_STREAM_CAPTURE:
|
||||
if (dai->id == WSA_MACRO_AIF_VI)
|
||||
wsa->pcm_rate_vi = params_rate(params);
|
||||
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
@@ -1139,6 +1150,67 @@ static void wsa_macro_mclk_enable(struct wsa_macro *wsa, bool mclk_enable)
|
||||
}
|
||||
}
|
||||
|
||||
static void wsa_macro_enable_disable_vi_sense(struct snd_soc_component *component, bool enable,
|
||||
u32 tx_reg0, u32 tx_reg1, u32 val)
|
||||
{
|
||||
if (enable) {
|
||||
/* Enable V&I sensing */
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
|
||||
val);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
|
||||
val);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_NO_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_NO_RESET);
|
||||
} else {
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
|
||||
}
|
||||
}
|
||||
|
||||
static void wsa_macro_enable_disable_vi_feedback(struct snd_soc_component *component,
|
||||
bool enable, u32 rate)
|
||||
{
|
||||
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
|
||||
|
||||
if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI]))
|
||||
wsa_macro_enable_disable_vi_sense(component, enable,
|
||||
CDC_WSA_TX0_SPKR_PROT_PATH_CTL,
|
||||
CDC_WSA_TX1_SPKR_PROT_PATH_CTL, rate);
|
||||
|
||||
if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI]))
|
||||
wsa_macro_enable_disable_vi_sense(component, enable,
|
||||
CDC_WSA_TX2_SPKR_PROT_PATH_CTL,
|
||||
CDC_WSA_TX3_SPKR_PROT_PATH_CTL, rate);
|
||||
}
|
||||
|
||||
static int wsa_macro_mclk_event(struct snd_soc_dapm_widget *w,
|
||||
struct snd_kcontrol *kcontrol, int event)
|
||||
{
|
||||
@@ -1155,58 +1227,37 @@ static int wsa_macro_enable_vi_feedback(struct snd_soc_dapm_widget *w,
|
||||
{
|
||||
struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm);
|
||||
struct wsa_macro *wsa = snd_soc_component_get_drvdata(component);
|
||||
u32 tx_reg0, tx_reg1;
|
||||
u32 rate_val;
|
||||
|
||||
if (test_bit(WSA_MACRO_TX0, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) {
|
||||
tx_reg0 = CDC_WSA_TX0_SPKR_PROT_PATH_CTL;
|
||||
tx_reg1 = CDC_WSA_TX1_SPKR_PROT_PATH_CTL;
|
||||
} else if (test_bit(WSA_MACRO_TX1, &wsa->active_ch_mask[WSA_MACRO_AIF_VI])) {
|
||||
tx_reg0 = CDC_WSA_TX2_SPKR_PROT_PATH_CTL;
|
||||
tx_reg1 = CDC_WSA_TX3_SPKR_PROT_PATH_CTL;
|
||||
switch (wsa->pcm_rate_vi) {
|
||||
case 8000:
|
||||
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K;
|
||||
break;
|
||||
case 16000:
|
||||
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_16K;
|
||||
break;
|
||||
case 24000:
|
||||
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_24K;
|
||||
break;
|
||||
case 32000:
|
||||
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_32K;
|
||||
break;
|
||||
case 48000:
|
||||
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_48K;
|
||||
break;
|
||||
default:
|
||||
rate_val = CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K;
|
||||
break;
|
||||
}
|
||||
|
||||
switch (event) {
|
||||
case SND_SOC_DAPM_POST_PMU:
|
||||
/* Enable V&I sensing */
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_PCM_RATE_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_PCM_RATE_8K);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_ENABLE);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_NO_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_NO_RESET);
|
||||
/* Enable V&I sensing */
|
||||
wsa_macro_enable_disable_vi_feedback(component, true, rate_val);
|
||||
break;
|
||||
case SND_SOC_DAPM_POST_PMD:
|
||||
/* Disable V&I sensing */
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_RESET);
|
||||
snd_soc_component_update_bits(component, tx_reg0,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
|
||||
snd_soc_component_update_bits(component, tx_reg1,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_EN_MASK,
|
||||
CDC_WSA_TX_SPKR_PROT_CLK_DISABLE);
|
||||
wsa_macro_enable_disable_vi_feedback(component, false, rate_val);
|
||||
break;
|
||||
}
|
||||
|
||||
|
||||
@@ -126,7 +126,7 @@ void kmem_cache_free(struct kmem_cache *cachep, void *objp)
|
||||
void kmem_cache_free_bulk(struct kmem_cache *cachep, size_t size, void **list)
|
||||
{
|
||||
if (kmalloc_verbose)
|
||||
pr_debug("Bulk free %p[0-%lu]\n", list, size - 1);
|
||||
pr_debug("Bulk free %p[0-%zu]\n", list, size - 1);
|
||||
|
||||
pthread_mutex_lock(&cachep->lock);
|
||||
for (int i = 0; i < size; i++)
|
||||
@@ -144,7 +144,7 @@ int kmem_cache_alloc_bulk(struct kmem_cache *cachep, gfp_t gfp, size_t size,
|
||||
size_t i;
|
||||
|
||||
if (kmalloc_verbose)
|
||||
pr_debug("Bulk alloc %lu\n", size);
|
||||
pr_debug("Bulk alloc %zu\n", size);
|
||||
|
||||
pthread_mutex_lock(&cachep->lock);
|
||||
if (cachep->nr_objs >= size) {
|
||||
|
||||
Reference in New Issue
Block a user