From e21d349ac86871341be653a83f78653382fef44e Mon Sep 17 00:00:00 2001 From: Ding Wei Date: Wed, 27 May 2020 18:25:16 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3368 add clk-rates setting for vdpu and rkvdec Change-Id: Ibe2411fc99892981bb6c1af16187f646aa018a1e Signed-off-by: Ding Wei --- arch/arm64/boot/dts/rockchip/rk3368.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 73114dd62ddf..0d02a9faab8e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -1700,6 +1700,10 @@ <&cru SCLK_HEVC_CORE>, <&cru SCLK_HEVC_CABAC>; clock-names = "aclk_vcodec", "hclk_vcodec", "clk_core", "clk_cabac"; + rockchip,normal-rates = <300000000>, <0>, <200000000>, + <200000000>; + rockchip,advanced-rates = <500000000>, <0>, <400000000>, + <400000000>; resets = <&cru SRST_VIDEO_AXI>, <&cru SRST_VIDEO_AHB>, <&cru SRST_VIDEO>; reset-names = "shared_video_a", "shared_video_h", "video_core"; @@ -1735,6 +1739,8 @@ interrupt-names = "irq_dec"; clocks = <&cru ACLK_VIDEO>, <&cru HCLK_VIDEO>; clock-names = "aclk_vcodec", "hclk_vcodec"; + rockchip,normal-rates = <300000000>, <0>; + rockchip,advanced-rates = <600000000>, <0>; resets = <&cru SRST_VIDEO_AXI>, <&cru SRST_VIDEO_AHB>; reset-names = "shared_video_a", "shared_video_h"; iommus = <&vpu_mmu>;