From e2b7ae56ad9454fdd0dcef0a34cd2217f322490b Mon Sep 17 00:00:00 2001 From: Jianqun Xu Date: Fri, 16 Jul 2021 17:05:03 +0800 Subject: [PATCH] drm/rockchip: fix error return for rockchip_gem_prime_sgl_sync_range Fixes: e68e6d1a35b7 ("drm/rockchip: add dmabuf sync partial to dma_buf_ops") Change-Id: Iaeb2ec6ad605ed06c5f6cbad0705b7977a3f7cfa Signed-off-by: Jianqun Xu --- drivers/gpu/drm/rockchip/rockchip_drm_gem.c | 12 ------------ 1 file changed, 12 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c index aa2ab2b97c27..01fb23a4ed87 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_gem.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_gem.c @@ -1038,18 +1038,6 @@ static int rockchip_gem_prime_sgl_sync_range(struct device *dev, unsigned int len = 0; dma_addr_t sg_dma_addr; - for_each_sg(sgl, sg, nents, i) { - if (sg_dma_len(sg) == 0) - break; - - if (i > 0) { - pr_warn_ratelimited("Partial cmo only supported with 1 segment\n" - "is dma_set_max_seg_size being set on dev:%s\n", - dev_name(dev)); - return -EINVAL; - } - } - for_each_sg(sgl, sg, nents, i) { unsigned int sg_offset, sg_left, size = 0;