mirror of
https://github.com/hardkernel/linux.git
synced 2026-06-09 12:17:12 +09:00
ASoC: rockchip: add support for vad preprocess
Change-Id: I46d1ac01cb21d7a1f5406859d22864568f3756de Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
This commit is contained in:
Sugar Zhang
@@ -5,6 +5,12 @@ snd-soc-rockchip-multi-dais-objs := rockchip_multi_dais.o rockchip_multi_dais_pc
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snd-soc-rockchip-pdm-objs := rockchip_pdm.o
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snd-soc-rockchip-spdif-objs := rockchip_spdif.o
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snd-soc-rockchip-vad-objs := rockchip_vad.o
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ifdef CONFIG_THUMB2_KERNEL
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snd-soc-rockchip-vad-$(CONFIG_THUMB2_KERNEL) += vad_preprocess_thumb.o
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else
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snd-soc-rockchip-vad-$(CONFIG_ARM64) += vad_preprocess_arm64.o
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snd-soc-rockchip-vad-$(CONFIG_ARM) += vad_preprocess_arm.o
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endif
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obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S) += snd-soc-rockchip-i2s.o
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obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S_TDM) += snd-soc-rockchip-i2s-tdm.o
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29
sound/soc/rockchip/vad_preprocess.h
Normal file
29
sound/soc/rockchip/vad_preprocess.h
Normal file
@@ -0,0 +1,29 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Rockchip VAD Preprocess
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*
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* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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*/
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#ifndef _ROCKCHIP_VAD_PREPROCESS_H
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#define _ROCKCHIP_VAD_PREPROCESS_H
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struct vad_params {
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int noise_abs;
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int noise_level;
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int sound_thd;
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int vad_con_thd;
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int voice_gain;
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};
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struct vad_uparams {
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int noise_abs;
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};
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void vad_preprocess_init(struct vad_params *params);
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void vad_preprocess_destroy(void);
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void vad_preprocess_update_params(struct vad_uparams *uparams);
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int vad_preprocess(int data);
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#endif
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348
sound/soc/rockchip/vad_preprocess_arm.S
Normal file
348
sound/soc/rockchip/vad_preprocess_arm.S
Normal file
@@ -0,0 +1,348 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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/*
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* Rockchip VAD Preprocess
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*
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* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
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*
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*/
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.arch armv7-a
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.fpu softvfp
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.eabi_attribute 20, 1
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.eabi_attribute 21, 1
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.eabi_attribute 23, 3
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.eabi_attribute 24, 1
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.eabi_attribute 25, 1
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.eabi_attribute 26, 2
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.eabi_attribute 30, 4
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.eabi_attribute 34, 1
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.eabi_attribute 18, 4
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.file "vad_preprocess_arm.S"
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.text
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.align 2
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.global vad_preprocess_init
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.type vad_preprocess_init, %function
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vad_preprocess_init:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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ldr r2, .L4
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ldr r3, [r0, #8]
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strh r3, [r2] @ movhi
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ldr r3, [r0, #4]
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strh r3, [r2, #2] @ movhi
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ldr r3, [r0, #12]
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strh r3, [r2, #4] @ movhi
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ldr r3, [r0]
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strh r3, [r2, #6] @ movhi
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ldr r3, [r0, #16]
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tst r3, #512
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ubfx r3, r3, #0, #9
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eorne r3, r3, #65280
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eorne r3, r3, #255
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uxtheq r3, r3
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strh r3, [r2, #8] @ movhi
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bx lr
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.L5:
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.align 2
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.L4:
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.word .LANCHOR0
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.fnend
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.size vad_preprocess_init, .-vad_preprocess_init
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.align 2
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.global vad_preprocess
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.type vad_preprocess, %function
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vad_preprocess:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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ldr r3, .L27
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stmfd sp!, {r4, r5, r6, r7, r8, r9, lr}
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.save {r4, r5, r6, r7, r8, r9, lr}
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movw lr, #15349
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ldrsh r2, [r3, #8]
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ldrh ip, [r3, #10]
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ldr r1, .L27+4
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mul r0, r2, r0
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ldrh r4, [r3, #12]
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smulbb r1, ip, r1
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add r2, r0, #31
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cmp r0, #0
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movlt r0, r2
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ldrh r2, [r3, #14]
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mov r0, r0, asr #5
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mla r1, lr, r0, r1
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smlabb r1, r4, lr, r1
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ldr r4, .L27+8
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ldrsh lr, [r3, #16]
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smulbb r4, r2, r4
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rsb r4, r4, r1
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movw r1, #14379
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mls r4, lr, r1, r4
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cmp r4, #1
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mov r5, r4, asr #31
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sbcs r1, r5, #0
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blt .L7
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adds r4, r4, #8192
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adc r5, r5, #0
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b .L24
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.L7:
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subs r4, r4, #8192
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movw r8, #16383
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sbc r5, r5, #0
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mov r9, #0
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mov r6, r5, asr #31
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mov r7, r6, asr #31
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and r6, r6, r8
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and r7, r7, r9
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adds r4, r4, r6
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adc r5, r5, r7
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.L24:
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strh ip, [r3, #12] @ movhi
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mov r1, r4, lsr #14
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ldrh ip, [r3, #18]
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orr r1, r1, r5, asl #18
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strh r0, [r3, #10] @ movhi
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add ip, ip, #1
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uxth r1, r1
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ldr r0, .L27+12
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uxth ip, ip
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strh r1, [r3, #14] @ movhi
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strh ip, [r3, #18] @ movhi
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sxth r1, r1
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sxth ip, ip
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cmp r1, #0
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and r0, r0, ip
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rsblt r1, r1, #0
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cmp r0, #0
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strh r2, [r3, #16] @ movhi
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sublt r0, r0, #1
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ldr r2, [r3, #20]
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mvnlt r0, r0, asl #24
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add r2, r1, r2
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mvnlt r0, r0, lsr #24
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addlt r0, r0, #1
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cmp r0, #0
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str r2, [r3, #20]
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bne .L9
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ldr r0, [r3, #24]
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ldr ip, .L27
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cmp r0, #99
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bgt .L11
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add r2, r2, #128
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add ip, ip, r0, asl #1
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add lr, r2, #255
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cmp r2, #0
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movlt r2, lr
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mov r2, r2, asr #8
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strh r2, [ip, #28] @ movhi
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b .L12
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.L11:
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add lr, ip, #28
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add ip, ip, #226
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.L13:
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ldrh r4, [lr, #2]
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strh r4, [lr], #2 @ movhi
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cmp lr, ip
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bne .L13
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add r2, r2, #128
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add ip, r2, #255
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cmp r2, #0
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movlt r2, ip
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mov r2, r2, asr #8
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strh r2, [r3, #226] @ movhi
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.L12:
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cmp r0, #99
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ldrh r2, [r3, #28]
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ldrle r4, .L27+16
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movle lr, #1
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bgt .L26
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.L15:
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cmp lr, r0
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bge .L17
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ldrsh ip, [r4], #2
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sxth r2, r2
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add lr, lr, #1
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cmp ip, r2
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movge ip, r2
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uxth r2, ip
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b .L15
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.L26:
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ldr ip, .L27+16
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add r4, ip, #198
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.L18:
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ldrsh lr, [ip], #2
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sxth r2, r2
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cmp r2, lr
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movge r2, lr
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cmp ip, r4
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uxth r2, r2
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bne .L18
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.L17:
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ldrh lr, [r3, #6]
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mov ip, #128
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mov r4, #230
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add r0, r0, #1
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str r0, [r3, #24]
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smlabb ip, lr, r4, ip
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mov lr, #26
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smlabb r2, r2, lr, ip
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add ip, r2, #255
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cmp r2, #0
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movlt r2, ip
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mov r2, r2, asr #8
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strh r2, [r3, #6] @ movhi
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mov r2, #0
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str r2, [r3, #20]
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strh r2, [r3, #18] @ movhi
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.L9:
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ldrh r2, [r3, #6]
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ldrh ip, [r3, #2]
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ldrsh r3, [r3]
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ldr r0, .L27
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smlabb r3, r2, ip, r3
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add r2, r0, #428
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cmp r1, r3
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ble .L19
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ldrh r3, [r2]
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ldrsh r0, [r0, #4]
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add r3, r3, #1
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uxth r3, r3
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strh r3, [r2] @ movhi
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sxth r3, r3
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cmp r0, r3
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movge r0, #0
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movlt r0, #1
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ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
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.L19:
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mov r0, #0
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strh r0, [r2] @ movhi
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ldmfd sp!, {r4, r5, r6, r7, r8, r9, pc}
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.L28:
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.align 2
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.L27:
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.word .LANCHOR0
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.word -30697
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.word -30632
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.word -2147483393
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.word .LANCHOR0+30
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.fnend
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.size vad_preprocess, .-vad_preprocess
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.align 2
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.global vad_preprocess_destroy
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.type vad_preprocess_destroy, %function
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vad_preprocess_destroy:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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ldr r2, .L32
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mov r3, #0
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mov ip, r3
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strh r3, [r2, #10] @ movhi
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strh r3, [r2, #12] @ movhi
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strh r3, [r2, #14] @ movhi
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strh r3, [r2, #16] @ movhi
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strh r3, [r2, #18] @ movhi
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add r2, r2, #428
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strh r3, [r2] @ movhi
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.L30:
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ldr r2, .L32
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mov r1, #0
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add r0, r2, #28
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strh ip, [r3, r0] @ movhi
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add r3, r3, #2
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cmp r3, #200
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bne .L30
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mov r3, #32
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str r1, [r2, #20]
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strh r1, [r2, #6] @ movhi
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strh r3, [r2, #8] @ movhi
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str r1, [r2, #24]
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bx lr
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.L33:
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.align 2
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.L32:
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.word .LANCHOR0
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.fnend
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.size vad_preprocess_destroy, .-vad_preprocess_destroy
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.align 2
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.global vad_preprocess_update_params
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.type vad_preprocess_update_params, %function
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vad_preprocess_update_params:
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.fnstart
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@ args = 0, pretend = 0, frame = 0
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@ frame_needed = 0, uses_anonymous_args = 0
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@ link register save eliminated.
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ldr r3, .L35
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ldrsh r3, [r3, #6]
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str r3, [r0]
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bx lr
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.L36:
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.align 2
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.L35:
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.word .LANCHOR0
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.fnend
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.size vad_preprocess_update_params, .-vad_preprocess_update_params
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.bss
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.align 2
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.LANCHOR0 = . + 0
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.type g_sound_thd, %object
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.size g_sound_thd, 2
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g_sound_thd:
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.space 2
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.type g_noise_level, %object
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.size g_noise_level, 2
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g_noise_level:
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.space 2
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.type g_vad_con_thd, %object
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.size g_vad_con_thd, 2
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g_vad_con_thd:
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.space 2
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.type g_noise_abs, %object
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.size g_noise_abs, 2
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g_noise_abs:
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.space 2
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.type g_signal_gain, %object
|
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.size g_signal_gain, 2
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g_signal_gain:
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.space 2
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.type g_xn_1, %object
|
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.size g_xn_1, 2
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g_xn_1:
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.space 2
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.type g_xn_2, %object
|
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.size g_xn_2, 2
|
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g_xn_2:
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.space 2
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.type g_yn_1, %object
|
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.size g_yn_1, 2
|
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g_yn_1:
|
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.space 2
|
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.type g_yn_2, %object
|
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.size g_yn_2, 2
|
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g_yn_2:
|
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.space 2
|
||||
.type g_sample_cnt, %object
|
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.size g_sample_cnt, 2
|
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g_sample_cnt:
|
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.space 2
|
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.type g_sum_abs_frm, %object
|
||||
.size g_sum_abs_frm, 4
|
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g_sum_abs_frm:
|
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.space 4
|
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.type frm_count, %object
|
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.size frm_count, 4
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frm_count:
|
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.space 4
|
||||
.type g_ave_abs_rec, %object
|
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.size g_ave_abs_rec, 400
|
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g_ave_abs_rec:
|
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.space 400
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||||
.type g_vad_cnt, %object
|
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.size g_vad_cnt, 2
|
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g_vad_cnt:
|
||||
.space 2
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||||
.ident "GCC: (GNU) 4.9 20150123 (prerelease)"
|
||||
.section .note.GNU-stack,"",%progbits
|
||||
273
sound/soc/rockchip/vad_preprocess_arm64.S
Normal file
273
sound/soc/rockchip/vad_preprocess_arm64.S
Normal file
@@ -0,0 +1,273 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Rockchip VAD Preprocess
|
||||
*
|
||||
* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
|
||||
*
|
||||
*/
|
||||
|
||||
.arch armv8-a
|
||||
.file "vad_preprocess_arm64.S"
|
||||
.text
|
||||
.align 2
|
||||
.global vad_preprocess_init
|
||||
.type vad_preprocess_init, %function
|
||||
vad_preprocess_init:
|
||||
adrp x2, .LANCHOR0
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||||
add x1, x2, :lo12:.LANCHOR0
|
||||
ldr w3, [x0, 8]
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strh w3, [x2, #:lo12:.LANCHOR0]
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||||
ldr w2, [x0, 4]
|
||||
strh w2, [x1, 2]
|
||||
ldr w2, [x0, 12]
|
||||
strh w2, [x1, 4]
|
||||
ldr w2, [x0]
|
||||
strh w2, [x1, 6]
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||||
ldr w2, [x0, 16]
|
||||
and w0, w2, 511
|
||||
tbz x2, 9, .L2
|
||||
mvn w0, w0
|
||||
.L2:
|
||||
strh w0, [x1, 8]
|
||||
ret
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||||
.size vad_preprocess_init, .-vad_preprocess_init
|
||||
.align 2
|
||||
.global vad_preprocess
|
||||
.type vad_preprocess, %function
|
||||
vad_preprocess:
|
||||
adrp x4, .LANCHOR0
|
||||
add x2, x4, :lo12:.LANCHOR0
|
||||
mov w8, 15349
|
||||
ldrsh w1, [x2, 8]
|
||||
ldrsh w7, [x2, 10]
|
||||
ldrsh w6, [x2, 12]
|
||||
ldrsh w3, [x2, 16]
|
||||
mul w0, w1, w0
|
||||
mov w1, 32
|
||||
sdiv w0, w0, w1
|
||||
ldrsh w1, [x2, 14]
|
||||
mov w2, -30697
|
||||
mul w2, w7, w2
|
||||
mul w5, w0, w8
|
||||
sxtw x2, w2
|
||||
add x2, x2, x5, sxtw
|
||||
smaddl x3, w3, w8, x2
|
||||
mov w2, -30632
|
||||
smsubl x2, w6, w2, x3
|
||||
mov w3, 14379
|
||||
smsubl x1, w1, w3, x2
|
||||
cmp x1, 0
|
||||
ble .L5
|
||||
add x1, x1, 8192
|
||||
asr x1, x1, 14
|
||||
.L6:
|
||||
add x2, x4, :lo12:.LANCHOR0
|
||||
sxth w1, w1
|
||||
cmp w1, 0
|
||||
ldrh w3, [x2, 18]
|
||||
strh w0, [x2, 10]
|
||||
add w3, w3, 1
|
||||
ldr w0, [x2, 20]
|
||||
sxth w3, w3
|
||||
strh w1, [x2, 12]
|
||||
csneg w1, w1, w1, ge
|
||||
strh w3, [x2, 18]
|
||||
negs w5, w3
|
||||
add w0, w1, w0
|
||||
strh w7, [x2, 16]
|
||||
and w3, w3, 255
|
||||
strh w6, [x2, 14]
|
||||
and w5, w5, 255
|
||||
str w0, [x2, 20]
|
||||
csneg w3, w3, w5, mi
|
||||
cbnz w3, .L7
|
||||
ldr w3, [x2, 24]
|
||||
cmp w3, 99
|
||||
bgt .L8
|
||||
add w0, w0, 128
|
||||
mov w5, 256
|
||||
add x2, x2, 32
|
||||
sdiv w0, w0, w5
|
||||
strh w0, [x2, w3, sxtw 1]
|
||||
.L9:
|
||||
add x2, x4, :lo12:.LANCHOR0
|
||||
cmp w3, 99
|
||||
ldrsh w0, [x2, 32]
|
||||
bgt .L11
|
||||
add x2, x2, 32
|
||||
mov x5, 0
|
||||
.L12:
|
||||
add x5, x5, 1
|
||||
cmp w3, w5
|
||||
bgt .L13
|
||||
.L14:
|
||||
add x2, x4, :lo12:.LANCHOR0
|
||||
mov w6, 230
|
||||
add w3, w3, 1
|
||||
ldrsh w5, [x2, 6]
|
||||
strh wzr, [x2, 18]
|
||||
stp wzr, w3, [x2, 20]
|
||||
mul w5, w5, w6
|
||||
mov w6, 26
|
||||
add w5, w5, 128
|
||||
madd w0, w0, w6, w5
|
||||
mov w5, 256
|
||||
sdiv w0, w0, w5
|
||||
strh w0, [x2, 6]
|
||||
.L7:
|
||||
add x0, x4, :lo12:.LANCHOR0
|
||||
ldrsh w3, [x4, #:lo12:.LANCHOR0]
|
||||
ldrsh w2, [x0, 6]
|
||||
ldrsh w5, [x0, 2]
|
||||
madd w2, w2, w5, w3
|
||||
cmp w1, w2
|
||||
ble .L16
|
||||
ldrh w1, [x0, 432]
|
||||
add w1, w1, 1
|
||||
sxth w1, w1
|
||||
strh w1, [x0, 432]
|
||||
ldrsh w0, [x0, 4]
|
||||
cmp w0, w1
|
||||
cset w0, lt
|
||||
ret
|
||||
.L5:
|
||||
sub x1, x1, #8192
|
||||
mov x2, 16384
|
||||
sdiv x1, x1, x2
|
||||
b .L6
|
||||
.L8:
|
||||
add x5, x2, 34
|
||||
add x2, x2, 232
|
||||
.L10:
|
||||
ldrh w6, [x5]
|
||||
add x5, x5, 2
|
||||
strh w6, [x5, -4]
|
||||
cmp x2, x5
|
||||
bne .L10
|
||||
add w0, w0, 128
|
||||
mov w5, 256
|
||||
add x2, x4, :lo12:.LANCHOR0
|
||||
sdiv w0, w0, w5
|
||||
strh w0, [x2, 230]
|
||||
b .L9
|
||||
.L13:
|
||||
lsl x6, x5, 1
|
||||
ldrsh w7, [x6, x2]
|
||||
ldrh w6, [x6, x2]
|
||||
cmp w7, w0
|
||||
csel w0, w6, w0, le
|
||||
sxth w0, w0
|
||||
b .L12
|
||||
.L11:
|
||||
add x5, x2, 34
|
||||
add x2, x2, 232
|
||||
.L15:
|
||||
ldrsh w7, [x5]
|
||||
ldrh w6, [x5], 2
|
||||
cmp w7, w0
|
||||
csel w0, w6, w0, le
|
||||
cmp x2, x5
|
||||
sxth w0, w0
|
||||
bne .L15
|
||||
b .L14
|
||||
.L16:
|
||||
strh wzr, [x0, 432]
|
||||
mov w0, 0
|
||||
ret
|
||||
.size vad_preprocess, .-vad_preprocess
|
||||
.align 2
|
||||
.global vad_preprocess_destroy
|
||||
.type vad_preprocess_destroy, %function
|
||||
vad_preprocess_destroy:
|
||||
adrp x0, .LANCHOR0
|
||||
add x0, x0, :lo12:.LANCHOR0
|
||||
add x2, x0, 32
|
||||
mov x1, 0
|
||||
strh wzr, [x0, 10]
|
||||
strh wzr, [x0, 16]
|
||||
strh wzr, [x0, 12]
|
||||
strh wzr, [x0, 14]
|
||||
strh wzr, [x0, 18]
|
||||
strh wzr, [x0, 432]
|
||||
.L21:
|
||||
strh wzr, [x1, x2]
|
||||
add x1, x1, 2
|
||||
cmp x1, 200
|
||||
bne .L21
|
||||
mov w1, 32
|
||||
strh wzr, [x0, 6]
|
||||
strh w1, [x0, 8]
|
||||
stp wzr, wzr, [x0, 20]
|
||||
ret
|
||||
.size vad_preprocess_destroy, .-vad_preprocess_destroy
|
||||
.align 2
|
||||
.global vad_preprocess_update_params
|
||||
.type vad_preprocess_update_params, %function
|
||||
vad_preprocess_update_params:
|
||||
adrp x1, .LANCHOR0+6
|
||||
ldrsh w1, [x1, #:lo12:.LANCHOR0+6]
|
||||
str w1, [x0]
|
||||
ret
|
||||
.size vad_preprocess_update_params, .-vad_preprocess_update_params
|
||||
.bss
|
||||
.align 3
|
||||
.set .LANCHOR0,. + 0
|
||||
.type g_sound_thd, %object
|
||||
.size g_sound_thd, 2
|
||||
g_sound_thd:
|
||||
.zero 2
|
||||
.type g_noise_level, %object
|
||||
.size g_noise_level, 2
|
||||
g_noise_level:
|
||||
.zero 2
|
||||
.type g_vad_con_thd, %object
|
||||
.size g_vad_con_thd, 2
|
||||
g_vad_con_thd:
|
||||
.zero 2
|
||||
.type g_noise_abs, %object
|
||||
.size g_noise_abs, 2
|
||||
g_noise_abs:
|
||||
.zero 2
|
||||
.type g_signal_gain, %object
|
||||
.size g_signal_gain, 2
|
||||
g_signal_gain:
|
||||
.zero 2
|
||||
.type g_xn_1, %object
|
||||
.size g_xn_1, 2
|
||||
g_xn_1:
|
||||
.zero 2
|
||||
.type g_yn_1, %object
|
||||
.size g_yn_1, 2
|
||||
g_yn_1:
|
||||
.zero 2
|
||||
.type g_yn_2, %object
|
||||
.size g_yn_2, 2
|
||||
g_yn_2:
|
||||
.zero 2
|
||||
.type g_xn_2, %object
|
||||
.size g_xn_2, 2
|
||||
g_xn_2:
|
||||
.zero 2
|
||||
.type g_sample_cnt, %object
|
||||
.size g_sample_cnt, 2
|
||||
g_sample_cnt:
|
||||
.zero 2
|
||||
.type g_sum_abs_frm, %object
|
||||
.size g_sum_abs_frm, 4
|
||||
g_sum_abs_frm:
|
||||
.zero 4
|
||||
.type frm_count, %object
|
||||
.size frm_count, 4
|
||||
frm_count:
|
||||
.zero 4
|
||||
.zero 4
|
||||
.type g_ave_abs_rec, %object
|
||||
.size g_ave_abs_rec, 400
|
||||
g_ave_abs_rec:
|
||||
.zero 400
|
||||
.type g_vad_cnt, %object
|
||||
.size g_vad_cnt, 2
|
||||
g_vad_cnt:
|
||||
.zero 2
|
||||
.ident "GCC: (Linaro GCC 6.3-2017.05) 6.3.1 20170404"
|
||||
.section .note.GNU-stack,"",@progbits
|
||||
360
sound/soc/rockchip/vad_preprocess_thumb.S
Normal file
360
sound/soc/rockchip/vad_preprocess_thumb.S
Normal file
@@ -0,0 +1,360 @@
|
||||
/* SPDX-License-Identifier: GPL-2.0 */
|
||||
/*
|
||||
* Rockchip VAD Preprocess
|
||||
*
|
||||
* Copyright (C) 2018 Fuzhou Rockchip Electronics Co., Ltd
|
||||
*
|
||||
*/
|
||||
|
||||
.syntax unified
|
||||
.arch armv7-a
|
||||
.fpu softvfp
|
||||
.eabi_attribute 20, 1
|
||||
.eabi_attribute 21, 1
|
||||
.eabi_attribute 23, 3
|
||||
.eabi_attribute 24, 1
|
||||
.eabi_attribute 25, 1
|
||||
.eabi_attribute 26, 2
|
||||
.eabi_attribute 30, 4
|
||||
.eabi_attribute 34, 1
|
||||
.eabi_attribute 18, 4
|
||||
.thumb
|
||||
.file "vad_preprocess_thumb.S"
|
||||
.text
|
||||
.align 1
|
||||
.global vad_preprocess_init
|
||||
.thumb
|
||||
.thumb_func
|
||||
.type vad_preprocess_init, %function
|
||||
vad_preprocess_init:
|
||||
.fnstart
|
||||
@ args = 0, pretend = 0, frame = 0
|
||||
@ frame_needed = 0, uses_anonymous_args = 0
|
||||
@ link register save eliminated.
|
||||
ldr r2, .L4
|
||||
ldr r3, [r0, #8]
|
||||
strh r3, [r2] @ movhi
|
||||
ldr r3, [r0, #4]
|
||||
strh r3, [r2, #2] @ movhi
|
||||
ldr r3, [r0, #12]
|
||||
strh r3, [r2, #4] @ movhi
|
||||
ldr r3, [r0]
|
||||
strh r3, [r2, #6] @ movhi
|
||||
ldr r3, [r0, #16]
|
||||
tst r3, #512
|
||||
ubfx r3, r3, #0, #9
|
||||
itte ne
|
||||
eorne r3, r3, #65280
|
||||
eorne r3, r3, #255
|
||||
uxtheq r3, r3
|
||||
strh r3, [r2, #8] @ movhi
|
||||
bx lr
|
||||
.L5:
|
||||
.align 2
|
||||
.L4:
|
||||
.word .LANCHOR0
|
||||
.fnend
|
||||
.size vad_preprocess_init, .-vad_preprocess_init
|
||||
.align 1
|
||||
.global vad_preprocess
|
||||
.thumb
|
||||
.thumb_func
|
||||
.type vad_preprocess, %function
|
||||
vad_preprocess:
|
||||
.fnstart
|
||||
@ args = 0, pretend = 0, frame = 0
|
||||
@ frame_needed = 0, uses_anonymous_args = 0
|
||||
ldr r3, .L29
|
||||
movw r2, #34839
|
||||
push {r4, r5, r6, r7, r8, r9, lr}
|
||||
.save {r4, r5, r6, r7, r8, r9, lr}
|
||||
movw r1, #15349
|
||||
ldrsh r5, [r3, #8]
|
||||
muls r0, r5, r0
|
||||
ldrh r7, [r3, #10]
|
||||
it mi
|
||||
addmi r0, r0, #31
|
||||
ldrh r4, [r3, #12]
|
||||
asrs r0, r0, #5
|
||||
ldrh r6, [r3, #14]
|
||||
smulbb r2, r7, r2
|
||||
mla r2, r1, r0, r2
|
||||
smlabb r2, r4, r1, r2
|
||||
movw r1, #34904
|
||||
smulbb r1, r6, r1
|
||||
ldrsh r4, [r3, #16]
|
||||
subs r1, r2, r1
|
||||
movw r2, #14379
|
||||
mls r4, r4, r2, r1
|
||||
cmp r4, #1
|
||||
asr r5, r4, #31
|
||||
sbcs r2, r5, #0
|
||||
blt .L8
|
||||
adds r4, r4, #8192
|
||||
adc r5, r5, #0
|
||||
b .L10
|
||||
.L8:
|
||||
subs r4, r4, #8192
|
||||
adc r5, r5, #-1
|
||||
cmp r4, #0
|
||||
sbcs r2, r5, #0
|
||||
bge .L10
|
||||
movw r8, #16383
|
||||
mov r9, #0
|
||||
adds r4, r4, r8
|
||||
adc r5, r5, r9
|
||||
.L10:
|
||||
lsrs r1, r4, #14
|
||||
ldrh r4, [r3, #18]
|
||||
orr r1, r1, r5, lsl #18
|
||||
ldr r2, .L29+4
|
||||
adds r4, r4, #1
|
||||
strh r0, [r3, #10] @ movhi
|
||||
uxth r1, r1
|
||||
strh r1, [r3, #14] @ movhi
|
||||
uxth r4, r4
|
||||
strh r4, [r3, #18] @ movhi
|
||||
sxth r1, r1
|
||||
ldr r0, [r3, #20]
|
||||
sxth r4, r4
|
||||
cmp r1, #0
|
||||
and r2, r2, r4
|
||||
it lt
|
||||
rsblt r1, r1, #0
|
||||
cmp r2, #0
|
||||
add r0, r0, r1
|
||||
it lt
|
||||
addlt r2, r2, #-1
|
||||
strh r7, [r3, #12] @ movhi
|
||||
it lt
|
||||
ornlt r2, r2, #255
|
||||
strh r6, [r3, #16] @ movhi
|
||||
it lt
|
||||
addlt r2, r2, #1
|
||||
str r0, [r3, #20]
|
||||
cmp r2, #0
|
||||
bne .L11
|
||||
ldr r4, [r3, #24]
|
||||
ldr r2, .L29
|
||||
cmp r4, #99
|
||||
bgt .L13
|
||||
adds r5, r0, #128
|
||||
add r2, r2, r4, lsl #1
|
||||
it mi
|
||||
addwmi r5, r0, #383
|
||||
asrs r5, r5, #8
|
||||
strh r5, [r2, #28] @ movhi
|
||||
b .L15
|
||||
.L13:
|
||||
add r5, r2, #28
|
||||
adds r2, r2, #226
|
||||
.L16:
|
||||
ldrh r6, [r5, #2]
|
||||
strh r6, [r5], #2 @ movhi
|
||||
cmp r5, r2
|
||||
bne .L16
|
||||
adds r2, r0, #128
|
||||
it mi
|
||||
addwmi r2, r0, #383
|
||||
ldr r0, .L29
|
||||
asrs r2, r2, #8
|
||||
strh r2, [r0, #226] @ movhi
|
||||
.L15:
|
||||
cmp r4, #99
|
||||
ldrh r2, [r3, #28]
|
||||
mov r0, #1
|
||||
bgt .L18
|
||||
ldr r5, .L29+8
|
||||
.L19:
|
||||
cmp r0, r4
|
||||
bge .L21
|
||||
ldrsh r6, [r5, r0, lsl #1]
|
||||
sxth r2, r2
|
||||
adds r0, r0, #1
|
||||
cmp r2, r6
|
||||
it ge
|
||||
movge r2, r6
|
||||
uxth r2, r2
|
||||
b .L19
|
||||
.L18:
|
||||
ldr r6, .L29+8
|
||||
.L22:
|
||||
ldrsh r5, [r6, r0, lsl #1]
|
||||
sxth r2, r2
|
||||
adds r0, r0, #1
|
||||
cmp r2, r5
|
||||
it ge
|
||||
movge r2, r5
|
||||
cmp r0, #100
|
||||
uxth r2, r2
|
||||
bne .L22
|
||||
.L21:
|
||||
ldrh r5, [r3, #6]
|
||||
movs r0, #128
|
||||
movs r6, #230
|
||||
adds r4, r4, #1
|
||||
str r4, [r3, #24]
|
||||
smlabb r0, r5, r6, r0
|
||||
movs r5, #26
|
||||
smlabb r2, r2, r5, r0
|
||||
ldr r0, .L29
|
||||
cmp r2, #0
|
||||
it lt
|
||||
addlt r2, r2, #255
|
||||
asrs r2, r2, #8
|
||||
strh r2, [r0, #6] @ movhi
|
||||
movs r2, #0
|
||||
str r2, [r3, #20]
|
||||
strh r2, [r3, #18] @ movhi
|
||||
.L11:
|
||||
ldrh r0, [r3, #6]
|
||||
ldrh r4, [r3, #2]
|
||||
ldrsh r3, [r3]
|
||||
ldr r2, .L29
|
||||
smlabb r3, r0, r4, r3
|
||||
cmp r1, r3
|
||||
ble .L24
|
||||
ldrh r3, [r2, #428]
|
||||
ldrsh r0, [r2, #4]
|
||||
adds r3, r3, #1
|
||||
uxth r3, r3
|
||||
strh r3, [r2, #428] @ movhi
|
||||
sxth r3, r3
|
||||
cmp r0, r3
|
||||
ite ge
|
||||
movge r0, #0
|
||||
movlt r0, #1
|
||||
pop {r4, r5, r6, r7, r8, r9, pc}
|
||||
.L24:
|
||||
movs r0, #0
|
||||
strh r0, [r2, #428] @ movhi
|
||||
pop {r4, r5, r6, r7, r8, r9, pc}
|
||||
.L30:
|
||||
.align 2
|
||||
.L29:
|
||||
.word .LANCHOR0
|
||||
.word -2147483393
|
||||
.word .LANCHOR0+28
|
||||
.fnend
|
||||
.size vad_preprocess, .-vad_preprocess
|
||||
.align 1
|
||||
.global vad_preprocess_destroy
|
||||
.thumb
|
||||
.thumb_func
|
||||
.type vad_preprocess_destroy, %function
|
||||
vad_preprocess_destroy:
|
||||
.fnstart
|
||||
@ args = 0, pretend = 0, frame = 0
|
||||
@ frame_needed = 0, uses_anonymous_args = 0
|
||||
movs r3, #0
|
||||
ldr r2, .L34
|
||||
push {r4, lr}
|
||||
.save {r4, lr}
|
||||
mov r4, r3
|
||||
strh r3, [r2, #10] @ movhi
|
||||
strh r3, [r2, #12] @ movhi
|
||||
strh r3, [r2, #14] @ movhi
|
||||
strh r3, [r2, #16] @ movhi
|
||||
strh r3, [r2, #18] @ movhi
|
||||
strh r3, [r2, #428] @ movhi
|
||||
.L32:
|
||||
ldr r2, .L34
|
||||
movs r1, #0
|
||||
add r0, r2, #28
|
||||
strh r4, [r0, r3, lsl #1] @ movhi
|
||||
adds r3, r3, #1
|
||||
cmp r3, #100
|
||||
bne .L32
|
||||
movs r3, #32
|
||||
str r1, [r2, #20]
|
||||
strh r1, [r2, #6] @ movhi
|
||||
strh r3, [r2, #8] @ movhi
|
||||
str r1, [r2, #24]
|
||||
pop {r4, pc}
|
||||
.L35:
|
||||
.align 2
|
||||
.L34:
|
||||
.word .LANCHOR0
|
||||
.fnend
|
||||
.size vad_preprocess_destroy, .-vad_preprocess_destroy
|
||||
.align 1
|
||||
.global vad_preprocess_update_params
|
||||
.thumb
|
||||
.thumb_func
|
||||
.type vad_preprocess_update_params, %function
|
||||
vad_preprocess_update_params:
|
||||
.fnstart
|
||||
@ args = 0, pretend = 0, frame = 0
|
||||
@ frame_needed = 0, uses_anonymous_args = 0
|
||||
@ link register save eliminated.
|
||||
ldr r3, .L37
|
||||
ldrsh r3, [r3, #6]
|
||||
str r3, [r0]
|
||||
bx lr
|
||||
.L38:
|
||||
.align 2
|
||||
.L37:
|
||||
.word .LANCHOR0
|
||||
.fnend
|
||||
.size vad_preprocess_update_params, .-vad_preprocess_update_params
|
||||
.bss
|
||||
.align 2
|
||||
.LANCHOR0 = . + 0
|
||||
.type g_sound_thd, %object
|
||||
.size g_sound_thd, 2
|
||||
g_sound_thd:
|
||||
.space 2
|
||||
.type g_noise_level, %object
|
||||
.size g_noise_level, 2
|
||||
g_noise_level:
|
||||
.space 2
|
||||
.type g_vad_con_thd, %object
|
||||
.size g_vad_con_thd, 2
|
||||
g_vad_con_thd:
|
||||
.space 2
|
||||
.type g_noise_abs, %object
|
||||
.size g_noise_abs, 2
|
||||
g_noise_abs:
|
||||
.space 2
|
||||
.type g_signal_gain, %object
|
||||
.size g_signal_gain, 2
|
||||
g_signal_gain:
|
||||
.space 2
|
||||
.type g_xn_1, %object
|
||||
.size g_xn_1, 2
|
||||
g_xn_1:
|
||||
.space 2
|
||||
.type g_xn_2, %object
|
||||
.size g_xn_2, 2
|
||||
g_xn_2:
|
||||
.space 2
|
||||
.type g_yn_1, %object
|
||||
.size g_yn_1, 2
|
||||
g_yn_1:
|
||||
.space 2
|
||||
.type g_yn_2, %object
|
||||
.size g_yn_2, 2
|
||||
g_yn_2:
|
||||
.space 2
|
||||
.type g_sample_cnt, %object
|
||||
.size g_sample_cnt, 2
|
||||
g_sample_cnt:
|
||||
.space 2
|
||||
.type g_sum_abs_frm, %object
|
||||
.size g_sum_abs_frm, 4
|
||||
g_sum_abs_frm:
|
||||
.space 4
|
||||
.type frm_count, %object
|
||||
.size frm_count, 4
|
||||
frm_count:
|
||||
.space 4
|
||||
.type g_ave_abs_rec, %object
|
||||
.size g_ave_abs_rec, 400
|
||||
g_ave_abs_rec:
|
||||
.space 400
|
||||
.type g_vad_cnt, %object
|
||||
.size g_vad_cnt, 2
|
||||
g_vad_cnt:
|
||||
.space 2
|
||||
.ident "GCC: (GNU) 4.9 20150123 (prerelease)"
|
||||
.section .note.GNU-stack,"",%progbits
|
||||
Reference in New Issue
Block a user