diff --git a/arch/arm/boot/dts/rk3036.dtsi b/arch/arm/boot/dts/rk3036.dtsi index 44354bf5e477..173d980629d0 100644 --- a/arch/arm/boot/dts/rk3036.dtsi +++ b/arch/arm/boot/dts/rk3036.dtsi @@ -589,7 +589,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; }; @@ -600,7 +600,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; }; @@ -611,7 +611,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; }; @@ -622,7 +622,7 @@ #pwm-cells = <2>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 66fc6ecd29a2..5df9f1cf1f10 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -802,22 +802,22 @@ }; &pwm0 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_out>; }; &pwm1 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_out>; }; &pwm2 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_out>; }; &pwm3 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_out>; }; diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi index 3ac3096f7bc7..44c925754251 100644 --- a/arch/arm/boot/dts/rk312x.dtsi +++ b/arch/arm/boot/dts/rk312x.dtsi @@ -867,7 +867,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x20050000 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -878,7 +878,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x20050010 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -889,7 +889,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x20050020 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -900,7 +900,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x20050030 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index b9b25a37ac6e..42553620df46 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -552,22 +552,22 @@ }; &pwm0 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_out>; }; &pwm1 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_out>; }; &pwm2 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_out>; }; &pwm3 { - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_out>; }; diff --git a/arch/arm/boot/dts/rk322x.dtsi b/arch/arm/boot/dts/rk322x.dtsi index afa3a5f1b9b1..b273dfbc9453 100644 --- a/arch/arm/boot/dts/rk322x.dtsi +++ b/arch/arm/boot/dts/rk322x.dtsi @@ -522,7 +522,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; status = "disabled"; }; @@ -533,7 +533,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; status = "disabled"; }; @@ -544,7 +544,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; status = "disabled"; }; @@ -556,7 +556,7 @@ #pwm-cells = <3>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; status = "disabled"; }; diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 9a2e3e783ca6..9d68f38b7753 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -751,7 +751,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -762,7 +762,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -773,7 +773,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; @@ -784,7 +784,7 @@ compatible = "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; #pwm-cells = <2>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM>; clock-names = "pwm"; diff --git a/arch/arm64/boot/dts/rockchip/px30.dtsi b/arch/arm64/boot/dts/rockchip/px30.dtsi index b580aa189ef1..27e69dcc7b25 100644 --- a/arch/arm64/boot/dts/rockchip/px30.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30.dtsi @@ -626,7 +626,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff200000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; @@ -637,7 +637,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff200010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; @@ -648,7 +648,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff200020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; @@ -659,7 +659,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff200030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru SCLK_PWM0>, <&cru PCLK_PWM0>; clock-names = "pwm", "pclk"; @@ -670,7 +670,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff208000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm4_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; @@ -681,7 +681,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff208010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm5_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; @@ -692,7 +692,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff208020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm6_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; @@ -703,7 +703,7 @@ compatible = "rockchip,px30-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff208030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm7_pin>; clocks = <&cru SCLK_PWM1>, <&cru PCLK_PWM1>; clock-names = "pwm", "pclk"; diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 1f75bd4abbac..18f8b145dc0c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -362,7 +362,7 @@ compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; @@ -373,7 +373,7 @@ compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; @@ -384,7 +384,7 @@ compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; @@ -395,7 +395,7 @@ compatible = "rockchip,rk3308-pwm", "rockchip,rk3328-pwm"; reg = <0x0 0xff180030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 4afade34dfe8..692ef90284a2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -539,7 +539,7 @@ compatible = "rockchip,rk3328-pwm"; reg = <0x0 0xff1b0000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; @@ -550,7 +550,7 @@ compatible = "rockchip,rk3328-pwm"; reg = <0x0 0xff1b0010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; @@ -561,7 +561,7 @@ compatible = "rockchip,rk3328-pwm"; reg = <0x0 0xff1b0020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; @@ -573,7 +573,7 @@ reg = <0x0 0xff1b0030 0x0 0x10>; interrupts = ; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwmir_pin>; clocks = <&cru SCLK_PWM>, <&cru PCLK_PWM>; clock-names = "pwm", "pclk"; diff --git a/arch/arm64/boot/dts/rockchip/rk3366.dtsi b/arch/arm64/boot/dts/rockchip/rk3366.dtsi index 8032a7ee20c9..ece2567eb7d0 100644 --- a/arch/arm64/boot/dts/rockchip/rk3366.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3366.dtsi @@ -566,7 +566,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; @@ -577,7 +577,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; @@ -597,7 +597,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_t2_pin>; clocks = <&cru PCLK_RKPWM>; clock-names = "pwm"; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index 91c37468acde..6fa9976daaf7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -862,7 +862,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&cru PCLK_PWM1>; clock-names = "pwm"; @@ -873,7 +873,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&cru PCLK_PWM1>; clock-names = "pwm"; @@ -893,7 +893,7 @@ compatible = "rockchip,rk3368-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff680030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3_pin>; clocks = <&cru PCLK_PWM1>; clock-names = "pwm"; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index c6431f246c37..08bcf6f4a786 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1235,7 +1235,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420000 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm0_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1246,7 +1246,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420010 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm1_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1257,7 +1257,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420020 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm2_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1268,7 +1268,7 @@ compatible = "rockchip,rk3399-pwm", "rockchip,rk3288-pwm"; reg = <0x0 0xff420030 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&pwm3a_pin>; clocks = <&pmucru PCLK_RKPWM_PMU>; clock-names = "pwm"; @@ -1791,7 +1791,7 @@ compatible = "rockchip,vop-pwm"; reg = <0x0 0xff8f01a0 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&vop1_pwm_pin>; clocks = <&cru SCLK_VOP1_PWM>; clock-names = "pwm"; @@ -1860,7 +1860,7 @@ compatible = "rockchip,vop-pwm"; reg = <0x0 0xff9001a0 0x0 0x10>; #pwm-cells = <3>; - pinctrl-names = "default"; + pinctrl-names = "active"; pinctrl-0 = <&vop0_pwm_pin>; clocks = <&cru SCLK_VOP0_PWM>; clock-names = "pwm"; diff --git a/drivers/pwm/pwm-rockchip.c b/drivers/pwm/pwm-rockchip.c index 4889c5a0cbc2..954bbcffbf34 100644 --- a/drivers/pwm/pwm-rockchip.c +++ b/drivers/pwm/pwm-rockchip.c @@ -36,6 +36,8 @@ struct rockchip_pwm_chip { struct pwm_chip chip; struct clk *clk; struct clk *pclk; + struct pinctrl *pinctrl; + struct pinctrl_state *active_state; const struct rockchip_pwm_data *data; void __iomem *base; bool vop_pwm_en; /* indicate voppwm mirror register state */ @@ -233,6 +235,8 @@ static int rockchip_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, */ rockchip_pwm_get_state(chip, pwm, state); + if (state->enabled) + ret = pinctrl_select_state(pc->pinctrl, pc->active_state); out: clk_disable(pc->pclk); @@ -377,6 +381,18 @@ static int rockchip_pwm_probe(struct platform_device *pdev) goto err_clk; } + pc->pinctrl = devm_pinctrl_get(&pdev->dev); + if (IS_ERR(pc->pinctrl)) { + dev_err(&pdev->dev, "Get pinctrl failed!\n"); + return PTR_ERR(pc->pinctrl); + } + + pc->active_state = pinctrl_lookup_state(pc->pinctrl, "active"); + if (IS_ERR(pc->active_state)) { + dev_err(&pdev->dev, "No active pinctrl state\n"); + return PTR_ERR(pc->active_state); + } + platform_set_drvdata(pdev, pc); pc->data = id->data;