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rk3066b: fix hsiphy array lenth

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chenxing
2012-08-29 20:42:56 +08:00
parent c100afb748
commit e3ff63d7a8
1 changed files with 1 additions and 1 deletions
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2
arch/arm/mach-rk30/clock_data-rk3066b.c
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@@ -1800,7 +1800,7 @@ static struct clk clk_otgphy1_480m = {
/* hsicphy setting */
#ifdef ARCH_RK31
static struct clk *clk_hsicphy_parents[3] = {&clk_otgphy0_480m, &clk_otgphy1_480m, &general_pll_clk, &codec_pll_clk};
static struct clk *clk_hsicphy_parents[4] = {&clk_otgphy0_480m, &clk_otgphy1_480m, &general_pll_clk, &codec_pll_clk};
static struct clk clk_hsicphy_480m = {
.name = "hsicphy_480m",
.parent = &clk_otgphy0_480m,