From e46a06270b222637ba71fd05bb21ea1a753e6bb5 Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Wed, 12 Dec 2018 15:39:49 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3399: Add specification serial number for cpu Change-Id: Ie48b09944ae3b294e3c7666bd9aa68706bdd4ba5 Signed-off-by: Finley Xiao --- arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi | 22 ++++++++++++++++---- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++++ 2 files changed, 22 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi index 69bca92cd506..1031ce10cab2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399-opp.dtsi @@ -14,8 +14,15 @@ rockchip,low-temp = <0>; rockchip,low-temp-min-volt = <900000>; - nvmem-cells = <&cpul_leakage>; - nvmem-cell-names = "cpu_leakage"; + nvmem-cells = <&cpul_leakage>, <&specification_serial_number>; + nvmem-cell-names = "cpu_leakage", + "specification_serial_number"; + clocks = <&cru PLL_APLLL>; + rockchip,avs-scale = <20>; + rockchip,bin-scaling-sel = < + 0 30 + 1 34 + >; rockchip,pvtm-voltage-sel = < 0 143500 0 @@ -98,8 +105,15 @@ rockchip,low-temp = <0>; rockchip,low-temp-min-volt = <900000>; - nvmem-cells = <&cpub_leakage>; - nvmem-cell-names = "cpu_leakage"; + nvmem-cells = <&cpub_leakage>, <&specification_serial_number>; + nvmem-cell-names = "cpu_leakage", + "specification_serial_number"; + clocks = <&cru PLL_APLLB>; + rockchip,avs-scale = <8>; + rockchip,bin-scaling-sel = < + 0 8 + 1 17 + >; rockchip,pvtm-voltage-sel = < 0 149000 0 diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 43dd5d910c35..dcee8fb278ce 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1404,6 +1404,10 @@ clock-names = "pclk_efuse"; /* Data cells */ + specification_serial_number: specification-serial-number@6 { + reg = <0x06 0x1>; + bits = <0 5>; + }; cpu_id: cpu-id@7 { reg = <0x07 0x10>; };