From e52c72d489da97bc5afd01c5fdf518e2b0894afc Mon Sep 17 00:00:00 2001 From: Jon Lin Date: Wed, 5 Jul 2023 17:38:04 +0800 Subject: [PATCH] PCI: rockchip: dw_ep: Fix wrong return value check Fixes: c3f038c2dcaf ("PCI: rockchip: dw_ep: Delaying the link training after hot reset") Change-Id: I9e14995caecce709d93d33b9e2b568a5eae91273 Signed-off-by: Jon Lin --- drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c index 6b9976bcd110..31e84f74f2c7 100644 --- a/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c +++ b/drivers/pci/controller/dwc/pcie-dw-ep-rockchip.c @@ -1203,7 +1203,7 @@ static int rockchip_pcie_ep_probe(struct platform_device *pdev) rockchip_pcie_devmode_update(rockchip, RKEP_MODE_KERNEL, RKEP_SMODE_LNKRDY); rockchip->hot_rst_wq = create_singlethread_workqueue("rkep_hot_rst_wq"); - if (rockchip->hot_rst_wq) { + if (!rockchip->hot_rst_wq) { dev_err(dev, "failed to create hot_rst workqueue\n"); ret = -ENOMEM; goto deinit_phy;