From e53e7c4bc5b71a531effd6335b6c806e783ca5b1 Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Sun, 2 Apr 2023 19:57:24 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3528: set hdmi ddc scl rate as 50KHz The original 100khz rate is prone to ddc communication error on some TVs. The scl rate was reduced to 50khz by referring to competitor. Signed-off-by: Algea Cao Change-Id: I51c3307566b68932e8ab9f1cb6a8ba47d03e7110 --- arch/arm64/boot/dts/rockchip/rk3528.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3528.dtsi b/arch/arm64/boot/dts/rockchip/rk3528.dtsi index 630cc81f04c5..5a64a8012b0b 100644 --- a/arch/arm64/boot/dts/rockchip/rk3528.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3528.dtsi @@ -1505,6 +1505,8 @@ <&cru CLK_CEC_HDMI>, <&inno_hdmiphy_clk>; clock-names = "iahb", "isfr", "cec", "dclk_vp0"; + ddc-i2c-scl-high-time-ns = <9625>; + ddc-i2c-scl-low-time-ns = <10000>; reg-io-width = <4>; rockchip,grf = <&grf>; pinctrl-names = "default", "idle";