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media: rockchip: isp1: add macro to switch between old mipi and new mipi
Change-Id: I878099d6a38f00a255a7b99ff9f2a3c5770226e5 Signed-off-by: Hu Kejun <william.hu@rock-chips.com>
This commit is contained in:
@@ -1223,8 +1223,13 @@ static int rkisp1_start(struct rkisp1_stream *stream)
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"stream raw only support to open after stream mp/sp");
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return -EINVAL;
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}
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13)
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#else
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if (dev->isp_ver == ISP_V12 ||
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dev->isp_ver == ISP_V13)
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#endif
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raw_config_mi(stream);
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if (stream->ops->set_data_path)
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@@ -2000,10 +2005,16 @@ void rkisp1_unregister_stream_vdevs(struct rkisp1_device *dev)
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struct rkisp1_stream *raw_stream = &dev->stream[RKISP1_STREAM_RAW];
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rkisp1_unregister_stream_vdev(mp_stream);
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if (dev->isp_ver != ISP_V10_1)
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rkisp1_unregister_stream_vdev(sp_stream);
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13)
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#else
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if (dev->isp_ver == ISP_V12 ||
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dev->isp_ver == ISP_V13)
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#endif
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rkisp1_unregister_stream_vdev(raw_stream);
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}
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@@ -2027,8 +2038,12 @@ static int rkisp1_register_stream_vdev(struct rkisp1_stream *stream)
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break;
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case RKISP1_STREAM_RAW:
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vdev_name = RAW_VDEV_NAME;
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver != ISP_V13)
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#else
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if (dev->isp_ver != ISP_V12 &&
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dev->isp_ver != ISP_V13)
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#endif
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return 0;
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break;
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default:
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@@ -56,6 +56,7 @@
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#define RKISP1_EMDDATA_FIFO_MAX 4
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#define RKISP1_DMATX_CHECK 0xA5A5A5A5
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#define RKISP1_RK3326_USE_OLDMIPI 0
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enum rkisp1_sd_type {
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RKISP1_SD_SENSOR,
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@@ -358,8 +358,12 @@ static int rkisp1_create_links(struct rkisp1_device *dev)
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if (ret < 0)
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return ret;
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13) {
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#else
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if (dev->isp_ver == ISP_V12 ||
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dev->isp_ver == ISP_V13) {
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#endif
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/* MIPI RAW links */
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source = &dev->isp_sdev.sd.entity;
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sink = &dev->stream[RKISP1_STREAM_RAW].vnode.vdev.entity;
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@@ -662,8 +666,12 @@ static irqreturn_t rkisp1_mipi_irq_hdl(int irq, void *ctx)
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unsigned int mis_val;
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unsigned int err1, err2, err3;
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#if RKISP1_RK3326_USE_OLDMIPI
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if (rkisp1_dev->isp_ver == ISP_V13) {
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#else
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if (rkisp1_dev->isp_ver == ISP_V13 ||
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rkisp1_dev->isp_ver == ISP_V12) {
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#endif
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err1 = readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR1);
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err2 = readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR2);
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err3 = readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR3);
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@@ -676,6 +684,20 @@ static irqreturn_t rkisp1_mipi_irq_hdl(int irq, void *ctx)
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mis_val = readl(rkisp1_dev->base_addr + CIF_MIPI_MIS);
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if (mis_val)
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rkisp1_mipi_isr(mis_val, rkisp1_dev);
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/*
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* As default interrupt mask for csi_rx are on,
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* when resetting isp, interrupt from csi_rx maybe arise,
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* we should clear them.
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*/
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#if RKISP1_RK3326_USE_OLDMIPI
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if (rkisp1_dev->isp_ver == ISP_V12) {
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/* read error state register to clear interrupt state */
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readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR1);
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readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR2);
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readl(rkisp1_dev->base_addr + CIF_ISP_CSI0_ERR3);
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}
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#endif
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}
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return IRQ_HANDLED;
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@@ -1087,6 +1109,12 @@ static int rkisp1_plat_probe(struct platform_device *pdev)
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if (ret)
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goto err_runtime_disable;
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if (isp_dev->isp_ver == ISP_V12 || isp_dev->isp_ver == ISP_V13) {
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writel(0, isp_dev->base_addr + CIF_ISP_CSI0_CTRL0);
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writel(0, isp_dev->base_addr + CIF_ISP_CSI0_MASK1);
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writel(0, isp_dev->base_addr + CIF_ISP_CSI0_MASK2);
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writel(0, isp_dev->base_addr + CIF_ISP_CSI0_MASK3);
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}
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return 0;
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err_runtime_disable:
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@@ -411,11 +411,12 @@ static int rkisp1_config_mipi(struct rkisp1_device *dev)
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}
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}
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13) {
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#else
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if (dev->isp_ver == ISP_V13 ||
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dev->isp_ver == ISP_V12) {
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/* csi2host enable */
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writel(1, base + CIF_ISP_CSI0_CTRL0);
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#endif
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/* lanes */
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writel(lanes - 1, base + CIF_ISP_CSI0_CTRL1);
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@@ -426,19 +427,36 @@ static int rkisp1_config_mipi(struct rkisp1_device *dev)
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writel(CIF_MIPI_DATA_SEL_DT(in_fmt->mipi_dt) | CIF_MIPI_DATA_SEL_VC(0),
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base + CIF_ISP_CSI0_DATA_IDS_1);
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/* interrupts */
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/* clear interrupts state */
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readl(base + CIF_ISP_CSI0_ERR1);
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readl(base + CIF_ISP_CSI0_ERR2);
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readl(base + CIF_ISP_CSI0_ERR3);
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/* set interrupts mask */
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writel(0x1FFFFFF0, base + CIF_ISP_CSI0_MASK1);
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writel(0x03FFFFFF, base + CIF_ISP_CSI0_MASK2);
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writel(CIF_ISP_CSI0_IMASK_FRAME_END(0x3F) |
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CIF_ISP_CSI0_IMASK_RAW0_OUT_V_END |
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CIF_ISP_CSI0_IMASK_RAW1_OUT_V_END |
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CIF_ISP_CSI0_IMASK_LINECNT,
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base + CIF_ISP_CSI0_MASK3);
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} else {
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mipi_ctrl = CIF_MIPI_CTRL_NUM_LANES(lanes - 1) |
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CIF_MIPI_CTRL_SHUTDOWNLANES(0xf) |
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CIF_MIPI_CTRL_ERR_SOT_SYNC_HS_SKIP |
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CIF_MIPI_CTRL_CLOCKLANE_ENA;
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V12) {
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writel(0, base + CIF_ISP_CSI0_CTRL0);
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writel(0, base + CIF_ISP_CSI0_MASK1);
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writel(0, base + CIF_ISP_CSI0_MASK2);
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writel(0, base + CIF_ISP_CSI0_MASK3);
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/* clear interrupts state */
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readl(base + CIF_ISP_CSI0_ERR1);
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readl(base + CIF_ISP_CSI0_ERR2);
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readl(base + CIF_ISP_CSI0_ERR3);
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}
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#endif
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writel(mipi_ctrl, base + CIF_MIPI_CTRL);
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/* Configure Data Type and Virtual Channel */
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@@ -540,16 +558,37 @@ static int rkisp1_isp_stop(struct rkisp1_device *dev)
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* Stop ISP(isp) ->wait for ISP isp off
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*/
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/* stop and clear MI, MIPI, and ISP interrupts */
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writel(0, base + CIF_MIPI_IMSC);
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writel(~0, base + CIF_MIPI_ICR);
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13) {
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#else
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if (dev->isp_ver == ISP_V12 || dev->isp_ver == ISP_V13) {
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#endif
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writel(0, base + CIF_ISP_CSI0_MASK1);
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writel(0, base + CIF_ISP_CSI0_MASK2);
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writel(0, base + CIF_ISP_CSI0_MASK3);
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readl(base + CIF_ISP_CSI0_ERR1);
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readl(base + CIF_ISP_CSI0_ERR2);
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readl(base + CIF_ISP_CSI0_ERR3);
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} else {
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writel(0, base + CIF_MIPI_IMSC);
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writel(~0, base + CIF_MIPI_ICR);
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}
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writel(0, base + CIF_ISP_IMSC);
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writel(~0, base + CIF_ISP_ICR);
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writel(0, base + CIF_MI_IMSC);
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writel(~0, base + CIF_MI_ICR);
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val = readl(base + CIF_MIPI_CTRL);
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writel(val & (~CIF_MIPI_CTRL_OUTPUT_ENA), base + CIF_MIPI_CTRL);
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13) {
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#else
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if (dev->isp_ver == ISP_V12 || dev->isp_ver == ISP_V13) {
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#endif
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writel(0, base + CIF_ISP_CSI0_CTRL0);
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} else {
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val = readl(base + CIF_MIPI_CTRL);
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writel(val & (~CIF_MIPI_CTRL_OUTPUT_ENA), base + CIF_MIPI_CTRL);
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}
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/* stop ISP */
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val = readl(base + CIF_ISP_CTRL);
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val &= ~(CIF_ISP_CTRL_ISP_INFORM_ENABLE | CIF_ISP_CTRL_ISP_ENABLE);
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@@ -569,6 +608,13 @@ static int rkisp1_isp_stop(struct rkisp1_device *dev)
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readl(base + CIF_MIPI_CTRL));
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writel(CIF_IRCL_CIF_SW_RST, base + CIF_IRCL);
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if (dev->isp_ver == ISP_V12 || dev->isp_ver == ISP_V13) {
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writel(0, base + CIF_ISP_CSI0_CSI2_RESETN);
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writel(0, base + CIF_ISP_CSI0_CTRL0);
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writel(0, base + CIF_ISP_CSI0_MASK1);
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writel(0, base + CIF_ISP_CSI0_MASK2);
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writel(0, base + CIF_ISP_CSI0_MASK3);
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}
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if (dev->emd_vc <= CIF_ISP_ADD_DATA_VC_MAX) {
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for (i = 0; i < RKISP1_EMDDATA_FIFO_MAX; i++)
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@@ -598,8 +644,22 @@ static int rkisp1_isp_start(struct rkisp1_device *dev)
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/* Activate MIPI */
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if (sensor->mbus.type == V4L2_MBUS_CSI2) {
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val = readl(base + CIF_MIPI_CTRL);
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writel(val | CIF_MIPI_CTRL_OUTPUT_ENA, base + CIF_MIPI_CTRL);
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13) {
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#else
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if (dev->isp_ver == ISP_V12 || dev->isp_ver == ISP_V13) {
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#endif
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/* clear interrupts state */
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readl(base + CIF_ISP_CSI0_ERR1);
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readl(base + CIF_ISP_CSI0_ERR2);
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readl(base + CIF_ISP_CSI0_ERR3);
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/* csi2host enable */
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writel(1, base + CIF_ISP_CSI0_CTRL0);
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} else {
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val = readl(base + CIF_MIPI_CTRL);
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writel(val | CIF_MIPI_CTRL_OUTPUT_ENA,
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base + CIF_MIPI_CTRL);
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}
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}
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/* Activate ISP */
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val = readl(base + CIF_ISP_CTRL);
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@@ -633,7 +693,11 @@ static void rkisp1_config_clk(struct rkisp1_device *dev)
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writel(val, dev->base_addr + CIF_ICCL);
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#if RKISP1_RK3326_USE_OLDMIPI
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if (dev->isp_ver == ISP_V13) {
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#else
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if (dev->isp_ver == ISP_V12 || dev->isp_ver == ISP_V13) {
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#endif
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val = CIF_CLK_CTRL_MI_Y12 | CIF_CLK_CTRL_MI_SP |
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CIF_CLK_CTRL_MI_RAW0 | CIF_CLK_CTRL_MI_RAW1 |
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CIF_CLK_CTRL_MI_READ | CIF_CLK_CTRL_MI_RAWRD |
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@@ -1205,6 +1269,7 @@ static int rkisp1_isp_sd_s_stream(struct v4l2_subdev *sd, int on)
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static int rkisp1_isp_sd_s_power(struct v4l2_subdev *sd, int on)
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{
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struct rkisp1_device *isp_dev = sd_to_isp_dev(sd);
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void __iomem *base = isp_dev->base_addr;
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int ret;
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v4l2_dbg(1, rkisp1_debug, &isp_dev->v4l2_dev, "s_power: %d\n", on);
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@@ -1215,6 +1280,14 @@ static int rkisp1_isp_sd_s_power(struct v4l2_subdev *sd, int on)
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return ret;
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rkisp1_config_clk(isp_dev);
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if (isp_dev->isp_ver == ISP_V12 ||
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isp_dev->isp_ver == ISP_V13) {
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/* disable csi_rx interrupt */
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writel(0, base + CIF_ISP_CSI0_CTRL0);
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writel(0, base + CIF_ISP_CSI0_MASK1);
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writel(0, base + CIF_ISP_CSI0_MASK2);
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writel(0, base + CIF_ISP_CSI0_MASK3);
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}
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} else {
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ret = pm_runtime_put(isp_dev->dev);
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if (ret < 0)
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