From e57a003936c5bac086da5b7a2cb75edcfd38add0 Mon Sep 17 00:00:00 2001
From: Wyon Bi <bivvy.bi@rock-chips.com>
Date: Thu, 24 Jan 2019 16:40:30 +0800
Subject: [PATCH] ARM: dts: rockchip: rk3288-th804-avb: assign clock parent for
 DCLK_VOP0 and DCLK_VOP1

Change-Id: Ibfaf29a1f78c0fbfd538dc8bc2bc97075b77849e
Signed-off-by: Wyon Bi <bivvy.bi@rock-chips.com>
---
 arch/arm/boot/dts/rk3288-th804-avb.dts | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/arch/arm/boot/dts/rk3288-th804-avb.dts b/arch/arm/boot/dts/rk3288-th804-avb.dts
index 458feedc76fc..fc695e71721b 100644
--- a/arch/arm/boot/dts/rk3288-th804-avb.dts
+++ b/arch/arm/boot/dts/rk3288-th804-avb.dts
@@ -32,4 +32,14 @@
 			fsmgr_flags = "wait,avb";
 		};
 	};
-};
\ No newline at end of file
+};
+
+&vopb {
+	assigned-clocks = <&cru DCLK_VOP0>;
+	assigned-clock-parents = <&cru PLL_CPLL>;
+};
+
+&vopl {
+	assigned-clocks = <&cru DCLK_VOP1>;
+	assigned-clock-parents = <&cru PLL_GPLL>;
+};