diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dtsi
index 8d3f4f1f4d2d..b50571cb946a 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rv1126b-evb2-v10.dtsi
@@ -190,8 +190,8 @@
 		pwms = <&pwm0_8ch_0 0 25000 1>;
 		regulator-name = "vdd_cpu";
 		regulator-init-microvolt = <950000>;
-		regulator-min-microvolt = <750000>;
-		regulator-max-microvolt = <1100000>;
+		regulator-min-microvolt = <800000>;
+		regulator-max-microvolt = <1150000>;
 		regulator-always-on;
 		regulator-boot-on;
 		pwm-supply = <&vccsys_stb>;
@@ -203,7 +203,7 @@
 		pwms = <&pwm0_8ch_1 0 25000 1>;
 		regulator-name = "vdd_npu";
 		regulator-init-microvolt = <950000>;
-		regulator-min-microvolt = <750000>;
+		regulator-min-microvolt = <800000>;
 		regulator-max-microvolt = <1100000>;
 		regulator-always-on;
 		regulator-boot-on;
@@ -233,6 +233,9 @@
 };
 
 &acdcdig_dsm {
+	pinctrl-names = "default";
+	pinctrl-0 = <&dsm_aud_rn_pins
+		     &dsm_aud_rp_pins>;
 	pa-ctl-gpios = <&gpio0 RK_PC1 GPIO_ACTIVE_HIGH>;
 	status = "okay";
 };
diff --git a/arch/arm64/boot/dts/rockchip/rv1126b-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rv1126b-pinctrl.dtsi
index 63010f4a4be0..f61e7435b4d4 100644
--- a/arch/arm64/boot/dts/rockchip/rv1126b-pinctrl.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rv1126b-pinctrl.dtsi
@@ -110,28 +110,28 @@
 		dsm_aud_ln_pins: dsm-aud-ln-pins {
 			rockchip,pins =
 				/* dsm_aud_ln */
-				<7 RK_PA3 4 &pcfg_pull_none>;
+				<7 RK_PA3 4 &pcfg_pull_down>;
 		};
 
 		/omit-if-no-ref/
 		dsm_aud_lp_pins: dsm-aud-lp-pins {
 			rockchip,pins =
 				/* dsm_aud_lp */
-				<7 RK_PA5 4 &pcfg_pull_none>;
+				<7 RK_PA5 4 &pcfg_pull_down>;
 		};
 
 		/omit-if-no-ref/
 		dsm_aud_rn_pins: dsm-aud-rn-pins {
 			rockchip,pins =
 				/* dsm_aud_rn */
-				<7 RK_PB0 4 &pcfg_pull_none>;
+				<7 RK_PB0 4 &pcfg_pull_down>;
 		};
 
 		/omit-if-no-ref/
 		dsm_aud_rp_pins: dsm-aud-rp-pins {
 			rockchip,pins =
 				/* dsm_aud_rp */
-				<7 RK_PB1 4 &pcfg_pull_none>;
+				<7 RK_PB1 4 &pcfg_pull_down>;
 		};
 	};
 
diff --git a/arch/arm64/configs/rockchip_linux_defconfig b/arch/arm64/configs/rockchip_linux_defconfig
index 16dcb4cbfb59..96894fa18f4d 100644
--- a/arch/arm64/configs/rockchip_linux_defconfig
+++ b/arch/arm64/configs/rockchip_linux_defconfig
@@ -156,6 +156,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
 CONFIG_BLK_DEV_NVME=y
+CONFIG_NVME_HWMON=y
 CONFIG_RK628_MISC=y
 CONFIG_RK628_MISC_HDMITX=y
 CONFIG_PCIE_FUNC_RKEP=y
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index f53b2041518e..b7c25cd59bdb 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -40,6 +40,9 @@
 #define RK_MMU_INT_STATUS	0x20	/* IRQ status after masking */
 #define RK_MMU_AUTO_GATING	0x24
 
+/* v3 registers */
+#define RK_MMU_PAGE_FAULT	0x44	/* Pagefault register */
+
 #define DTE_ADDR_DUMMY		0xCAFEBABE
 
 #define RK_MMU_POLL_PERIOD_US		100
@@ -67,6 +70,8 @@
 /* RK_MMU_INT_* register fields */
 #define RK_MMU_IRQ_PAGE_FAULT    0x01  /* page fault */
 #define RK_MMU_IRQ_BUS_ERROR     0x02  /* bus read error */
+#define RK_MMU_IRQ_PF_FAKE_MST0  0x10000 /* page fault fake mode */
+
 #define RK_MMU_IRQ_MASK          (RK_MMU_IRQ_PAGE_FAULT | RK_MMU_IRQ_BUS_ERROR)
 
 #define NUM_DT_ENTRIES 1024
@@ -77,6 +82,9 @@
 
 #define DISABLE_FETCH_DTE_TIME_LIMIT BIT(31)
 
+#define RK_MMU_PAGEFAULT_FAKE_MODE_EN	BIT(24)
+#define RK_MMU_PAGEFAULT_MST0_DONE	BIT(0)
+
 #define CMD_RETRY_COUNT 10
 
  /*
@@ -126,6 +134,7 @@ struct rk_iommu {
 	struct third_iommu_ops_wrap *opt_ops;
 	bool iommu_enabled;
 	bool need_res_map;
+	bool pf_fake_mode_en;
 };
 
 struct rk_iommudata {
@@ -676,6 +685,7 @@ static int rk_pagefault_done(struct rk_iommu *iommu)
 	int i;
 	u32 int_mask;
 	irqreturn_t ret = IRQ_NONE;
+	u32 val;
 
 	for (i = 0; i < iommu->num_mmu; i++) {
 		int_status = rk_iommu_read(iommu->bases[i], RK_MMU_INT_STATUS);
@@ -685,7 +695,8 @@ static int rk_pagefault_done(struct rk_iommu *iommu)
 		ret = IRQ_HANDLED;
 		iova = rk_iommu_read(iommu->bases[i], RK_MMU_PAGE_FAULT_ADDR);
 
-		if (int_status & RK_MMU_IRQ_PAGE_FAULT) {
+		if ((int_status & RK_MMU_IRQ_PAGE_FAULT) ||
+		    (iommu->pf_fake_mode_en && (int_status & RK_MMU_IRQ_PF_FAKE_MST0))) {
 			int flags;
 
 			status = rk_iommu_read(iommu->bases[i], RK_MMU_STATUS);
@@ -704,11 +715,13 @@ static int rk_pagefault_done(struct rk_iommu *iommu)
 				 * Ignore the return code, though, since we always zap cache
 				 * and clear the page fault anyway.
 				 */
-				if (iommu->domain)
-					report_iommu_fault(iommu->domain, iommu->dev, iova,
-						   status);
-				else
+				if (iommu->domain) {
+					if (!iommu->pf_fake_mode_en)
+						report_iommu_fault(iommu->domain, iommu->dev, iova,
+								   status);
+				} else {
 					dev_err(iommu->dev, "Page fault while iommu not attached to domain?\n");
+				}
 			}
 
 			rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
@@ -726,7 +739,14 @@ static int rk_pagefault_done(struct rk_iommu *iommu)
 		if (int_status & RK_MMU_IRQ_BUS_ERROR)
 			dev_err(iommu->dev, "BUS_ERROR occurred at %pad\n", &iova);
 
-		if (int_status & ~RK_MMU_IRQ_MASK)
+		if (iommu->pf_fake_mode_en && (int_status & RK_MMU_IRQ_PF_FAKE_MST0)) {
+			val = rk_iommu_read(iommu->bases[i], RK_MMU_PAGE_FAULT);
+			val |= RK_MMU_PAGEFAULT_MST0_DONE;
+			rk_iommu_write(iommu->bases[i], RK_MMU_PAGE_FAULT, val);
+			dev_err(iommu->dev, "PF_FAKE_MST0 occurred at %pad\n", &iova);
+		}
+
+		if ((int_status & ~RK_MMU_IRQ_MASK) && (!iommu->pf_fake_mode_en))
 			dev_err(iommu->dev, "unexpected int_status: %#08x\n",
 				int_status);
 
@@ -1158,6 +1178,11 @@ static int rk_iommu_enable(struct rk_iommu *iommu)
 	struct rk_iommu_domain *rk_domain = to_rk_domain(domain);
 	int ret, i;
 	u32 auto_gate;
+	u32 page_fault;
+	u32 irq_mask = RK_MMU_IRQ_MASK;
+
+	if (iommu->pf_fake_mode_en)
+		irq_mask |= RK_MMU_IRQ_PF_FAKE_MST0;
 
 	ret = clk_bulk_enable(iommu->num_clocks, iommu->clocks);
 	if (ret)
@@ -1175,12 +1200,18 @@ static int rk_iommu_enable(struct rk_iommu *iommu)
 		rk_iommu_write(iommu->bases[i], RK_MMU_DTE_ADDR,
 			       rk_ops->mk_dtentries(rk_domain->dt_dma));
 		rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
-		rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK);
+		rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, irq_mask);
 
 		/* Workaround for iommu blocked, BIT(31) default to 1 */
 		auto_gate = rk_iommu_read(iommu->bases[i], RK_MMU_AUTO_GATING);
 		auto_gate |= DISABLE_FETCH_DTE_TIME_LIMIT;
 		rk_iommu_write(iommu->bases[i], RK_MMU_AUTO_GATING, auto_gate);
+
+		if (iommu->pf_fake_mode_en) {
+			page_fault = rk_iommu_read(iommu->bases[i], RK_MMU_PAGE_FAULT);
+			page_fault |= RK_MMU_PAGEFAULT_FAKE_MODE_EN;
+			rk_iommu_write(iommu->bases[i], RK_MMU_PAGE_FAULT, page_fault);
+		}
 	}
 
 	ret = rk_iommu_enable_paging(iommu);
@@ -1518,14 +1549,18 @@ void rockchip_iommu_unmask_irq(struct device *dev)
 {
 	struct rk_iommu *iommu = rk_iommu_from_dev(dev);
 	int i;
+	u32 irq_mask = RK_MMU_IRQ_MASK;
 
 	if (!iommu)
 		return;
 
+	if (iommu->pf_fake_mode_en)
+		irq_mask |= RK_MMU_IRQ_PF_FAKE_MST0;
+
 	for (i = 0; i < iommu->num_mmu; i++) {
 		/* Need to zap tlb in case of mapping during pagefault */
 		rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_ZAP_CACHE);
-		rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, RK_MMU_IRQ_MASK);
+		rk_iommu_write(iommu->bases[i], RK_MMU_INT_MASK, irq_mask);
 		/* Leave iommu in pagefault state until mapping finished */
 		rk_iommu_base_command(iommu->bases[i], RK_MMU_CMD_PAGE_FAULT_DONE);
 	}
@@ -1627,6 +1662,8 @@ static int rk_iommu_probe(struct platform_device *pdev)
 					"rockchip,reserve-map");
 	iommu->first_reset_disabled = device_property_read_bool(dev,
 					"rockchip,disable-first-mmu-reset");
+	iommu->pf_fake_mode_en = device_property_read_bool(dev,
+					"rockchip,enable-pagefault-fake-mode");
 	/*
 	 * iommu clocks should be present for all new devices and devicetrees
 	 * but there are older devicetrees without clocks out in the wild.
@@ -1807,6 +1844,9 @@ static const struct of_device_id rk_iommu_dt_ids[] = {
 	{	.compatible = "rockchip,iommu-v2",
 		.data = &iommu_data_ops_v2,
 	},
+	{	.compatible = "rockchip,iommu-v3",
+		.data = &iommu_data_ops_v2,
+	},
 	{	.compatible = "rockchip,rk3568-iommu",
 		.data = &iommu_data_ops_v2,
 	},
diff --git a/drivers/media/i2c/ov08d10.c b/drivers/media/i2c/ov08d10.c
index 6cd12e260124..6601577506d3 100644
--- a/drivers/media/i2c/ov08d10.c
+++ b/drivers/media/i2c/ov08d10.c
@@ -8,6 +8,7 @@
  * V0.0X01.0X01
  * 1. add delays in setting to fix probability reg write failed.
  * 2. remove duplicate global register setting.
+ * V0.0X01.0X02 fix wrong no ioctl return value
  */
 //#define DEBUG
 #include <linux/clk.h>
@@ -37,7 +38,7 @@
 #include <linux/of_graph.h>
 #include "otp_eeprom.h"
 
-#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x01)
+#define DRIVER_VERSION			KERNEL_VERSION(0, 0x01, 0x02)
 
 #ifndef V4L2_CID_DIGITAL_GAIN
 #define V4L2_CID_DIGITAL_GAIN		V4L2_CID_GAIN
@@ -722,7 +723,7 @@ static long ov08d10_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
 		ret = ov08d10_get_channel_info(ov08d10, ch_info);
 		break;
 	default:
-		ret = -ENOTTY;
+		ret = -ENOIOCTLCMD;
 		break;
 	}
 
@@ -793,7 +794,7 @@ static long ov08d10_compat_ioctl32(struct v4l2_subdev *sd,
 		kfree(ch_info);
 		break;
 	default:
-		ret = -ENOTTY;
+		ret = -ENOIOCTLCMD;
 		break;
 	}
 
diff --git a/drivers/media/platform/rockchip/cif/subdev-itf.c b/drivers/media/platform/rockchip/cif/subdev-itf.c
index 5c0633c4f341..88c75c033cdd 100644
--- a/drivers/media/platform/rockchip/cif/subdev-itf.c
+++ b/drivers/media/platform/rockchip/cif/subdev-itf.c
@@ -1322,6 +1322,8 @@ static int sditf_s_power(struct v4l2_subdev *sd, int on)
 	if (on && atomic_inc_return(&priv->power_cnt) > 1)
 		return 0;
 
+	rkcif_update_sensor_info(&cif_dev->stream[0]);
+
 	if (on)
 		rkcif_update_unite_extend_pixel(cif_dev);
 	if (cif_dev->chip_id >= CHIP_RK3588_CIF) {
diff --git a/drivers/misc/rockchip/pcie-rkep.c b/drivers/misc/rockchip/pcie-rkep.c
index feaa8b757636..a919ccebca2d 100644
--- a/drivers/misc/rockchip/pcie-rkep.c
+++ b/drivers/misc/rockchip/pcie-rkep.c
@@ -857,6 +857,7 @@ static long pcie_rkep_ioctl(struct file *file, unsigned int cmd, unsigned long a
 		if (copy_to_user(uarg, &val, sizeof(val)))
 			return -EFAULT;
 		break;
+	case PCIE_EP_RESET_CTRL:
 #ifdef CONFIG_PCIEASPM_EXT
 		dev_info(&pcie_rkep->pdev->dev, "reset controller\n");
 		return rockchip_dw_pcie_pm_ctrl_for_user(pcie_rkep->pdev, ROCKCHIP_PCIE_PM_CTRL_RESET);
diff --git a/drivers/rpmsg/rockchip_rpmsg_test.c b/drivers/rpmsg/rockchip_rpmsg_test.c
index e8d1a0878cd4..dd01e79a41f1 100644
--- a/drivers/rpmsg/rockchip_rpmsg_test.c
+++ b/drivers/rpmsg/rockchip_rpmsg_test.c
@@ -47,7 +47,8 @@ static int rockchip_rpmsg_test_cb(struct rpmsg_device *rp, void *payload,
 	ret = rpmsg_sendto(rp->ept, LINUX_TEST_MSG_2, strlen(LINUX_TEST_MSG_2), remote_ept_id);
 	if (ret)
 		dev_err(&rp->dev, "rpmsg_send failed: %d\n", ret);
-		return ret;
+
+	return ret;
 }
 
 static int rockchip_rpmsg_test_probe(struct rpmsg_device *rp)