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rk3066b: clk_cpu set parent has some problem, do not use it

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chenxing
2012-08-31 20:24:38 +08:00
parent d82d976c09
commit e5a64ef25e
1 changed files with 1 additions and 2 deletions
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3
arch/arm/mach-rk30/clock_data-rk3066b.c
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@@ -3090,7 +3090,7 @@ static void __init rk30_clock_common_init(unsigned long gpll_rate, unsigned long
//code pll
clk_set_rate_nolock(&codec_pll_clk, cpll_rate);
clk_set_parent_nolock(&clk_cpu_div, &general_pll_clk); //816
//clk_set_parent_nolock(&clk_cpu_div, &general_pll_clk); //816
//periph clk
periph_clk_set_init();
@@ -3198,7 +3198,6 @@ void __init rk30_clock_data_init(unsigned long gpll, unsigned long cpll, u32 fla
_rk30_clock_data_init(gpll, cpll, flags);
printk("%s end\n", __func__);
rk30_clk_dump_regs();
while(1);
//rk30_dvfs_init();
}