diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index ce66ffd5a1bb..bfe0fb93a5c6 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -970,6 +970,9 @@ dtb-$(CONFIG_ARCH_RENESAS) += \ r9a06g032-rzn1d400-db.dtb \ sh73a0-kzm9g.dtb dtb-$(CONFIG_ARCH_ROCKCHIP) += \ + rv1103-evb-ref-v10.dtb \ + rv1106-evb1-ref-v10.dtb \ + rv1106-evb2-ref-v10.dtb \ rv1108-elgin-r1.dtb \ rv1108-evb.dtb \ rk3036-evb.dtb \ diff --git a/arch/arm/boot/dts/rv1103-evb-ref-v10.dts b/arch/arm/boot/dts/rv1103-evb-ref-v10.dts new file mode 100644 index 000000000000..b2d774d26b82 --- /dev/null +++ b/arch/arm/boot/dts/rv1103-evb-ref-v10.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; + +#include "rv1103.dtsi" +#include "rv1103-evb-v10.dtsi" + +/ { + model = "Rockchip RV1103 EVB REF V10 Board"; + compatible = "rockchip,rv1103-evb-ref-v10", "rockchip,rv1103"; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16"; + }; +}; diff --git a/arch/arm/boot/dts/rv1103-evb-v10.dtsi b/arch/arm/boot/dts/rv1103-evb-v10.dtsi new file mode 100644 index 000000000000..16145e018faa --- /dev/null +++ b/arch/arm/boot/dts/rv1103-evb-v10.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ + +/ { + +}; + +&fiq_debugger { + rockchip,irq-mode-enable = <1>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rv1106-evb-v10.dtsi b/arch/arm/boot/dts/rv1106-evb-v10.dtsi new file mode 100644 index 000000000000..16145e018faa --- /dev/null +++ b/arch/arm/boot/dts/rv1106-evb-v10.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ + +/ { + +}; + +&fiq_debugger { + rockchip,irq-mode-enable = <1>; + status = "okay"; +}; diff --git a/arch/arm/boot/dts/rv1106-evb1-ref-v10.dts b/arch/arm/boot/dts/rv1106-evb1-ref-v10.dts new file mode 100644 index 000000000000..30c07e082e81 --- /dev/null +++ b/arch/arm/boot/dts/rv1106-evb1-ref-v10.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; + +#include "rv1106.dtsi" +#include "rv1106-evb-v10.dtsi" + +/ { + model = "Rockchip RV1106 EVB1 REF V10 Board"; + compatible = "rockchip,rv1106-evb1-ref-v10", "rockchip,rv1106"; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16"; + }; +}; diff --git a/arch/arm/boot/dts/rv1106-evb2-ref-v10.dts b/arch/arm/boot/dts/rv1106-evb2-ref-v10.dts new file mode 100644 index 000000000000..46ce27bb5cef --- /dev/null +++ b/arch/arm/boot/dts/rv1106-evb2-ref-v10.dts @@ -0,0 +1,18 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2022 Rockchip Electronics Co., Ltd. + */ + +/dts-v1/; + +#include "rv1106.dtsi" +#include "rv1106-evb-v10.dtsi" + +/ { + model = "Rockchip RV1106 EVB2 REF V10 Board"; + compatible = "rockchip,rv1106-evb2-ref-v10", "rockchip,rv1106"; + + chosen { + bootargs = "earlycon=uart8250,mmio32,0xff4c0000 console=ttyFIQ0 root=PARTUUID=614e0000-0000 rootfstype=ext4 rootwait snd_soc_core.prealloc_buffer_size_kbytes=16"; + }; +};