From e5d6848d01f449389735e9cf18c2f92e63a69cc8 Mon Sep 17 00:00:00 2001 From: Xing Wang Date: Sat, 23 Mar 2019 18:12:24 +0800 Subject: [PATCH] audio: auge: support earc rx for sm1 [1/2] PD#SWPL-5389 Problem: earc rx dmac reset and clk issue Solution: fix earc rx dmac and clk Verify: ac200 Change-Id: Ie8e5582f1ee358a8cf694965c9963ae1eeb6685a Signed-off-by: Xing Wang --- sound/soc/amlogic/auge/earc.c | 21 +++++++++--- sound/soc/amlogic/auge/earc_hw.c | 59 ++++++++++++++++++++++++++------ sound/soc/amlogic/auge/earc_hw.h | 1 + 3 files changed, 66 insertions(+), 15 deletions(-) diff --git a/sound/soc/amlogic/auge/earc.c b/sound/soc/amlogic/auge/earc.c index 124ac6919739..355e7db3a8b3 100644 --- a/sound/soc/amlogic/auge/earc.c +++ b/sound/soc/amlogic/auge/earc.c @@ -373,7 +373,9 @@ static int earc_dai_prepare( unsigned int src = EARCRX_DMAC; struct toddr_fmt fmt; - if (bit_depth == 24) + if (bit_depth == 32) + toddr_type = 3; + else if (bit_depth == 24) toddr_type = 4; else toddr_type = 0; @@ -382,9 +384,14 @@ static int earc_dai_prepare( __func__, toddr_src_get_str(src)); - msb = bit_depth - 1; + msb = 28 - 1; + if (bit_depth == 16) + lsb = 28 - bit_depth; + else + lsb = 4; - pr_info("%s m:%d, n:%d\n", __func__, msb, lsb); + pr_info("%s m:%d, n:%d, toddr type:%d\n", + __func__, msb, lsb, toddr_type); fmt.type = toddr_type; fmt.msb = msb; @@ -424,6 +431,8 @@ static int earc_dai_trigger(struct snd_pcm_substream *substream, int cmd, dev_info(substream->pcm->card->dev, "eARC/ARC RX enable\n"); aml_toddr_enable(p_earc->tddr, true); + + earc_rx_enable(true); } break; case SNDRV_PCM_TRIGGER_STOP: @@ -436,6 +445,8 @@ static int earc_dai_trigger(struct snd_pcm_substream *substream, int cmd, } else { dev_info(substream->pcm->card->dev, "eARC/ARC RX disable\n"); + earc_rx_enable(false); + aml_toddr_enable(p_earc->tddr, false); } break; @@ -481,8 +492,8 @@ static int earc_dai_set_sysclk(struct snd_soc_dai *cpu_dai, pr_info("earc_dai_set_sysclk, %d, %d, %d\n", clk_id, freq, dir); - clk_set_rate(p_earc->clk_rx_cmdc, 2000000); - clk_set_rate(p_earc->clk_rx_dmac, 24576000); + clk_set_rate(p_earc->clk_rx_cmdc, 10000000); + clk_set_rate(p_earc->clk_rx_dmac, 250000000); pr_info("earc rx cmdc clk:%lu rx dmac clk:%lu\n", clk_get_rate(p_earc->clk_rx_cmdc), diff --git a/sound/soc/amlogic/auge/earc_hw.c b/sound/soc/amlogic/auge/earc_hw.c index 2974d4e89046..0b217bb2cad0 100644 --- a/sound/soc/amlogic/auge/earc_hw.c +++ b/sound/soc/amlogic/auge/earc_hw.c @@ -40,32 +40,26 @@ void earcrx_cmdc_init(void) (0 << 1) | /* int_recv_packet */ (0 << 0) /* int_rec_time_out */ ); + + earcrx_top_write(EARCRX_ANA_CTRL0, 0x90884814); + earcrx_top_write(EARCRX_PLL_CTRL3, 0x242000); + earcrx_top_write(EARCRX_PLL_CTRL0, 0x10800400); } void earcrx_dmac_init(void) { - earcrx_dmac_write(EARCRX_DMAC_TOP_CTRL0, 1 << 31); /* reg_top_work_en */ earcrx_dmac_write(EARCRX_DMAC_SYNC_CTRL0, - (1 << 31) | /* reg_work_en */ - (1 << 30) | /* reg_rst_afifo_out_n */ - (1 << 29) | /* reg_rst_afifo_in_n */ (1 << 16) | /* reg_ana_buf_data_sel_en */ (3 << 12) | /* reg_ana_buf_data_sel */ (7 << 8) | /* reg_ana_clr_cnt */ (7 << 4) /* reg_ana_set_cnt */ ); - earcrx_dmac_write(EARCRX_ERR_CORRECT_CTRL0, - (1 << 29) | /* reg_rst_afifo_out_n */ - (1 << 28) /* reg_rst_afifo_in_n */ - ); earcrx_dmac_write(EARCRX_DMAC_UBIT_CTRL0, - (1 << 31) | /* reg_work_enable */ (47 << 16) | /* reg_fifo_thd */ (1 << 12) | /* reg_user_lr */ (29 << 0) /* reg_data_bit */ ); earcrx_dmac_write(EARCRX_ANA_RST_CTRL0, 1 << 31); - earcrx_dmac_write(EARCRX_ERR_CORRECT_CTRL0, 1 << 31); /* reg_work_en */ } void earc_arc_init(void) @@ -85,3 +79,48 @@ void earc_arc_init(void) (0x5A5A<<0) /* reg_earc_pb_value */ ); } + +void earc_rx_enable(bool enable) +{ + if (enable) { + earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0, + 1 << 30, /* reg_rst_afifo_out_n */ + 1 << 30); + + earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0, + 1 << 29, /* reg_rst_afifo_in_n */ + 0x1 << 29); + + earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0, + 1 << 29, /* reg_rst_afifo_out_n */ + 1 << 29 + ); + earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0, + 1 << 28, /* reg_rst_afifo_in_n */ + 1 << 28 /* reg_rst_afifo_in_n */ + ); + } else { + earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0, + 0x3 << 29, + 0x0 << 29); + + earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0, + 0x3 << 28, 0x0 << 28); + } + + earcrx_dmac_update_bits(EARCRX_DMAC_SYNC_CTRL0, + 1 << 31, /* reg_work_en */ + enable << 31); + + earcrx_dmac_update_bits(EARCRX_DMAC_UBIT_CTRL0, + 1 << 31, /* reg_work_enable */ + enable << 31); + + earcrx_dmac_update_bits(EARCRX_ERR_CORRECT_CTRL0, + 1 << 31, + enable << 31); /* reg_work_en */ + + earcrx_dmac_update_bits(EARCRX_DMAC_TOP_CTRL0, + 1 << 31, + enable << 31); /* reg_top_work_en */ +} diff --git a/sound/soc/amlogic/auge/earc_hw.h b/sound/soc/amlogic/auge/earc_hw.h index aeb0107daaff..1630733add2f 100644 --- a/sound/soc/amlogic/auge/earc_hw.h +++ b/sound/soc/amlogic/auge/earc_hw.h @@ -23,4 +23,5 @@ extern void earcrx_cmdc_init(void); extern void earcrx_dmac_init(void); extern void earc_arc_init(void); +extern void earc_rx_enable(bool enable); #endif