From e62f59e5679b315ec68ad6b35fa73e1bb1c4d649 Mon Sep 17 00:00:00 2001 From: David Brazdil Date: Thu, 21 Apr 2022 11:00:33 +0100 Subject: [PATCH] ANDROID: KVM: arm64: s2mpu: Refactor DABT handler In preparation for adding more entries to the list of S2MPU registers accessible to the host, refactor the code to use a switch instead of a series of ifs. No functional change intended. Bug: 190463801 Signed-off-by: David Brazdil Change-Id: I70afa8f755d6d96916cdc1f813e6506e97e761c0 --- arch/arm64/kvm/hyp/nvhe/iommu/s2mpu.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/arch/arm64/kvm/hyp/nvhe/iommu/s2mpu.c b/arch/arm64/kvm/hyp/nvhe/iommu/s2mpu.c index 508f5fd5ad66..8ff0daeae176 100644 --- a/arch/arm64/kvm/hyp/nvhe/iommu/s2mpu.c +++ b/arch/arm64/kvm/hyp/nvhe/iommu/s2mpu.c @@ -393,15 +393,16 @@ static u32 host_mmio_reg_access_mask(size_t off, bool is_write) const u32 write_only = is_write ? read_write : no_access; u32 masked_off; - /* IRQ handler can clear interrupts. */ - if (off == REG_NS_INTERRUPT_CLEAR) + switch (off) { + /* Allow EL1 IRQ handler to clear interrupts. */ + case REG_NS_INTERRUPT_CLEAR: return write_only & ALL_VIDS_BITMAP; - - /* IRQ handler can read bitmap of pending interrupts. */ - if (off == REG_NS_FAULT_STATUS) + /* Allow EL1 IRQ handler to read bitmap of pending interrupts. */ + case REG_NS_FAULT_STATUS: return read_only & ALL_VIDS_BITMAP; + } - /* IRQ handler can read fault information. */ + /* Allow EL1 IRQ handler to read fault information. */ masked_off = off & ~REG_NS_FAULT_VID_MASK; if ((masked_off == REG_NS_FAULT_PA_LOW(0)) || (masked_off == REG_NS_FAULT_PA_HIGH(0)) ||