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media: hantro: vp9: use double buffering if needed
Some G2 variants need double buffering to be enabled in order to work correctly, like that found in Allwinner H6 SoC. Add platform quirk for that. Reviewed-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com> Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
committed by
Mauro Carvalho Chehab
parent
ea71631b71
commit
e67a09d199
@@ -73,6 +73,7 @@ struct hantro_irq {
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* @num_clocks: number of clocks in the array
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* @reg_names: array of register range names
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* @num_regs: number of register range names in the array
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* @double_buffer: core needs double buffering
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*/
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struct hantro_variant {
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unsigned int enc_offset;
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@@ -94,6 +95,7 @@ struct hantro_variant {
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int num_clocks;
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const char * const *reg_names;
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int num_regs;
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unsigned int double_buffer : 1;
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};
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/**
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@@ -270,6 +270,7 @@
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#define g2_apf_threshold G2_DEC_REG(55, 0, 0xffff)
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#define g2_clk_gate_e G2_DEC_REG(58, 16, 0x1)
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#define g2_double_buffer_e G2_DEC_REG(58, 15, 0x1)
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#define g2_buswidth G2_DEC_REG(58, 8, 0x7)
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#define g2_max_burst G2_DEC_REG(58, 0, 0xff)
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@@ -847,6 +847,8 @@ config_registers(struct hantro_ctx *ctx, const struct v4l2_ctrl_vp9_frame *dec_p
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hantro_reg_write(ctx->dev, &g2_clk_gate_e, 1);
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hantro_reg_write(ctx->dev, &g2_max_cb_size, 6);
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hantro_reg_write(ctx->dev, &g2_min_cb_size, 3);
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if (ctx->dev->variant->double_buffer)
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hantro_reg_write(ctx->dev, &g2_double_buffer_e, 1);
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config_output(ctx, dst, dec_params);
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