From e684a924fa3d5a7902b45f0da6c0a393d6a811ac Mon Sep 17 00:00:00 2001 From: Giuliano Procida Date: Tue, 2 Apr 2024 11:18:46 +0100 Subject: [PATCH] Revert "usb: dwc3: core: configure TX/RX threshold for DWC3_IP" This reverts commit 7932afa9bb6134f4f71a7cae604f689854b83310. It broke the Android kernel ABI and can be brought back in the future in an ABI-safe way if needed. Bug: 332277393 Change-Id: I10abcbf5237536b0ee382d3db16a5ebd82b3222c Signed-off-by: Giuliano Procida --- drivers/usb/dwc3/core.c | 160 +++++++++------------------------------- drivers/usb/dwc3/core.h | 13 ---- 2 files changed, 36 insertions(+), 137 deletions(-) diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c index c0f7217cfa1e..fb3efddd2f29 100644 --- a/drivers/usb/dwc3/core.c +++ b/drivers/usb/dwc3/core.c @@ -1111,111 +1111,6 @@ static void dwc3_set_power_down_clk_scale(struct dwc3 *dwc) } } -static void dwc3_config_threshold(struct dwc3 *dwc) -{ - u32 reg; - u8 rx_thr_num; - u8 rx_maxburst; - u8 tx_thr_num; - u8 tx_maxburst; - - /* - * Must config both number of packets and max burst settings to enable - * RX and/or TX threshold. - */ - if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { - rx_thr_num = dwc->rx_thr_num_pkt_prd; - rx_maxburst = dwc->rx_max_burst_prd; - tx_thr_num = dwc->tx_thr_num_pkt_prd; - tx_maxburst = dwc->tx_max_burst_prd; - - if (rx_thr_num && rx_maxburst) { - reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); - reg |= DWC31_RXTHRNUMPKTSEL_PRD; - - reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); - reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); - - reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); - reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); - - dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); - } - - if (tx_thr_num && tx_maxburst) { - reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); - reg |= DWC31_TXTHRNUMPKTSEL_PRD; - - reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); - reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); - - reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); - reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); - - dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); - } - } - - rx_thr_num = dwc->rx_thr_num_pkt; - rx_maxburst = dwc->rx_max_burst; - tx_thr_num = dwc->tx_thr_num_pkt; - tx_maxburst = dwc->tx_max_burst; - - if (DWC3_IP_IS(DWC3)) { - if (rx_thr_num && rx_maxburst) { - reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); - reg |= DWC3_GRXTHRCFG_PKTCNTSEL; - - reg &= ~DWC3_GRXTHRCFG_RXPKTCNT(~0); - reg |= DWC3_GRXTHRCFG_RXPKTCNT(rx_thr_num); - - reg &= ~DWC3_GRXTHRCFG_MAXRXBURSTSIZE(~0); - reg |= DWC3_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst); - - dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); - } - - if (tx_thr_num && tx_maxburst) { - reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); - reg |= DWC3_GTXTHRCFG_PKTCNTSEL; - - reg &= ~DWC3_GTXTHRCFG_TXPKTCNT(~0); - reg |= DWC3_GTXTHRCFG_TXPKTCNT(tx_thr_num); - - reg &= ~DWC3_GTXTHRCFG_MAXTXBURSTSIZE(~0); - reg |= DWC3_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst); - - dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); - } - } else { - if (rx_thr_num && rx_maxburst) { - reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); - reg |= DWC31_GRXTHRCFG_PKTCNTSEL; - - reg &= ~DWC31_GRXTHRCFG_RXPKTCNT(~0); - reg |= DWC31_GRXTHRCFG_RXPKTCNT(rx_thr_num); - - reg &= ~DWC31_GRXTHRCFG_MAXRXBURSTSIZE(~0); - reg |= DWC31_GRXTHRCFG_MAXRXBURSTSIZE(rx_maxburst); - - dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); - } - - if (tx_thr_num && tx_maxburst) { - reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); - reg |= DWC31_GTXTHRCFG_PKTCNTSEL; - - reg &= ~DWC31_GTXTHRCFG_TXPKTCNT(~0); - reg |= DWC31_GTXTHRCFG_TXPKTCNT(tx_thr_num); - - reg &= ~DWC31_GTXTHRCFG_MAXTXBURSTSIZE(~0); - reg |= DWC31_GTXTHRCFG_MAXTXBURSTSIZE(tx_maxburst); - - dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); - } - } -} - /** * dwc3_core_init - Low-level initialization of DWC3 Core * @dwc: Pointer to our controller context structure @@ -1386,7 +1281,42 @@ static int dwc3_core_init(struct dwc3 *dwc) dwc3_writel(dwc->regs, DWC3_GUCTL1, reg); } - dwc3_config_threshold(dwc); + /* + * Must config both number of packets and max burst settings to enable + * RX and/or TX threshold. + */ + if (!DWC3_IP_IS(DWC3) && dwc->dr_mode == USB_DR_MODE_HOST) { + u8 rx_thr_num = dwc->rx_thr_num_pkt_prd; + u8 rx_maxburst = dwc->rx_max_burst_prd; + u8 tx_thr_num = dwc->tx_thr_num_pkt_prd; + u8 tx_maxburst = dwc->tx_max_burst_prd; + + if (rx_thr_num && rx_maxburst) { + reg = dwc3_readl(dwc->regs, DWC3_GRXTHRCFG); + reg |= DWC31_RXTHRNUMPKTSEL_PRD; + + reg &= ~DWC31_RXTHRNUMPKT_PRD(~0); + reg |= DWC31_RXTHRNUMPKT_PRD(rx_thr_num); + + reg &= ~DWC31_MAXRXBURSTSIZE_PRD(~0); + reg |= DWC31_MAXRXBURSTSIZE_PRD(rx_maxburst); + + dwc3_writel(dwc->regs, DWC3_GRXTHRCFG, reg); + } + + if (tx_thr_num && tx_maxburst) { + reg = dwc3_readl(dwc->regs, DWC3_GTXTHRCFG); + reg |= DWC31_TXTHRNUMPKTSEL_PRD; + + reg &= ~DWC31_TXTHRNUMPKT_PRD(~0); + reg |= DWC31_TXTHRNUMPKT_PRD(tx_thr_num); + + reg &= ~DWC31_MAXTXBURSTSIZE_PRD(~0); + reg |= DWC31_MAXTXBURSTSIZE_PRD(tx_maxburst); + + dwc3_writel(dwc->regs, DWC3_GTXTHRCFG, reg); + } + } /* * Modify this for all supported Super Speed ports when @@ -1547,10 +1477,6 @@ static void dwc3_get_properties(struct dwc3 *dwc) u8 lpm_nyet_threshold; u8 tx_de_emphasis; u8 hird_threshold; - u8 rx_thr_num_pkt = 0; - u8 rx_max_burst = 0; - u8 tx_thr_num_pkt = 0; - u8 tx_max_burst = 0; u8 rx_thr_num_pkt_prd = 0; u8 rx_max_burst_prd = 0; u8 tx_thr_num_pkt_prd = 0; @@ -1613,14 +1539,6 @@ static void dwc3_get_properties(struct dwc3 *dwc) "snps,usb2-lpm-disable"); dwc->usb2_gadget_lpm_disable = device_property_read_bool(dev, "snps,usb2-gadget-lpm-disable"); - device_property_read_u8(dev, "snps,rx-thr-num-pkt", - &rx_thr_num_pkt); - device_property_read_u8(dev, "snps,rx-max-burst", - &rx_max_burst); - device_property_read_u8(dev, "snps,tx-thr-num-pkt", - &tx_thr_num_pkt); - device_property_read_u8(dev, "snps,tx-max-burst", - &tx_max_burst); device_property_read_u8(dev, "snps,rx-thr-num-pkt-prd", &rx_thr_num_pkt_prd); device_property_read_u8(dev, "snps,rx-max-burst-prd", @@ -1700,12 +1618,6 @@ static void dwc3_get_properties(struct dwc3 *dwc) dwc->hird_threshold = hird_threshold; - dwc->rx_thr_num_pkt = rx_thr_num_pkt; - dwc->rx_max_burst = rx_max_burst; - - dwc->tx_thr_num_pkt = tx_thr_num_pkt; - dwc->tx_max_burst = tx_max_burst; - dwc->rx_thr_num_pkt_prd = rx_thr_num_pkt_prd; dwc->rx_max_burst_prd = rx_max_burst_prd; diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h index 06c4f7477ebd..ee3a4a2e99f2 100644 --- a/drivers/usb/dwc3/core.h +++ b/drivers/usb/dwc3/core.h @@ -214,11 +214,6 @@ #define DWC3_GRXTHRCFG_RXPKTCNT(n) (((n) & 0xf) << 24) #define DWC3_GRXTHRCFG_PKTCNTSEL BIT(29) -/* Global TX Threshold Configuration Register */ -#define DWC3_GTXTHRCFG_MAXTXBURSTSIZE(n) (((n) & 0xff) << 16) -#define DWC3_GTXTHRCFG_TXPKTCNT(n) (((n) & 0xf) << 24) -#define DWC3_GTXTHRCFG_PKTCNTSEL BIT(29) - /* Global RX Threshold Configuration Register for DWC_usb31 only */ #define DWC31_GRXTHRCFG_MAXRXBURSTSIZE(n) (((n) & 0x1f) << 16) #define DWC31_GRXTHRCFG_RXPKTCNT(n) (((n) & 0x1f) << 21) @@ -1066,10 +1061,6 @@ struct dwc3_scratchpad_array { * @test_mode_nr: test feature selector * @lpm_nyet_threshold: LPM NYET response threshold * @hird_threshold: HIRD threshold - * @rx_thr_num_pkt: USB receive packet count - * @rx_max_burst: max USB receive burst size - * @tx_thr_num_pkt: USB transmit packet count - * @tx_max_burst: max USB transmit burst size * @rx_thr_num_pkt_prd: periodic ESS receive packet count * @rx_max_burst_prd: max periodic ESS receive burst size * @tx_thr_num_pkt_prd: periodic ESS transmit packet count @@ -1299,10 +1290,6 @@ struct dwc3 { u8 test_mode_nr; u8 lpm_nyet_threshold; u8 hird_threshold; - u8 rx_thr_num_pkt; - u8 rx_max_burst; - u8 tx_thr_num_pkt; - u8 tx_max_burst; u8 rx_thr_num_pkt_prd; u8 rx_max_burst_prd; u8 tx_thr_num_pkt_prd;