From e6b572efcc8febc5467ee764fbef1f6b316c7806 Mon Sep 17 00:00:00 2001 From: Chaoyi Chen Date: Thu, 7 Aug 2025 19:01:27 +0800 Subject: [PATCH] drm/rockchip: vop2: Do not clear wb intr status when commit new wb If a new wb commit is too close to the timing of wb dma complete, clearing the wb intr status will lose the wb dma complete status. In this case, the software process is as follows: vop2_wb_commit() -> vop2_wb_irqs_enable() -> Clear wb intr -> vop3_sys_isr()/vop2_isr() -> vop2_read_and_clear_wb_irqs() Since we had cleared the intr in vop2_wb_irqs_enable(), the value read by vop2_read_and_clear_wb_irqs() is 0, and we have lost the interrupt status. Change-Id: I93bf7bd8b57336c7bb64353ce935a6991f93742b Signed-off-by: Chaoyi Chen --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index f06cc0eceddb..3ef5c987c779 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -3948,7 +3948,6 @@ static void vop2_wb_irqs_enable(struct vop2 *vop2) if (is_vop3(vop2)) irqs |= WB_COMPLETE_INTR; - VOP_INTR_SET_TYPE(vop2, intr, clear, irqs, 1); VOP_INTR_SET_TYPE(vop2, intr, enable, irqs, 1); }