From 528c77156237c4fb80a8ff3a5a8dba6409c22167 Mon Sep 17 00:00:00 2001 From: Yanjun Liao Date: Tue, 11 Mar 2025 17:34:45 +0800 Subject: [PATCH 01/11] video: rockchip: mpp: rkvenc2: Fix vepu580 bs_wr addr The buffer write address ADR_BSBS of VEPU580 differs from other IPs and requires separate definition. Change-Id: I8a97f26ffd64ac74cedeed84de408e3ec952fd52 Signed-off-by: Yanjun Liao --- drivers/video/rockchip/mpp/mpp_rkvenc2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/video/rockchip/mpp/mpp_rkvenc2.c b/drivers/video/rockchip/mpp/mpp_rkvenc2.c index 4001fb802b66..98c7e4d5640b 100644 --- a/drivers/video/rockchip/mpp/mpp_rkvenc2.c +++ b/drivers/video/rockchip/mpp/mpp_rkvenc2.c @@ -1572,7 +1572,7 @@ static void rkvenc2_bs_overflow_handle(struct mpp_dev *mpp) if (bs_wr >= bs_top) bs_wr = bs_bot; /* update write addr for enc continue */ - mpp_write(mpp, RKVENC2_REG_ADR_BSBS, bs_wr); + mpp_write(mpp, RKVENC580_REG_ADR_BSBS, bs_wr); } else { bs_rd = mpp_read(mpp, RKVENC2_REG_ADR_BSBR); bs_wr = mpp_read(mpp, RKVENC2_REG_ST_BSB); From f3c405d91058e5ade4e18bd248599eb3926c0b2f Mon Sep 17 00:00:00 2001 From: Yandong Lin Date: Fri, 7 Mar 2025 15:46:11 +0800 Subject: [PATCH 02/11] video: rockchip: dvbm: Support vpss wrap Change-Id: I00d280d9aba30be37c3511a0561af427dc413300 Signed-off-by: Yandong Lin --- drivers/video/rockchip/dvbm/rockchip_dvbm.c | 87 ++++++++++++++------- include/soc/rockchip/rockchip_dvbm.h | 20 +++-- 2 files changed, 71 insertions(+), 36 deletions(-) diff --git a/drivers/video/rockchip/dvbm/rockchip_dvbm.c b/drivers/video/rockchip/dvbm/rockchip_dvbm.c index db90191b121c..08415f8fa38a 100644 --- a/drivers/video/rockchip/dvbm/rockchip_dvbm.c +++ b/drivers/video/rockchip/dvbm/rockchip_dvbm.c @@ -44,18 +44,17 @@ static struct dvbm_ctx *g_ctx; struct dvbm_ctx { struct device *dev; + struct dvbm_port ports[DVBM_PORT_BUTT]; u32 isp_connet; u32 vepu_connet; /* vepu infos */ - struct dvbm_port port_vepu; atomic_t vepu_link; struct dvbm_cb vepu_cb; struct dvbm_addr_cfg vepu_cfg; /* isp infos */ - struct dvbm_port port_isp; struct dvbm_cb isp_cb; struct dvbm_isp_cfg_t isp_cfg[DVBM_CHANNEL_NUM]; struct dvbm_addr_cfg dvbm_addr[DVBM_CHANNEL_NUM]; @@ -71,16 +70,21 @@ struct dvbm_ctx { static struct dvbm_ctx *port_to_ctx(struct dvbm_port *port) { - struct dvbm_ctx *ctx = NULL; + return g_ctx; +} - if (IS_ERR_OR_NULL(port)) - return g_ctx; - if (port->dir == DVBM_ISP_PORT) - ctx = container_of(port, struct dvbm_ctx, port_isp); - else if (port->dir == DVBM_VEPU_PORT) - ctx = container_of(port, struct dvbm_ctx, port_vepu); +static const char *dvbm_port_name(enum dvbm_port_dir dir) +{ + static const char *const name[] = { + [DVBM_ISP_PORT] = "isp", + [DVBM_VEPU_PORT] = "vepu", + [DVBM_VPSS_PORT] = "vpss", + }; - return ctx; + if (dir >= DVBM_PORT_BUTT) + return "unknown"; + + return name[dir]; } static void dvbm2enc_callback(struct dvbm_ctx *ctx, enum dvbm_cb_event event, void *arg) @@ -137,10 +141,13 @@ struct dvbm_port *rk_dvbm_get_port(struct platform_device *pdev, ctx = (struct dvbm_ctx *)platform_get_drvdata(pdev); WARN_ON(!ctx); dvbm_debug("%s dir %d\n", __func__, dir); - if (dir == DVBM_ISP_PORT) - port = &ctx->port_isp; - else if (dir == DVBM_VEPU_PORT) - port = &ctx->port_vepu; + + if (dir >= DVBM_PORT_BUTT) { + dvbm_err("%s dir %d error\n", __func__, dir); + return NULL; + } + + port = &ctx->ports[dir]; return port; } @@ -173,17 +180,25 @@ int rk_dvbm_link(struct dvbm_port *port, int id) ctx = port_to_ctx(port); dir = port->dir; - if (dir == DVBM_ISP_PORT) { + switch (dir) { + case DVBM_ISP_PORT: { if (id >= DVBM_CHANNEL_NUM) - dvbm_err("id %d is invalid\n", id); + dvbm_err("isp id %d is invalid\n", id); dvbm2enc_callback(ctx, DVBM_ISP_REQ_CONNECT, &id); - } else if (dir == DVBM_VEPU_PORT) { + } break; + case DVBM_VPSS_PORT: { + if (id >= DVBM_CHANNEL_NUM) + dvbm_err("vpss id %d is invalid\n", id); + + dvbm2enc_callback(ctx, DVBM_VPSS_REQ_CONNECT, &id); + } break; + default: { + } break; } dvbm_debug("%s %d connect frm_cnt[%d : %d]\n", - dir == DVBM_ISP_PORT ? "isp" : "vepu", id, - ctx->isp_frm_start, ctx->isp_frm_end); + dvbm_port_name(dir), id, ctx->isp_frm_start, ctx->isp_frm_end); return ret; } @@ -200,14 +215,24 @@ int rk_dvbm_unlink(struct dvbm_port *port, int id) ctx = port_to_ctx(port); dir = port->dir; - if (dir == DVBM_ISP_PORT) { + switch (dir) { + case DVBM_ISP_PORT: { if (id >= DVBM_CHANNEL_NUM) - dvbm_err("id %d is invalid\n", id); + dvbm_err("isp id %d is invalid\n", id); dvbm2enc_callback(ctx, DVBM_ISP_REQ_DISCONNECT, &id); - } else if (dir == DVBM_VEPU_PORT) { + } break; + case DVBM_VPSS_PORT: { + if (id >= DVBM_CHANNEL_NUM) + dvbm_err("vpss id %d is invalid\n", id); + + dvbm2enc_callback(ctx, DVBM_VPSS_REQ_DISCONNECT, &id); + } break; + default: { + } break; } - dvbm_debug("%s disconnect\n", dir == DVBM_ISP_PORT ? "isp" : "vepu"); + + dvbm_debug("%s %d disconnect\n", dvbm_port_name(dir), id); return 0; } @@ -239,7 +264,7 @@ int rk_dvbm_ctrl(struct dvbm_port *port, enum dvbm_cmd cmd, void *arg) { struct dvbm_ctx *ctx; - if ((cmd < DVBM_ISP_CMD_BASE) || (cmd > DVBM_VEPU_CMD_BUTT)) { + if ((cmd < DVBM_ISP_CMD_BASE) || (cmd > DVBM_VPSS_CMD_BUTT)) { dvbm_err("%s input cmd invalid\n", __func__); return -EINVAL; } @@ -247,7 +272,8 @@ int rk_dvbm_ctrl(struct dvbm_port *port, enum dvbm_cmd cmd, void *arg) ctx = port_to_ctx(port); switch (cmd) { - case DVBM_ISP_SET_CFG: { + case DVBM_ISP_SET_CFG: + case DVBM_VPSS_SET_CFG: { struct dvbm_isp_cfg_t *cfg = (struct dvbm_isp_cfg_t *)arg; struct dvbm_addr_cfg *dvbm_adr; u32 chan_id = cfg->chan_id; @@ -270,12 +296,14 @@ int rk_dvbm_ctrl(struct dvbm_port *port, enum dvbm_cmd cmd, void *arg) dvbm_adr->cbuf_sadr = cfg->dma_addr + cfg->cbuf_bot; dvbm2enc_callback(ctx, DVBM_ISP_SET_DVBM_CFG, cfg); } break; - case DVBM_ISP_FRM_START: { + case DVBM_ISP_FRM_START: + case DVBM_VPSS_FRM_START: { dvbm2enc_callback(ctx, DVBM_VEPU_NOTIFY_FRM_STR, arg); rk_dvbm_update_isp_frm_info(ctx, 0); rk_dvbm_show_time(ctx); } break; - case DVBM_ISP_FRM_END: { + case DVBM_ISP_FRM_END: + case DVBM_VPSS_FRM_END: { u32 line_cnt = ctx->isp_max_lcnt; dvbm2enc_callback(ctx, DVBM_VEPU_NOTIFY_FRM_END, arg); @@ -327,6 +355,7 @@ static int rk_dvbm_probe(struct platform_device *pdev) { struct dvbm_ctx *ctx = NULL; struct device *dev = &pdev->dev; + u32 i; dev_info(dev, "probe start\n"); ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); @@ -334,8 +363,8 @@ static int rk_dvbm_probe(struct platform_device *pdev) return -ENOMEM; ctx->dev = dev; - ctx->port_isp.dir = DVBM_ISP_PORT; - ctx->port_vepu.dir = DVBM_VEPU_PORT; + for (i = 0; i < DVBM_PORT_BUTT; i++) + ctx->ports[i].dir = (enum dvbm_port_dir)i; platform_set_drvdata(pdev, ctx); diff --git a/include/soc/rockchip/rockchip_dvbm.h b/include/soc/rockchip/rockchip_dvbm.h index d153b6bbd57b..802f9c238410 100644 --- a/include/soc/rockchip/rockchip_dvbm.h +++ b/include/soc/rockchip/rockchip_dvbm.h @@ -11,6 +11,8 @@ enum dvbm_port_dir { DVBM_ISP_PORT, DVBM_VEPU_PORT, + DVBM_VPSS_PORT, + DVBM_PORT_BUTT, }; enum dvbm_cmd { @@ -26,14 +28,12 @@ enum dvbm_cmd { DVBM_VEPU_CMD_BASE = 0x10, DVBM_VEPU_GET_ADR, DVBM_VEPU_CMD_BUTT, -}; -enum isp_frame_status { - ISP_FRAME_START, - ISP_FRAME_ONE_QUARTER, - ISP_FRAME_HALF, - ISP_FRAME_THREE_QUARTERS, - ISP_FRAME_FINISH, + DVBM_VPSS_CMD_BASE = 0x20, + DVBM_VPSS_SET_CFG, + DVBM_VPSS_FRM_START, + DVBM_VPSS_FRM_END, + DVBM_VPSS_CMD_BUTT, }; enum dvbm_cb_event { @@ -51,6 +51,12 @@ enum dvbm_cb_event { DVBM_VEPU_NOTIFY_FRM_END, DVBM_VEPU_NOTIFY_FRM_INFO, DVBM_VEPU_EVENT_BUTT, + + DVBM_VPSS_EVENT_BASE = 0x20, + DVBM_VPSS_REQ_CONNECT, + DVBM_VPSS_REQ_DISCONNECT, + DVBM_VPSS_SET_DVBM_CFG, + DVBM_VPSS_EVENT_BUTT, }; struct dvbm_port { From 5f1fee0288d8f6b8983001a9600f5998d3734e53 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Wed, 12 Mar 2025 14:52:30 +0800 Subject: [PATCH 03/11] ARM: dts: rockchip: remove invalid property 'reset-value' for panel Q7050ITH2641AA1T related DTS Change-Id: I3fd27c8a9f1fda563e526e8503e231a92997bd66 Signed-off-by: Damon Ding --- arch/arm/boot/dts/rk3506g-evb1-v10-rgb-Q7050ITH2641AA1T.dts | 1 - arch/arm/boot/dts/rv1106-evb-ext-rgb-v10.dtsi | 1 - 2 files changed, 2 deletions(-) diff --git a/arch/arm/boot/dts/rk3506g-evb1-v10-rgb-Q7050ITH2641AA1T.dts b/arch/arm/boot/dts/rk3506g-evb1-v10-rgb-Q7050ITH2641AA1T.dts index 8a98e6a8ef5f..16007152599e 100644 --- a/arch/arm/boot/dts/rk3506g-evb1-v10-rgb-Q7050ITH2641AA1T.dts +++ b/arch/arm/boot/dts/rk3506g-evb1-v10-rgb-Q7050ITH2641AA1T.dts @@ -20,7 +20,6 @@ enable-gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; diff --git a/arch/arm/boot/dts/rv1106-evb-ext-rgb-v10.dtsi b/arch/arm/boot/dts/rv1106-evb-ext-rgb-v10.dtsi index 883111aefb3b..cca3859ea098 100644 --- a/arch/arm/boot/dts/rv1106-evb-ext-rgb-v10.dtsi +++ b/arch/arm/boot/dts/rv1106-evb-ext-rgb-v10.dtsi @@ -53,7 +53,6 @@ enable-gpios = <&gpio1 RK_PA3 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; From 52059734da83f775c6fe9a36279b459216caf261 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Wed, 12 Mar 2025 14:54:58 +0800 Subject: [PATCH 04/11] arm64: dts: rockchip: remove invalid property 'reset-value' for panel Q7050ITH2641AA1T related DTS Change-Id: Iaf8063323716c29074f3aee290ea4cc69764828f Signed-off-by: Damon Ding --- .../dts/rockchip/rk3562-evb1-lp4x-v10-rgb-Q7050ITH2641AA1T.dts | 1 - .../boot/dts/rockchip/rk3576-test1-v10-rgb-Q7050ITH2641AA1T.dts | 1 - 2 files changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-Q7050ITH2641AA1T.dts b/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-Q7050ITH2641AA1T.dts index 3ac35b332687..f5525cb46167 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-Q7050ITH2641AA1T.dts +++ b/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-Q7050ITH2641AA1T.dts @@ -20,7 +20,6 @@ enable-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3576-test1-v10-rgb-Q7050ITH2641AA1T.dts b/arch/arm64/boot/dts/rockchip/rk3576-test1-v10-rgb-Q7050ITH2641AA1T.dts index bcefa3061978..760f20b0b1d9 100644 --- a/arch/arm64/boot/dts/rockchip/rk3576-test1-v10-rgb-Q7050ITH2641AA1T.dts +++ b/arch/arm64/boot/dts/rockchip/rk3576-test1-v10-rgb-Q7050ITH2641AA1T.dts @@ -22,7 +22,6 @@ enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; From e7e7e1b0ef14aa467fab4c7fd2da08e38c73f051 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Wed, 12 Mar 2025 15:13:12 +0800 Subject: [PATCH 05/11] arm64: dts: rockchip: rk3308-evb: remove invalid property 'reset-value' for panel nodes Change-Id: I76178c9f34da131cf3e84f6b6a34d4bf28b2d947 Signed-off-by: Damon Ding --- .../boot/dts/rockchip/rk3308-evb-audio-v10-amp-display-rgb.dts | 1 - .../arm64/boot/dts/rockchip/rk3308-evb-audio-v10-display-rgb.dts | 1 - arch/arm64/boot/dts/rockchip/rk3308bs-evb-ext-mcu-v10.dtsi | 1 - arch/arm64/boot/dts/rockchip/rk3308bs-evb-rgb-display-v20.dts | 1 - 4 files changed, 4 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-amp-display-rgb.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-amp-display-rgb.dts index 99f247093d6d..e4fa7a2f2969 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-amp-display-rgb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-amp-display-rgb.dts @@ -59,7 +59,6 @@ enable-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-display-rgb.dts b/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-display-rgb.dts index 3e58d704a7b9..68478f33d79a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-display-rgb.dts +++ b/arch/arm64/boot/dts/rockchip/rk3308-evb-audio-v10-display-rgb.dts @@ -58,7 +58,6 @@ //enable-gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>; //enable-delay-ms = <20>; //reset-gpios = <&gpio2 RK_PB2 GPIO_ACTIVE_LOW>; - //reset-value = <0>; //reset-delay-ms = <10>; status = "okay"; diff --git a/arch/arm64/boot/dts/rockchip/rk3308bs-evb-ext-mcu-v10.dtsi b/arch/arm64/boot/dts/rockchip/rk3308bs-evb-ext-mcu-v10.dtsi index 8a2bec440e5f..df5c9c51f5df 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308bs-evb-ext-mcu-v10.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308bs-evb-ext-mcu-v10.dtsi @@ -84,7 +84,6 @@ enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; prepare-delay-ms = <20>; unprepare-delay-ms = <20>; diff --git a/arch/arm64/boot/dts/rockchip/rk3308bs-evb-rgb-display-v20.dts b/arch/arm64/boot/dts/rockchip/rk3308bs-evb-rgb-display-v20.dts index 3911b65fd178..d56f8706c2f2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308bs-evb-rgb-display-v20.dts +++ b/arch/arm64/boot/dts/rockchip/rk3308bs-evb-rgb-display-v20.dts @@ -58,7 +58,6 @@ enable-gpios = <&gpio0 RK_PA4 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; From 2585fced1c363a617e99a59ca08618253f454066 Mon Sep 17 00:00:00 2001 From: Damon Ding Date: Wed, 12 Mar 2025 15:16:34 +0800 Subject: [PATCH 06/11] arm64: dts: rockchip: rk3562-evb: remove invalid property 'reset-value' for rgb display board Change-Id: Icdbfa017a8359af181c1b75a603e42f9b3df887a Signed-off-by: Damon Ding --- .../dts/rockchip/rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A.dts | 1 - 1 file changed, 1 deletion(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A.dts b/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A.dts index 847e92e0869a..9e7b05e3563e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A.dts +++ b/arch/arm64/boot/dts/rockchip/rk3562-evb1-lp4x-v10-rgb-FX070-DHM11BOE-A.dts @@ -21,7 +21,6 @@ enable-gpios = <&gpio3 RK_PA6 GPIO_ACTIVE_LOW>; enable-delay-ms = <20>; reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; - reset-value = <0>; reset-delay-ms = <10>; status = "okay"; From 78b9e8a196c1f087769a32d77e2e8407cc17266e Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Wed, 12 Mar 2025 09:50:35 +0800 Subject: [PATCH 07/11] drm/rockchip: dw_hdmi: Fix crash when hdmi is disabled in kernel logo crash log: [ 11.867212][ T80] Unable to handle kernel read from unreadable memory at virtual address 0000000000000090 [ 11.868072][ T80] Mem abort info: [ 11.868390][ T80] ESR = 0x0000000096000005 [ 11.868795][ T80] EC = 0x25: DABT (current EL), IL = 32 bits [ 11.869326][ T80] SET = 0, FnV = 0 [ 11.869667][ T80] EA = 0, S1PTW = 0 [ 11.870008][ T80] FSC = 0x05: level 1 translation fault [ 11.870504][ T80] Data abort info: [ 11.870822][ T80] ISV = 0, ISS = 0x00000005 [ 11.871228][ T80] CM = 0, WnR = 0 [ 11.871558][ T80] [0000000000000090] user address but active_mm is swapper [ 11.872178][ T80] Internal error: Oops: 0000000096000005 [#1] PREEMPT SMP [ 11.872798][ T80] Modules linked in: [ 11.873142][ T80] CPU: 4 PID: 80 Comm: kworker/u16:2 Not tainted 6.1.118 #70 [ 11.873787][ T80] Hardware name: Rockchip RK3576 EVB1 V10 Board (DT) [ 11.874362][ T80] Workqueue: events_unbound deferred_probe_work_func [ 11.874947][ T80] pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--) [ 11.875625][ T80] pc : rockchip_drm_crtc_output_pre_disable+0xc/0x44 [ 11.876205][ T80] lr : dw_hdmi_rockchip_crtc_pre_disable+0x34/0x54 [ 11.876772][ T80] sp : ffffffc00ab7b5f0 [ 11.877134][ T80] x29: ffffffc00ab7b5f0 x28: ffffffc009633ea8 x27: ffffff80c6014240 [ 11.877838][ T80] x26: 0000000000000038 x25: 0000000000000001 x24: 0000000000000028 [ 11.878531][ T80] x23: 0000000000000000 x22: ffffff80c6014240 x21: ffffff80c1b157b8 [ 11.879222][ T80] x20: ffffff80c2b7e840 x19: ffffff80c1b15040 x18: ffffffc00ab650f0 [ 11.879915][ T80] x17: 0000000000000068 x16: 00000000000000c4 x15: ffffffc009502784 [ 11.880607][ T80] x14: 0000000000003738 x13: ffffffc00ab7b272 x12: 0000000000000000 [ 11.881300][ T80] x11: 0000000000000001 x10: 0000000000000001 x9 : ffffff80c2b7e868 [ 11.882002][ T80] x8 : 0000000000000800 x7 : 3d45505954564544 x6 : 000000004e514553 [ 11.882694][ T80] x5 : 0000000000000000 x4 : 0000000000000000 x3 : ffffffc00a32e3c0 [ 11.883396][ T80] x2 : 0000000000000000 x1 : 0000000000000800 x0 : 0000000000000000 [ 11.884088][ T80] Call trace: [ 11.884373][ T80] rockchip_drm_crtc_output_pre_disable+0xc/0x44 [ 11.884928][ T80] dw_hdmi_rockchip_crtc_pre_disable+0x34/0x54 [ 11.885461][ T80] dw_hdmi_qp_bridge_atomic_disable+0xc8/0x1d4 [ 11.885994][ T80] drm_atomic_bridge_chain_disable+0x6c/0xb4 [ 11.886518][ T80] drm_atomic_helper_commit_modeset_disables+0x174/0x57c [ 11.887129][ T80] rockchip_drm_atomic_helper_commit_tail_rpm+0x4c/0x304 [ 11.887741][ T80] commit_tail+0xa4/0x154 [ 11.888117][ T80] drm_atomic_helper_commit+0x1c4/0x1e4 [ 11.888604][ T80] drm_atomic_commit+0xa4/0xd0 [ 11.889016][ T80] rockchip_drm_show_logo+0x1a48/0x1d64 [ 11.889505][ T80] rockchip_drm_bind+0x1d8/0x298 [ 11.889937][ T80] try_to_bring_up_aggregate_device+0x168/0x1b4 [ 11.890481][ T80] __component_add+0xd0/0x17c [ 11.890891][ T80] component_add+0x14/0x20 [ 11.891279][ T80] dw_mipi_dsi2_host_attach+0x158/0x1d4 [ 11.891768][ T80] mipi_dsi_attach+0x28/0x3c [ 11.892171][ T80] panel_simple_dsi_probe+0x1a8/0x22c [ 11.892638][ T80] mipi_dsi_drv_probe+0x20/0x2c [ 11.893059][ T80] really_probe+0x174/0x350 [ 11.893447][ T80] __driver_probe_device+0xa0/0x128 [ 11.893901][ T80] driver_probe_device+0x44/0x210 [ 11.894333][ T80] __device_attach_driver+0x12c/0x154 [ 11.894798][ T80] bus_for_each_drv+0x84/0xd0 [ 11.895211][ T80] __device_attach+0xf0/0x170 [ 11.895621][ T80] device_initial_probe+0x14/0x20 [ 11.896063][ T80] bus_probe_device+0x34/0x98 [ 11.896475][ T80] deferred_probe_work_func+0x7c/0xd8 [ 11.896940][ T80] process_one_work+0x1a8/0x3b8 [ 11.897365][ T80] worker_thread+0x300/0x430 [ 11.897766][ T80] kthread+0xec/0x1b8 [ 11.898110][ T80] ret_from_fork+0x10/0x20 Change-Id: Ie336d9b7a06970284589f79a955173a44ab41636 Signed-off-by: Algea Cao --- drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c index ba111d994a19..fc7fc9c77af1 100644 --- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c +++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c @@ -3248,6 +3248,9 @@ static void dw_hdmi_rockchip_crtc_post_enable(void *data, struct drm_crtc *crtc) struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; int output_if; + if (!crtc) + return; + switch (hdmi->id) { case 0: output_if = VOP_OUTPUT_IF_HDMI0; @@ -3268,6 +3271,9 @@ static void dw_hdmi_rockchip_crtc_pre_disable(void *data, struct drm_crtc *crtc) struct rockchip_hdmi *hdmi = (struct rockchip_hdmi *)data; int output_if; + if (!crtc) + return; + switch (hdmi->id) { case 0: output_if = VOP_OUTPUT_IF_HDMI0; From b84c5d0c819a3b544738cf00a79cc496917bb767 Mon Sep 17 00:00:00 2001 From: Algea Cao Date: Tue, 4 Mar 2025 09:30:54 +0800 Subject: [PATCH 08/11] drm/bridge: synopsys: dw-hdmi-qp: Only set extcon status when hdmi plug/unplug If an extcon event is reported when hdmi is enabled/disabled while playing hdr videos, Some player app will self-destruct and restart after receiving the event. This leads to an endless loop of switching hdmi enable and disable. The extcon event is normally sent when hdmi plug. Previously, the extcon event reporting was placed in hdmi enable/disable to resolve issues related to audio transparent transmission. The current code has hdmi_codec_plugged_cb has solved the audio transmission problem, so extcon event is changed back to be called only when hdmi plug/unplug Change-Id: I613a0c99a0d33e133280cc6ba3d74760532c7f2f Signed-off-by: Algea Cao --- drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c | 20 ++++++++++++++------ 1 file changed, 14 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c index 821e671cd49a..a2533e8c33d7 100644 --- a/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c +++ b/drivers/gpu/drm/bridge/synopsys/dw-hdmi-qp.c @@ -2619,11 +2619,15 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) hdmi->force = DRM_FORCE_UNSPECIFIED; mutex_unlock(&hdmi->mutex); - if (hdmi->panel || hdmi->force_kernel_output) - return connector_status_connected; + if (hdmi->panel || hdmi->force_kernel_output) { + result = connector_status_connected; + goto out; + } - if (hdmi->next_bridge && hdmi->next_bridge->ops & DRM_BRIDGE_OP_DETECT) - return drm_bridge_detect(hdmi->next_bridge); + if (hdmi->next_bridge && hdmi->next_bridge->ops & DRM_BRIDGE_OP_DETECT) { + result = drm_bridge_detect(hdmi->next_bridge); + goto out; + } if (hdmi->plat_data->left) secondary = hdmi->plat_data->left; @@ -2641,6 +2645,12 @@ dw_hdmi_connector_detect(struct drm_connector *connector, bool force) result = connector_status_disconnected; } +out: + if (result == connector_status_connected) + extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, true); + else + extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, false); + return result; } @@ -3497,7 +3507,6 @@ static void dw_hdmi_qp_bridge_atomic_disable(struct drm_bridge *bridge, dw_hdmi_qp_hdcp_disable(hdmi, conn_state); - extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, false); handle_plugged_change(hdmi, false); if (hdmi->plat_data->crtc_pre_disable) hdmi->plat_data->crtc_pre_disable(data, bridge->encoder->crtc); @@ -3582,7 +3591,6 @@ static void dw_hdmi_qp_bridge_atomic_enable(struct drm_bridge *bridge, dw_hdmi_qp_audio_enable(hdmi); hdmi_clk_regenerator_update_pixel_clock(hdmi); - extcon_set_state_sync(hdmi->extcon, EXTCON_DISP_HDMI, true); handle_plugged_change(hdmi, true); if (hdmi->panel) From 9e48a75254af0d02dc6b9dcf0298518681634ef9 Mon Sep 17 00:00:00 2001 From: Sandy Huang Date: Fri, 27 Sep 2024 14:52:26 +0800 Subject: [PATCH 09/11] drm/rockchip: vop2: use rkiommu 2.0 for vop axi0 by default Signed-off-by: Sandy Huang Change-Id: Ia09b174474eb87f14a7643abbc826356548e8cc4 --- drivers/gpu/drm/rockchip/rockchip_drm_vop2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c index 1f4086267839..76cc7eef3429 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop2.c @@ -4603,8 +4603,8 @@ static void vop2_initial(struct drm_crtc *crtc) vop2_mask_write(vop2, 0x700, 0x3, 4, 0, 0, true); if (vop2->version == VOP_VERSION_RK3576) { - /* Default use rkiommu 1.0 for axi0 */ - VOP_CTRL_SET(vop2, rkmmu_v2_en, 0); + /* Default use rkiommu 2.0 for axi0 */ + VOP_CTRL_SET(vop2, rkmmu_v2_en, 1); if (vop2->merge_irq == true) VOP_CTRL_SET(vop2, vp_intr_merge_en, 1); From 4e9d669102d268a16267b705376b2854d16486a7 Mon Sep 17 00:00:00 2001 From: Zitong Cai Date: Tue, 25 Feb 2025 17:27:22 +0800 Subject: [PATCH 10/11] mfd: display-serdes: Fix pinctrl node shutdown crash Resolve the crash issue caused by closing serdes pinctrl configuration in dts. Change-Id: I0473785d128bf655df9117dc819c502267ffec1e Signed-off-by: Zitong Cai --- drivers/mfd/display-serdes/serdes-core.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mfd/display-serdes/serdes-core.c b/drivers/mfd/display-serdes/serdes-core.c index 4ccf59c4373e..ee8c1fdd1538 100644 --- a/drivers/mfd/display-serdes/serdes-core.c +++ b/drivers/mfd/display-serdes/serdes-core.c @@ -331,7 +331,7 @@ int serdes_set_pinctrl_default(struct serdes *serdes) { int ret = 0; - if ((!IS_ERR(serdes->pinctrl_node)) && (!IS_ERR(serdes->pins_init))) { + if ((!IS_ERR_OR_NULL(serdes->pinctrl_node)) && (!IS_ERR_OR_NULL(serdes->pins_init))) { ret = pinctrl_select_state(serdes->pinctrl_node, serdes->pins_init); if (ret) dev_err(serdes->dev, "could not set init pins\n"); @@ -346,7 +346,7 @@ int serdes_set_pinctrl_sleep(struct serdes *serdes) { int ret = 0; - if ((!IS_ERR(serdes->pinctrl_node)) && (!IS_ERR(serdes->pins_sleep))) { + if ((!IS_ERR_OR_NULL(serdes->pinctrl_node)) && (!IS_ERR_OR_NULL(serdes->pins_sleep))) { ret = pinctrl_select_state(serdes->pinctrl_node, serdes->pins_sleep); if (ret) dev_err(serdes->dev, "could not set sleep pins\n"); @@ -393,7 +393,7 @@ void serdes_device_poweroff(struct serdes *serdes) { int ret = 0; - if ((!IS_ERR(serdes->pinctrl_node)) && (!IS_ERR(serdes->pins_sleep))) { + if ((!IS_ERR_OR_NULL(serdes->pinctrl_node)) && (!IS_ERR_OR_NULL(serdes->pins_sleep))) { ret = pinctrl_select_state(serdes->pinctrl_node, serdes->pins_sleep); if (ret) dev_err(serdes->dev, "could not set sleep pins\n"); From fb12fb01d8764f197da4b68b774dbd3ab43f2ddd Mon Sep 17 00:00:00 2001 From: Zefa Chen Date: Thu, 6 Mar 2025 16:01:57 +0800 Subject: [PATCH 11/11] media: i2c: imx386 modify setting for use same hb Change-Id: If4713db316d5eeac9836dee916c43eb423d41443 Signed-off-by: Zefa Chen --- drivers/media/i2c/imx386.c | 293 ++----------------------------------- 1 file changed, 14 insertions(+), 279 deletions(-) diff --git a/drivers/media/i2c/imx386.c b/drivers/media/i2c/imx386.c index 558787277f5c..68bd472abb62 100644 --- a/drivers/media/i2c/imx386.c +++ b/drivers/media/i2c/imx386.c @@ -730,270 +730,6 @@ static const struct regval imx386_linear_10_1920x1080_regs[] = { {REG_NULL, 0x00}, }; -static const struct regval imx386_linear_10_4032x2256_30fps_regs[] = { - {0x0136, 0x18},//global setting - {0x0137, 0x00}, - {0x3A7D, 0x00}, - {0x3A7E, 0x02}, - {0x3A7F, 0x05}, - {0x3100, 0x00}, - {0x3101, 0x40}, - {0x3102, 0x00}, - {0x3103, 0x10}, - {0x3104, 0x01}, - {0x3105, 0xE8}, - {0x3106, 0x01}, - {0x3107, 0xF0}, - {0x3150, 0x04}, - {0x3151, 0x03}, - {0x3152, 0x02}, - {0x3153, 0x01}, - {0x5A86, 0x00}, - {0x5A87, 0x82}, - {0x5D1A, 0x00}, - {0x5D95, 0x02}, - {0x5E1B, 0x00}, - {0x5F5A, 0x00}, - {0x5F5B, 0x04}, - {0x682C, 0x31}, - {0x6831, 0x31}, - {0x6835, 0x0E}, - {0x6836, 0x31}, - {0x6838, 0x30}, - {0x683A, 0x06}, - {0x683B, 0x33}, - {0x683D, 0x30}, - {0x6842, 0x31}, - {0x6844, 0x31}, - {0x6847, 0x31}, - {0x6849, 0x31}, - {0x684D, 0x0E}, - {0x684E, 0x32}, - {0x6850, 0x31}, - {0x6852, 0x06}, - {0x6853, 0x33}, - {0x6855, 0x31}, - {0x685A, 0x32}, - {0x685C, 0x33}, - {0x685F, 0x31}, - {0x6861, 0x33}, - {0x6865, 0x0D}, - {0x6866, 0x33}, - {0x6868, 0x31}, - {0x686B, 0x34}, - {0x686D, 0x31}, - {0x6872, 0x32}, - {0x6877, 0x33}, - {0x7FF0, 0x01}, - {0x7FF4, 0x08}, - {0x7FF5, 0x3C}, - {0x7FFA, 0x01}, - {0x7FFD, 0x00}, - {0x831E, 0x00}, - {0x831F, 0x00}, - {0x9301, 0xBD}, - {0x9B94, 0x03}, - {0x9B95, 0x00}, - {0x9B96, 0x08}, - {0x9B97, 0x00}, - {0x9B98, 0x0A}, - {0x9B99, 0x00}, - {0x9BA7, 0x18}, - {0x9BA8, 0x18}, - {0x9D04, 0x08}, - {0x9D50, 0x8C}, - {0x9D51, 0x64}, - {0x9D52, 0x50}, - {0x9E31, 0x04}, - {0x9E32, 0x04}, - {0x9E33, 0x04}, - {0x9E34, 0x04}, - {0xA200, 0x00}, - {0xA201, 0x0A}, - {0xA202, 0x00}, - {0xA203, 0x0A}, - {0xA204, 0x00}, - {0xA205, 0x0A}, - {0xA206, 0x01}, - {0xA207, 0xC0}, - {0xA208, 0x00}, - {0xA209, 0xC0}, - {0xA20C, 0x00}, - {0xA20D, 0x0A}, - {0xA20E, 0x00}, - {0xA20F, 0x0A}, - {0xA210, 0x00}, - {0xA211, 0x0A}, - {0xA212, 0x01}, - {0xA213, 0xC0}, - {0xA214, 0x00}, - {0xA215, 0xC0}, - {0xA300, 0x00}, - {0xA301, 0x0A}, - {0xA302, 0x00}, - {0xA303, 0x0A}, - {0xA304, 0x00}, - {0xA305, 0x0A}, - {0xA306, 0x01}, - {0xA307, 0xC0}, - {0xA308, 0x00}, - {0xA309, 0xC0}, - {0xA30C, 0x00}, - {0xA30D, 0x0A}, - {0xA30E, 0x00}, - {0xA30F, 0x0A}, - {0xA310, 0x00}, - {0xA311, 0x0A}, - {0xA312, 0x01}, - {0xA313, 0xC0}, - {0xA314, 0x00}, - {0xA315, 0xC0}, - {0xBC19, 0x01}, - {0xBC1C, 0x0A}, - {0x3035, 0x01},//image quality - {0x3051, 0x00}, - {0x7F47, 0x00}, - {0x7F78, 0x00}, - {0x7F89, 0x00}, - {0x7F93, 0x00}, - {0x7FB4, 0x00}, - {0x7FCC, 0x01}, - {0x9D02, 0x00}, - {0x9D44, 0x8C}, - {0x9D62, 0x8C}, - {0x9D63, 0x50}, - {0x9D64, 0x1B}, - {0x9E0D, 0x00}, - {0x9E0E, 0x00}, - {0x9E15, 0x0A}, - {0x9F02, 0x00}, - {0x9F03, 0x23}, - {0x9F4E, 0x00}, - {0x9F4F, 0x42}, - {0x9F54, 0x00}, - {0x9F55, 0x5A}, - {0x9F6E, 0x00}, - {0x9F6F, 0x10}, - {0x9F72, 0x00}, - {0x9F73, 0xC8}, - {0x9F74, 0x00}, - {0x9F75, 0x32}, - {0x9FD3, 0x00}, - {0x9FD4, 0x00}, - {0x9FD5, 0x00}, - {0x9FD6, 0x3C}, - {0x9FD7, 0x3C}, - {0x9FD8, 0x3C}, - {0x9FD9, 0x00}, - {0x9FDA, 0x00}, - {0x9FDB, 0x00}, - {0x9FDC, 0xFF}, - {0x9FDD, 0xFF}, - {0x9FDE, 0xFF}, - {0xA002, 0x00}, - {0xA003, 0x14}, - {0xA04E, 0x00}, - {0xA04F, 0x2D}, - {0xA054, 0x00}, - {0xA055, 0x40}, - {0xA06E, 0x00}, - {0xA06F, 0x10}, - {0xA072, 0x00}, - {0xA073, 0xC8}, - {0xA074, 0x00}, - {0xA075, 0x32}, - {0xA0CA, 0x04}, - {0xA0CB, 0x04}, - {0xA0CC, 0x04}, - {0xA0D3, 0x0A}, - {0xA0D4, 0x0A}, - {0xA0D5, 0x0A}, - {0xA0D6, 0x00}, - {0xA0D7, 0x00}, - {0xA0D8, 0x00}, - {0xA0D9, 0x18}, - {0xA0DA, 0x18}, - {0xA0DB, 0x18}, - {0xA0DC, 0x00}, - {0xA0DD, 0x00}, - {0xA0DE, 0x00}, - {0xBCB2, 0x01}, - {0x0112, 0x0A},//4k2k@60fps - {0x0113, 0x0A}, - {0x0301, 0x06}, - {0x0303, 0x02}, - {0x0305, 0x02}, - {0x0306, 0x00}, - {0x0307, 0x4B}, - {0x0309, 0x0A}, - {0x030B, 0x01}, - {0x030D, 0x0C}, - {0x030E, 0x01}, - {0x030F, 0x90}, - {0x0310, 0x01}, - {0x0342, 0x10},//10c8 60fps - {0x0343, 0xC8}, - {0x0340, 0x09}, - {0x0341, 0x16}, - {0x0344, 0x00}, - {0x0345, 0x00}, - {0x0346, 0x01}, - {0x0347, 0x7C}, - {0x0348, 0x0F}, - {0x0349, 0xBF}, - {0x034A, 0x0A}, - {0x034B, 0x4B}, - {0x0385, 0x01}, - {0x0387, 0x01}, - {0x0900, 0x00}, - {0x0901, 0x11}, - {0x300D, 0x00}, - {0x302E, 0x00}, - {0x0401, 0x00}, - {0x0404, 0x00}, - {0x0405, 0x10}, - {0x040C, 0x0F}, - {0x040D, 0xC0}, - {0x040E, 0x08}, - {0x040F, 0xD0}, - {0x034C, 0x0F}, - {0x034D, 0xC0}, - {0x034E, 0x08}, - {0x034F, 0xD0}, - {0x0114, 0x03}, - {0x0408, 0x00}, - {0x0409, 0x00}, - {0x040A, 0x00}, - {0x040B, 0x00}, - {0x0902, 0x00}, - {0x3030, 0x00}, - {0x3031, 0x01}, - {0x3032, 0x00}, - {0x3047, 0x01}, - {0x3049, 0x01}, - {0x30E6, 0x02}, - {0x30E7, 0x59}, - {0x4E25, 0x80}, - {0x663A, 0x02}, - {0x9311, 0x00}, - {0xA0CD, 0x19}, - {0xA0CE, 0x19}, - {0xA0CF, 0x19}, - {0x0202, 0x09}, - {0x0203, 0x0C}, - {0x0204, 0x00}, - {0x0205, 0x00}, - {0x020E, 0x01}, - {0x020F, 0x00}, - {0x0210, 0x01}, - {0x0211, 0x00}, - {0x0212, 0x01}, - {0x0213, 0x00}, - {0x0214, 0x01}, - {0x0215, 0x00}, - {REG_NULL, 0x00}, -}; - static const struct regval imx386_linear_10_4032x3016_30fps_regs[] = { {0x0136, 0x18},//global setting {0x0137, 0x00}, @@ -1184,21 +920,21 @@ static const struct regval imx386_linear_10_4032x3016_30fps_regs[] = { {0xBCB2, 0x01}, {0x0112, 0x0A},//4k3k@30fps {0x0113, 0x0A}, - {0x0301, 0x06}, + {0x0301, 0x04}, {0x0303, 0x02}, - {0x0305, 0x0C}, - {0x0306, 0x02}, - {0x0307, 0x58}, //vtpxck pll mpy 0x01e0 -> 24fps + {0x0305, 0x02}, + {0x0306, 0x00}, + {0x0307, 0x64}, {0x0309, 0x0A}, {0x030B, 0x01}, {0x030D, 0x0C}, - {0x030E, 0x02}, - {0x030F, 0x58}, //oppxck pll mpy - {0x0310, 0x00}, //pll mode + {0x030E, 0x03}, + {0x030F, 0x20}, + {0x0310, 0x01}, {0x0342, 0x10}, //hts {0x0343, 0xC8}, - {0x0340, 0x0C}, //vts - {0x0341, 0x1E}, + {0x0340, 0x12}, //vts + {0x0341, 0x2b}, {0x0344, 0x00}, {0x0345, 0x00}, {0x0346, 0x00}, @@ -1264,7 +1000,7 @@ static const struct imx386_mode supported_modes[] = { .reg_list = imx386_linear_10_4032x2256_regs, .hdr_mode = NO_HDR, .vc[PAD0] = 0, - .link_freq_idx = 2, + .link_freq_idx = 1, .bpp = 10, }, { @@ -1276,12 +1012,12 @@ static const struct imx386_mode supported_modes[] = { }, .exp_def = 0x0600, .hts_def = 0x10c8, - .vts_def = 0x0916, + .vts_def = 0x122b, .bus_fmt = MEDIA_BUS_FMT_SRGGB10_1X10, - .reg_list = imx386_linear_10_4032x2256_30fps_regs, + .reg_list = imx386_linear_10_4032x2256_regs, .hdr_mode = NO_HDR, .vc[PAD0] = 0, - .link_freq_idx = 0, + .link_freq_idx = 1, .bpp = 10, }, { @@ -1310,7 +1046,7 @@ static const struct imx386_mode supported_modes[] = { }, .exp_def = 0x0600, .hts_def = 0x10c8, - .vts_def = 0x0C1E, + .vts_def = 0x122b, .bus_fmt = MEDIA_BUS_FMT_SRGGB10_1X10, .reg_list = imx386_linear_10_4032x3016_30fps_regs, .hdr_mode = NO_HDR, @@ -1322,7 +1058,6 @@ static const struct imx386_mode supported_modes[] = { static const s64 link_freq_menu_items[] = { IMX386_LINK_FREQ_400, - IMX386_LINK_FREQ_600, IMX386_LINK_FREQ_800, };