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https://github.com/hardkernel/linux.git
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Merge commit '28b543390dbd2ddd56f189d59525a383bed2e77d'
* commit '28b543390dbd2ddd56f189d59525a383bed2e77d': arm64: configs: rockchip_linux: Update by savedefconfig dmaengine: pl330: Fix pos calculation on interleaved dma ASoC: rockchip: i2s: Use device_property_* API media: rockchip: vicap add support format of RGB888 with different order ARM: dts: rockchip: rv1106-evb-cam: add imx415 media: i2c: lt8619c: set default timings when driver probe media: rockchip: isp: fix image effect for rv1106 4k Change-Id: Ia9b69005c2b21668ad1a6f4cda4cf297fde75592
This commit is contained in:
@@ -50,6 +50,11 @@
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remote-endpoint = <&sc3338_out>;
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data-lanes = <1 2>;
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};
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csi_dphy_input6: endpoint@6 {
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reg = <6>;
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remote-endpoint = <&imx415_out>;
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data-lanes = <1 2 3 4>;
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};
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};
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port@1 {
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@@ -202,6 +207,28 @@
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};
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};
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};
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imx415: imx415@1a {
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compatible = "sony,imx415";
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status = "okay";
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reg = <0x1a>;
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clocks = <&cru MCLK_REF_MIPI0>;
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clock-names = "xvclk";
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reset-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
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pwdn-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&mipi_refclk_out0>;
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rockchip,camera-module-index = <0>;
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rockchip,camera-module-facing = "back";
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rockchip,camera-module-name = "CMK-OT2022-PX1";
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rockchip,camera-module-lens-name = "IR0147-36IRC-8M-F20";
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port {
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imx415_out: endpoint {
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remote-endpoint = <&csi_dphy_input6>;
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data-lanes = <1 2 3 4>;
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};
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};
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};
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};
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&mipi0_csi2 {
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@@ -2921,7 +2921,7 @@ static struct dma_async_tx_descriptor *pl330_prep_interleaved_dma(
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struct dma_pl330_desc *desc = NULL;
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struct dma_pl330_chan *pch = to_pchan(chan);
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dma_addr_t dst = 0, src = 0;
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size_t size, src_icg, dst_icg, period_bytes, buffer_bytes;
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size_t size, src_icg, dst_icg, period_bytes, buffer_bytes, full_buffer_bytes;
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size_t nump = 0, numf = 0;
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if (!xt->numf || !xt->sgl[0].size || xt->frame_size != 1)
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@@ -2957,17 +2957,19 @@ static struct dma_async_tx_descriptor *pl330_prep_interleaved_dma(
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desc->rqcfg.dst_inc = 0;
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src = xt->src_start;
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dst = pch->fifo_dma;
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full_buffer_bytes = (size + src_icg) * numf;
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} else {
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desc->rqcfg.src_inc = 0;
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desc->rqcfg.dst_inc = 1;
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src = pch->fifo_dma;
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dst = xt->dst_start;
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full_buffer_bytes = (size + dst_icg) * numf;
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}
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desc->rqtype = xt->dir;
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desc->rqcfg.brst_size = pch->burst_sz;
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desc->rqcfg.brst_len = pch->burst_len;
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desc->bytes_requested = buffer_bytes;
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desc->bytes_requested = full_buffer_bytes;
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desc->sgl.size = size;
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desc->sgl.src_icg = src_icg;
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desc->sgl.dst_icg = dst_icg;
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@@ -1727,6 +1727,8 @@ static int lt8619c_probe(struct i2c_client *client,
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const struct i2c_device_id *id)
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{
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struct device *dev = &client->dev;
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struct v4l2_dv_timings default_timing =
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V4L2_DV_BT_CEA_640X480P59_94;
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struct lt8619c *lt8619c;
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struct v4l2_subdev *sd;
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char facing[2];
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@@ -1743,6 +1745,7 @@ static int lt8619c_probe(struct i2c_client *client,
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sd = <8619c->sd;
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lt8619c->i2c_client = client;
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lt8619c->timings = default_timing;
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lt8619c->cur_mode = &supported_modes[0];
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lt8619c->mbus_fmt_code = MEDIA_BUS_FMT_UYVY8_2X8;
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@@ -514,6 +514,10 @@ static const struct cif_input_fmt in_fmts[] = {
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.mbus_code = MEDIA_BUS_FMT_BGR888_1X24,
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.csi_fmt_val = CSI_WRDDR_TYPE_RGB888,
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.field = V4L2_FIELD_NONE,
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}, {
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.mbus_code = MEDIA_BUS_FMT_GBR888_1X24,
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.csi_fmt_val = CSI_WRDDR_TYPE_RGB888,
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.field = V4L2_FIELD_NONE,
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}, {
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.mbus_code = MEDIA_BUS_FMT_RGB565_1X16,
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.csi_fmt_val = CSI_WRDDR_TYPE_RGB565,
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@@ -611,6 +615,7 @@ static int rkcif_output_fmt_check(struct rkcif_stream *stream,
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break;
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case MEDIA_BUS_FMT_RGB888_1X24:
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case MEDIA_BUS_FMT_BGR888_1X24:
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case MEDIA_BUS_FMT_GBR888_1X24:
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if (output_fmt->fourcc == V4L2_PIX_FMT_RGB24 ||
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output_fmt->fourcc == V4L2_PIX_FMT_BGR24)
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ret = 0;
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@@ -801,6 +806,7 @@ static unsigned char get_data_type(u32 pixelformat, u8 cmd_mode_en, u8 dsi_input
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return 0x1e;
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case MEDIA_BUS_FMT_RGB888_1X24:
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case MEDIA_BUS_FMT_BGR888_1X24:
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case MEDIA_BUS_FMT_GBR888_1X24:
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if (dsi_input) {
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if (cmd_mode_en) /* dsi command mode*/
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return 0x39;
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@@ -4681,7 +4687,9 @@ static int rkcif_create_dummy_buf(struct rkcif_stream *stream)
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pad, enum_frame_interval,
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NULL, &fie);
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if (!ret) {
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if (fie.code == MEDIA_BUS_FMT_RGB888_1X24)
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if (fie.code == MEDIA_BUS_FMT_RGB888_1X24 ||
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fie.code == MEDIA_BUS_FMT_BGR888_1X24 ||
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fie.code == MEDIA_BUS_FMT_GBR888_1X24)
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size = fie.width * fie.height * 3;
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else
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size = fie.width * fie.height * 2;
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@@ -4704,7 +4712,9 @@ static int rkcif_create_dummy_buf(struct rkcif_stream *stream)
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ret = v4l2_subdev_call(dev->terminal_sensor.sd,
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pad, get_fmt, NULL, &fmt);
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if (!ret) {
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if (fmt.format.code == MEDIA_BUS_FMT_RGB888_1X24)
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if (fmt.format.code == MEDIA_BUS_FMT_RGB888_1X24 ||
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fmt.format.code == MEDIA_BUS_FMT_BGR888_1X24 ||
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fmt.format.code == MEDIA_BUS_FMT_GBR888_1X24)
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size = fmt.format.width * fmt.format.height * 3;
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else
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size = fmt.format.width * fmt.format.height * 2;
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@@ -740,6 +740,16 @@ run_next:
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writel(val, hw->base_addr + ISP3X_DRC_EXPLRATIO);
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if (hw->unite == ISP_UNITE_TWO)
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writel(val, hw->base_next_addr + ISP3X_DRC_EXPLRATIO);
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val = rkisp_read_reg_cache(dev, ISP3X_YNR_GLOBAL_CTRL);
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writel(val, hw->base_addr + ISP3X_YNR_GLOBAL_CTRL);
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if (hw->unite == ISP_UNITE_TWO)
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writel(val, hw->base_next_addr + ISP3X_YNR_GLOBAL_CTRL);
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if (dev->isp_ver == ISP_V21 || dev->isp_ver == ISP_V30) {
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val = rkisp_read_reg_cache(dev, ISP3X_CNR_CTRL);
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writel(val, hw->base_addr + ISP3X_CNR_CTRL);
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if (hw->unite == ISP_UNITE_TWO)
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writel(val, hw->base_next_addr + ISP3X_CNR_CTRL);
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}
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} else {
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/* the frame first running to off mi to save bandwidth */
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rkisp_multi_overflow_hdl(dev, false);
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@@ -1003,7 +1003,7 @@ static int rockchip_i2s_init_dai(struct rk_i2s_dev *i2s, struct resource *res,
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i2s->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->playback_dma_data.maxburst = 8;
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if (!of_property_read_u32(node, "rockchip,playback-channels", &val)) {
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if (!device_property_read_u32(i2s->dev, "rockchip,playback-channels", &val)) {
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if (val >= 2 && val <= 8)
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dai->playback.channels_max = val;
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}
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@@ -1025,14 +1025,14 @@ static int rockchip_i2s_init_dai(struct rk_i2s_dev *i2s, struct resource *res,
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i2s->capture_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
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i2s->capture_dma_data.maxburst = 8;
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if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) {
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if (!device_property_read_u32(i2s->dev, "rockchip,capture-channels", &val)) {
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if (val >= 2 && val <= 8)
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dai->capture.channels_max = val;
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}
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}
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i2s->clk_trcm = I2S_CKR_TRCM_TXRX;
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if (!of_property_read_u32(node, "rockchip,clk-trcm", &val)) {
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if (!device_property_read_u32(i2s->dev, "rockchip,clk-trcm", &val)) {
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if (val >= 0 && val <= 2) {
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i2s->clk_trcm = val << I2S_CKR_TRCM_SHIFT;
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if (i2s->clk_trcm)
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@@ -1147,7 +1147,7 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
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dev_set_drvdata(&pdev->dev, i2s);
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i2s->mclk_calibrate =
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of_property_read_bool(node, "rockchip,mclk-calibrate");
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device_property_read_bool(&pdev->dev, "rockchip,mclk-calibrate");
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if (i2s->mclk_calibrate) {
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i2s->mclk_root = devm_clk_get(&pdev->dev, "i2s_clk_root");
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if (IS_ERR(i2s->mclk_root))
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@@ -1216,7 +1216,7 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
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goto err_suspend;
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}
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if (of_property_read_bool(node, "rockchip,no-dmaengine")) {
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if (device_property_read_bool(&pdev->dev, "rockchip,no-dmaengine")) {
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dev_info(&pdev->dev, "Used for Multi-DAI\n");
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return 0;
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}
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