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Merge branch 'develop-3.10' of ssh://10.10.10.29/rk/kernel into my

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Conflicts:
	arch/arm/boot/dts/rk312x-sdk.dtsi
This commit is contained in:
li bing
2014-08-20 08:58:40 +08:00
parent 5d5560503f e0b8a2e584
commit ea128f7084
8 changed files with 55 additions and 22 deletions
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15
arch/arm/boot/dts/rk3036-sdk.dts
View File

@@ -153,15 +153,14 @@
};
&emmc {
clock-frequency = <100000000>;
clock-freq-min-max = <400000 100000000>;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
supports-highspeed;
supports-emmc;
bootpart-no-access;
supports-DDR_MODE;
//caps2-mmc-hs200;
ignore-pm-notify;
keep-power-in-suspend;
@@ -171,8 +170,8 @@
};
&sdmmc {
clock-frequency = <50000000>;
clock-freq-min-max = <400000 50000000>;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
supports-highspeed;
supports-sd;
broken-cd;
@@ -186,13 +185,13 @@
};
&sdio {
clock-frequency = <50000000>;
clock-freq-min-max = <200000 50000000>;
clock-frequency = <37500000>;
clock-freq-min-max = <200000 37500000>;
supports-highspeed;
supports-sdio;
ignore-pm-notify;
keep-power-in-suspend;
//cap-sdio-irq;
cap-sdio-irq;
status = "okay";
};

15
arch/arm/boot/dts/rk312x-sdk.dtsi
View File

@@ -73,13 +73,12 @@
};
&emmc {
clock-frequency = <50000000>;
clock-freq-min-max = <400000 50000000>;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
supports-highspeed;
supports-emmc;
bootpart-no-access;
supports-DDR_MODE;
//caps2-mmc-hs200;
ignore-pm-notify;
keep-power-in-suspend;
//poll-hw-reset
@@ -87,8 +86,8 @@
};
&sdmmc {
clock-frequency = <50000000>;
clock-freq-min-max = <400000 50000000>;
clock-frequency = <37500000>;
clock-freq-min-max = <400000 37500000>;
supports-highspeed;
supports-sd;
broken-cd;
@@ -100,13 +99,13 @@
};
&sdio {
clock-frequency = <50000000>;
clock-freq-min-max = <200000 50000000>;
clock-frequency = <37500000>;
clock-freq-min-max = <200000 37500000>;
supports-highspeed;
supports-sdio;
ignore-pm-notify;
keep-power-in-suspend;
//cap-sdio-irq;
cap-sdio-irq;
status = "okay";
};

7
arch/arm/mach-rockchip/rk312x.c
View File

@@ -338,8 +338,11 @@ static void rk312x_restart(char mode, const char *cmd)
rockchip_restart_get_boot_mode(cmd, &boot_flag, &boot_mode);
writel_relaxed(boot_flag, RK_GRF_VIRT + RK312X_GRF_OS_REG4);
writel_relaxed(boot_mode, RK_GRF_VIRT + RK312X_GRF_OS_REG5);
/* for loader */
writel_relaxed(boot_flag, RK_PMU_VIRT + RK312x_PMU_SYS_REG0);
/* for linux */
writel_relaxed(boot_mode, RK_PMU_VIRT + RK312x_PMU_SYS_REG1);
dsb();
/* pll enter slow mode */

12
drivers/video/rockchip/lcdc/rk3036_lcdc.c
View File

@@ -236,7 +236,8 @@ static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
v_WIN0_FORMAT(win->fmt_cfg) |
v_WIN0_RB_SWAP(win->swap_rb);
lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_INTERLACE_EN,
v_WIN0_INTERLACE_EN(win->interlace_read));
lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
v_X_SCL_FACTOR(win->scale_yrgb_x) |
v_Y_SCL_FACTOR(win->scale_yrgb_y));
@@ -267,7 +268,8 @@ static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
v_WIN1_FORMAT(win->fmt_cfg) |
v_WIN1_RB_SWAP(win->swap_rb);
lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN1_INTERLACE_EN,
v_WIN1_INTERLACE_EN(win->interlace_read));
lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
v_X_SCL_FACTOR(win->scale_yrgb_x) |
v_Y_SCL_FACTOR(win->scale_yrgb_y));
@@ -747,6 +749,12 @@ static int rk3036_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
}
win->scale_yrgb_x = calscale(win->area[0].xact, win->post_cfg.xsize);
win->scale_yrgb_y = calscale(win->area[0].yact, win->post_cfg.ysize);
win->interlace_read = 0;
if((screen->mode.xres == 720) &&
((screen->mode.yres == 576) || (screen->mode.yres == 480))) {
if(win->scale_yrgb_y > 2*0x1000)
win->interlace_read = 1;
}
switch (win->format) {
case ARGB888:
win->fmt_cfg = VOP_FORMAT_ARGB888;

2
drivers/video/rockchip/lcdc/rk3036_lcdc.h Normal file → Executable file
View File

@@ -61,6 +61,7 @@
#define m_DITHER_UP_EN (1<<9)
#define m_INTERLACE_DSP_EN (1<<12)
#define m_INTERLACE_DSP_POL (1<<13)
#define m_WIN0_INTERLACE_EN (1<<14)
#define m_WIN1_INTERLACE_EN (1<<15)
#define m_WIN0_YRGB_DEFLICK_EN (1<<16)
#define m_WIN0_CBR_DEFLICK_EN (1<<17)
@@ -83,6 +84,7 @@
#define v_DITHER_UP_EN(x) (((x)&1)<<9)
#define v_INTERLACE_DSP_EN(x) (((x)&1)<<12)
#define v_INTERLACE_DSP_POL(x) (((x)&1)<<13)
#define v_WIN0_INTERLACE_EN(x) (((x)&1)<<14)
#define v_WIN1_INTERLACE_EN(x) (((x)&1)<<15)
#define v_WIN0_YRGB_DEFLICK_EN(x) (((x)&1)<<16)
#define v_WIN0_CBR_DEFLICK_EN(x) (((x)&1)<<17)

22
drivers/video/rockchip/lcdc/rk312x_lcdc.c
View File

@@ -291,7 +291,8 @@ static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
v_WIN0_FORMAT(win->fmt_cfg) |
v_WIN0_RB_SWAP(win->swap_rb);
lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN0_INTERLACE_EN,
v_WIN0_INTERLACE_EN(win->interlace_read));
lcdc_writel(lcdc_dev, WIN0_SCL_FACTOR_YRGB,
v_X_SCL_FACTOR(win->scale_yrgb_x) |
v_Y_SCL_FACTOR(win->scale_yrgb_y));
@@ -323,7 +324,8 @@ static void lcdc_layer_update_regs(struct lcdc_device *lcdc_dev,
v_WIN1_FORMAT(win->fmt_cfg) |
v_WIN1_RB_SWAP(win->swap_rb);
lcdc_msk_reg(lcdc_dev, SYS_CTRL, mask, val);
lcdc_msk_reg(lcdc_dev, DSP_CTRL0, m_WIN1_INTERLACE_EN,
v_WIN1_INTERLACE_EN(win->interlace_read));
/* rk312x unsupport win1 scale */
if (lcdc_dev->soc_type == VOP_RK3036) {
lcdc_writel(lcdc_dev, WIN1_SCL_FACTOR_YRGB,
@@ -1143,6 +1145,22 @@ static int rk312x_lcdc_set_par(struct rk_lcdc_driver *dev_drv, int win_id)
}
win->scale_yrgb_x = CalScale(win->area[0].xact, win->area[0].xsize);
win->scale_yrgb_y = CalScale(win->area[0].yact, win->area[0].ysize);
win->interlace_read = 0;
if((screen->mode.xres == 720) &&
((screen->mode.yres == 576) || (screen->mode.yres == 480))) {
if (lcdc_dev->soc_type == VOP_RK3036) {
if (win->scale_yrgb_y > 2*0x1000)
win->interlace_read = 1;
} else if (lcdc_dev->soc_type == VOP_RK312X) {
if (win_id == 0) {
if (win->scale_yrgb_y > 2*0x1000)
win->interlace_read = 1;
} else if (win_id == 0) {
win->interlace_read = 1;
}
}
}
switch (win->format) {
case ARGB888:
win->fmt_cfg = VOP_FORMAT_ARGB888;

1
include/linux/rk_fb.h
View File

@@ -382,6 +382,7 @@ struct rk_lcdc_win {
u32 g_alpha_val;
u32 color_key_val;
u8 csc_mode;
u8 interlace_read;
struct rk_lcdc_win_area area[RK_WIN_MAX_AREA];
struct rk_lcdc_post_cfg post_cfg;

3
include/linux/rockchip/pmu.h
View File

@@ -1,6 +1,9 @@
#ifndef __MACH_ROCKCHIP_PMU_H
#define __MACH_ROCKCHIP_PMU_H
#define RK312x_PMU_SYS_REG0 0x38
#define RK312x_PMU_SYS_REG1 0x3c
#define RK3188_PMU_WAKEUP_CFG0 0x00
#define RK3188_PMU_WAKEUP_CFG1 0x04
#define RK3188_PMU_PWRDN_CON 0x08