diff --git a/drivers/gpu/drm/rockchip/ebc-dev/ebc_dev_y8_v8.S b/drivers/gpu/drm/rockchip/ebc-dev/ebc_dev_y8_v8.S
index bba8b9ddde7a..1f72b0b9fdf5 100644
--- a/drivers/gpu/drm/rockchip/ebc-dev/ebc_dev_y8_v8.S
+++ b/drivers/gpu/drm/rockchip/ebc-dev/ebc_dev_y8_v8.S
@@ -3026,138 +3026,134 @@ ebc_thread:
 	add	x29, sp, #144
 	stp	x28, x27, [sp, #160]
 	mov	x28, #1030792151040
-	ldr	x19, [x8, :lo12:global_ebc]
+	ldr	x20, [x8, :lo12:global_ebc]
 	stp	x26, x25, [sp, #176]
 	stp	x24, x23, [sp, #192]
 	mov	w25, #-268435456
 	stp	x22, x21, [sp, #208]
 	mov	x24, #263882790666240
-	add	x8, x19, #224
-	add	x9, x19, #40
+	add	x8, x20, #224
+	add	x9, x20, #40
 	mov	x22, #67553994410557440
 	str	x8, [sp, #48]
-	add	x8, x19, #800
+	add	x8, x20, #800
 	stur	x8, [x29, #-56]
-	add	x8, x19, #320
+	add	x8, x20, #320
 	str	x8, [sp, #40]
-	add	x8, x19, #276
+	add	x8, x20, #276
 	stur	x8, [x29, #-48]
-	add	x8, x19, #672
+	add	x8, x20, #672
 	stp	x8, x9, [sp, #16]
-	add	x8, x19, #712
+	add	x8, x20, #712
 	str	x8, [sp, #72]
 	b	.LBB16_3
 .LBB16_1:
-	ldr	x0, [x19, #432]
-	bl	ebc_buf_release
+	str	w3, [x20, #668]
 .LBB16_2:
-	ldr	x8, [x19, #440]
-	str	x8, [x19, #432]
+	ldr	x8, [x20, #440]
+	str	x8, [x20, #432]
 .LBB16_3:
 	bl	ebc_osd_buf_get
 	cbz	x0, .LBB16_8
-	mov	x20, x0
-	ldr	w8, [x19, #752]
+	mov	x19, x0
+	ldr	w8, [x20, #752]
 	cbnz	w8, .LBB16_6
-	ldr	w8, [x19, #756]
+	ldr	w8, [x20, #756]
 	cbz	w8, .LBB16_24
 .LBB16_6:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_62
+	b.ge	.LBB16_61
 .LBB16_7:
-	mov	x0, x20
+	mov	x0, x19
 	bl	ebc_buf_release
 	b	.LBB16_3
 .LBB16_8:
-	ldr	w8, [x19, #768]
-	str	wzr, [x19, #316]
+	ldr	w8, [x20, #768]
+	str	wzr, [x20, #316]
 	cbz	w8, .LBB16_11
-	ldr	w8, [x19, #764]
+	ldr	w8, [x20, #764]
 	cbnz	w8, .LBB16_11
-	ldr	w8, [x19, #772]
+	ldr	w8, [x20, #772]
 	cbz	w8, .LBB16_19
 .LBB16_11:
 	bl	ebc_dsp_buf_get
 	cbz	x0, .LBB16_19
 	ldr	w2, [x0, #40]
-	mov	x20, x0
+	mov	x19, x0
 	mov	w3, #1
 	cmp	w2, #21
 	b.ne	.LBB16_21
 .LBB16_13:
-	ldr	w8, [x19, #668]
+	ldr	w8, [x20, #668]
 	cbnz	w8, .LBB16_15
-	str	x20, [x19, #432]
-	ldr	w2, [x20, #40]
+	str	x19, [x20, #432]
+	ldr	w2, [x19, #40]
 .LBB16_15:
 	cmp	w2, #23
-	b.hi	.LBB16_390
+	b.hi	.LBB16_391
 	lsl	w8, w3, w2
 	tst	w8, #0x1ff80
-	b.ne	.LBB16_28
+	b.ne	.LBB16_27
 	mov	w9, #124
 	movk	w9, #34, lsl #16
 	tst	w8, w9
-	b.eq	.LBB16_162
+	b.eq	.LBB16_80
 	mov	w8, #2
-	b	.LBB16_29
+	b	.LBB16_28
 .LBB16_19:
-	ldr	w8, [x19, #312]
-	cbz	w8, .LBB16_35
+	ldr	w8, [x20, #312]
+	cbz	w8, .LBB16_34
 .LBB16_20:
-	str	wzr, [x19, #312]
+	str	wzr, [x20, #312]
 	b	.LBB16_3
 .LBB16_21:
-	ldr	w9, [x19, #760]
-	ldr	w8, [x19, #464]
-	cbz	w9, .LBB16_60
+	ldr	w9, [x20, #760]
+	ldr	w8, [x20, #464]
+	cbz	w9, .LBB16_59
 	cmp	w8, #1
-	b.eq	.LBB16_151
+	b.eq	.LBB16_69
 	cmp	w8, #2
-	b.eq	.LBB16_154
-	b	.LBB16_155
+	b.eq	.LBB16_72
+	b	.LBB16_73
 .LBB16_24:
-	ldr	w8, [x19, #464]
+	ldr	w8, [x20, #464]
 	cmp	w8, #1
-	b.eq	.LBB16_63
-	mov	w26, #1
+	b.eq	.LBB16_62
 	cmp	w8, #2
-	b.ne	.LBB16_66
+	b.ne	.LBB16_293
 .LBB16_26:
-	ldr	x8, [x19, #432]
-	ldr	x0, [x19, #368]
-	ldrsw	x2, [x19, #252]
+	ldr	x8, [x20, #432]
+	ldr	x0, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	ldr	x8, [x19, #440]
-	ldr	x0, [x19, #360]
-	ldrsw	x2, [x19, #252]
+	ldr	x8, [x20, #440]
+	ldr	x0, [x20, #360]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
+	b	.LBB16_293
 .LBB16_27:
-	mov	w26, #1
-	b	.LBB16_66
-.LBB16_28:
 	mov	w8, #1
-.LBB16_29:
+.LBB16_28:
 	stur	w8, [x29, #-64]
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_45
+	cbz	w8, .LBB16_44
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_355
-.LBB16_31:
+	b.ge	.LBB16_270
+.LBB16_30:
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_32:
+.LBB16_31:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
@@ -3165,606 +3161,229 @@ ebc_thread:
 	bl	prepare_to_wait_event
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_43
-	cbnz	x0, .LBB16_44
+	cbz	w8, .LBB16_42
+	cbnz	x0, .LBB16_43
 	bl	schedule
-	b	.LBB16_32
+	b	.LBB16_31
+.LBB16_34:
+	sub	x0, x29, #40
+	mov	w1, wzr
+	stp	xzr, xzr, [x29, #-16]
+	stp	xzr, xzr, [x29, #-32]
+	stur	xzr, [x29, #-40]
+	bl	init_wait_entry
+	adrp	x0, ebc_thread_wq
+	sub	x1, x29, #40
+	add	x0, x0, :lo12:ebc_thread_wq
+	mov	w2, #1
+	bl	prepare_to_wait_event
+	ldr	w8, [x20, #312]
+	cbz	w8, .LBB16_65
 .LBB16_35:
-	sub	x0, x29, #40
-	mov	w1, wzr
-	stp	xzr, xzr, [x29, #-16]
-	stp	xzr, xzr, [x29, #-32]
-	stur	xzr, [x29, #-40]
-	bl	init_wait_entry
-	adrp	x0, ebc_thread_wq
-	sub	x1, x29, #40
-	add	x0, x0, :lo12:ebc_thread_wq
-	mov	w2, #1
-	bl	prepare_to_wait_event
-	ldr	w8, [x19, #312]
-	cbz	w8, .LBB16_147
-.LBB16_36:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-	ldr	w8, [x19, #312]
+	ldr	w8, [x20, #312]
 	cbnz	w8, .LBB16_3
-.LBB16_37:
-	ldur	x20, [x29, #-48]
-	ldr	w8, [x20]
+.LBB16_36:
+	ldur	x19, [x29, #-48]
+	ldr	w8, [x19]
 	cmp	w8, #1
-	b.ne	.LBB16_180
+	b.ne	.LBB16_98
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_39:
+.LBB16_38:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w8, [x20]
-	cbz	w8, .LBB16_188
-	ldr	w8, [x19, #312]
-	cbnz	w8, .LBB16_188
-	cbnz	x0, .LBB16_189
+	ldr	w8, [x19]
+	cbz	w8, .LBB16_106
+	ldr	w8, [x20, #312]
+	cbnz	w8, .LBB16_106
+	cbnz	x0, .LBB16_107
 	bl	schedule
-	b	.LBB16_39
-.LBB16_43:
+	b	.LBB16_38
+.LBB16_42:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-.LBB16_44:
+.LBB16_43:
 	ldur	x8, [x29, #-56]
 	mov	w3, #1
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_356
-.LBB16_45:
-	ldr	w8, [x19, #464]
+	b.ge	.LBB16_271
+.LBB16_44:
+	ldr	w8, [x20, #464]
 	sub	w8, w8, #3
 	cmp	w8, #1
-	b.hi	.LBB16_47
-	ldr	x8, [x19, #432]
-	str	wzr, [x19, #776]
-	str	wzr, [x19, #784]
-	ldr	x1, [x19, #368]
-	ldrsw	x2, [x19, #252]
+	b.hi	.LBB16_46
+	ldr	x8, [x20, #432]
+	str	wzr, [x20, #776]
+	str	wzr, [x20, #784]
+	ldr	x1, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x0, [x8, #16]
 	bl	memcpy
 	mov	w3, #1
-.LBB16_47:
-	ldr	w8, [x20, #40]
+.LBB16_46:
+	ldr	w8, [x19, #40]
 	cmp	w8, #11
-	b.hi	.LBB16_218
+	b.hi	.LBB16_136
 	lsl	w9, w3, w8
 	mov	w10, #2124
 	tst	w9, w10
-	b.eq	.LBB16_53
-	ldr	w9, [x19, #252]
+	b.eq	.LBB16_52
+	ldr	w9, [x20, #252]
 	add	w10, w9, #7
 	cmp	w9, #0
 	csel	w10, w10, w9, lt
 	cmp	w9, #8
-	b.lt	.LBB16_186
-	ldr	x9, [x19, #432]
+	b.lt	.LBB16_104
+	ldr	x9, [x20, #432]
 	asr	w10, w10, #3
-	ldr	x11, [x20, #16]
+	ldr	x11, [x19, #16]
 	ldr	x9, [x9, #16]
-.LBB16_51:
+.LBB16_50:
 	ldr	x12, [x11]
 	ldr	x13, [x9]
 	cmp	x12, x13
-	b.ne	.LBB16_218
+	b.ne	.LBB16_136
 	add	x9, x9, #8
 	add	x11, x11, #8
 	subs	w10, w10, #1
-	b.ne	.LBB16_51
-	b	.LBB16_186
-.LBB16_53:
+	b.ne	.LBB16_50
+	b	.LBB16_104
+.LBB16_52:
 	tst	w9, #0x180
-	b.eq	.LBB16_218
-	ldr	w9, [x19, #788]
-	ldr	w10, [x19, #252]
-	cbz	w9, .LBB16_182
+	b.eq	.LBB16_136
+	ldr	w9, [x20, #788]
+	ldr	w10, [x20, #252]
+	cbz	w9, .LBB16_100
 	add	w9, w10, #7
 	cmp	w10, #0
 	csel	w12, w9, w10, lt
 	cmp	w10, #8
-	b.lt	.LBB16_186
+	b.lt	.LBB16_104
 	mov	w11, #50
 	mov	w13, #34079
 	movk	w13, #20971, lsl #16
 	mov	w9, wzr
 	mul	w10, w10, w11
-	ldr	x11, [x19, #432]
+	ldr	x11, [x20, #432]
 	asr	w12, w12, #3
 	smull	x10, w10, w13
 	lsr	x13, x10, #63
 	asr	x14, x10, #40
 	ldr	x10, [x11, #16]
 	add	w11, w14, w13
-	ldr	x13, [x20, #16]
-.LBB16_57:
+	ldr	x13, [x19, #16]
+.LBB16_56:
 	ldr	x14, [x13]
 	ldr	x15, [x10]
 	cmp	x14, x15
 	cinc	w9, w9, ne
 	cmp	w9, w11
-	b.gt	.LBB16_216
+	b.gt	.LBB16_134
 	add	x10, x10, #8
 	add	x13, x13, #8
 	subs	w12, w12, #1
-	b.ne	.LBB16_57
-	cbnz	w9, .LBB16_218
-	b	.LBB16_186
-.LBB16_60:
+	b.ne	.LBB16_56
+	cbnz	w9, .LBB16_136
+	b	.LBB16_104
+.LBB16_59:
 	cmp	w8, #4
 	b.ne	.LBB16_13
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbnz	w8, .LBB16_155
+	cbnz	w8, .LBB16_73
 	b	.LBB16_13
-.LBB16_62:
+.LBB16_61:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.73
 	add	x1, x1, :lo12:.L.str.73
 	ldr	x0, [x8]
 	bl	_dev_info
 	b	.LBB16_7
-.LBB16_63:
-	ldr	w2, [x19, #296]
-	mov	w26, #1
-	cbz	w2, .LBB16_199
+.LBB16_62:
+	ldr	w2, [x20, #296]
+	cbz	w2, .LBB16_117
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_378
+	b.ge	.LBB16_379
+.LBB16_64:
+	str	wzr, [x20, #296]
+	b	.LBB16_293
 .LBB16_65:
-	str	wzr, [x19, #296]
-.LBB16_66:
-	mov	w8, #4
-	str	x20, [x19, #456]
-	ldr	w9, [x19, #308]
-	str	w8, [x19, #464]
-	ldp	w10, w8, [x20, #48]
-	ldp	w12, w14, [x20, #56]
-	add	w11, w10, #7
-	cmp	w10, #0
-	add	w13, w12, #7
-	csel	w11, w11, w10, lt
-	cmp	w12, #0
-	add	w10, w9, #7
-	csel	w12, w13, w12, lt
-	cmp	w9, #0
-	asr	w15, w12, #3
-	csel	w12, w10, w9, lt
-	ldr	w10, [x19, #304]
-	add	w9, w15, #1
-	asr	w13, w12, #3
-	sub	w16, w13, #1
-	cmp	w9, w13
-	csinc	w9, w16, w15, ge
-	sub	w15, w10, #1
-	cmp	w14, w10
-	csel	w10, w14, w15, lt
-	cmp	w8, w10
-	b.le	.LBB16_71
-.LBB16_67:
-	ldur	x8, [x29, #-48]
-	ldr	w8, [x8]
-	cbz	w8, .LBB16_145
-	adrp	x8, ebc_auto_task
-	ldr	x0, [x8, :lo12:ebc_auto_task]
-	bl	wake_up_process
-	ldr	x0, [x19, #448]
-	cbz	x0, .LBB16_70
-.LBB16_69:
-	bl	ebc_buf_release
-.LBB16_70:
-	ldr	x8, [x19, #456]
-	str	x8, [x19, #448]
-	b	.LBB16_3
-.LBB16_71:
-	ldr	x14, [x19, #440]
-	mul	w13, w13, w8
-	ldp	x16, x15, [x19, #384]
-	sxtw	x13, w13
-	asr	w11, w11, #3
-	ldr	x14, [x14, #16]
-	lsl	x0, x13, #3
-	ldr	x17, [x20, #16]
-	sbfx	x2, x12, #3, #29
-	ldr	x1, [x19, #360]
-	add	x13, x16, x0
-	add	x12, x15, x0
-	add	x14, x14, x0
-	add	x15, x17, x0
-	sxtw	x17, w11
-	add	x16, x1, x0
-	add	w0, w9, #1
-	sxtw	x0, w0
-	lsl	x1, x2, #3
-	b	.LBB16_73
-.LBB16_72:
-	add	w8, w8, #1
-	add	x12, x12, x1
-	add	x13, x13, x1
-	add	x14, x14, x1
-	add	x15, x15, x1
-	add	x16, x16, x1
-	cmp	w8, w10
-	b.gt	.LBB16_67
-.LBB16_73:
-	cmp	w11, w9
-	b.gt	.LBB16_72
-	mov	x2, x17
-	b	.LBB16_77
-.LBB16_75:
-	lsr	x20, x5, #56
-	orr	x21, x4, #0x100000000000000
-	cmp	x20, #240
-	orr	x7, x7, #0xff00000000000000
-	csel	x4, x21, x4, eq
-.LBB16_76:
-	bic	x6, x6, x7
-	and	x5, x7, x5
-	add	x2, x2, #1
-	orr	x5, x6, x5
-	cmp	x0, x2
-	str	x4, [x12, x3]
-	str	x5, [x16, x3]
-	b.eq	.LBB16_72
-.LBB16_77:
-	lsl	x3, x2, #3
-	ldr	x27, [x13, x3]
-	ldr	x6, [x16, x3]
-	ldr	x20, [x15, x3]
-	ldr	x5, [x14, x3]
-	ldr	x4, [x12, x3]
-	tst	x27, #0xff
-	b.eq	.LBB16_79
-	mov	x7, xzr
-	b	.LBB16_81
-.LBB16_79:
-	and	x4, x4, #0xffffffffffffff00
-	and	x21, x20, #0xf0
-	cmp	w21, #240
-	b.ne	.LBB16_104
-	and	x7, x5, #0xff
-	cmp	x7, #240
-	cset	w7, eq
-	orr	x4, x4, x7
-	mov	w7, #255
-.LBB16_81:
-	tst	x27, #0xff00
-	b.eq	.LBB16_88
-	tst	x27, #0xff0000
-	b.eq	.LBB16_90
-.LBB16_83:
-	tst	x27, #0xff000000
-	b.eq	.LBB16_92
-.LBB16_84:
-	tst	x27, #0xff00000000
-	b.eq	.LBB16_94
-.LBB16_85:
-	tst	x27, #0xff0000000000
-	b.eq	.LBB16_96
-.LBB16_86:
-	tst	x27, #0xff000000000000
-	b.eq	.LBB16_98
-.LBB16_87:
-	lsr	x21, x27, #56
-	cbnz	x21, .LBB16_76
-	b	.LBB16_100
-.LBB16_88:
-	and	x4, x4, #0xffffffffffff00ff
-	and	x21, x20, #0xf000
-	cmp	w21, #15, lsl #12
-	b.ne	.LBB16_106
-	and	x21, x5, #0xff00
-	orr	x23, x4, #0x100
-	cmp	x21, #15, lsl #12
-	orr	x7, x7, #0xff00
-	csel	x4, x23, x4, eq
-	tst	x27, #0xff0000
-	b.ne	.LBB16_83
-.LBB16_90:
-	and	x4, x4, #0xffffffffff00ffff
-	and	x21, x20, #0xf00000
-	cmp	x21, #3840, lsl #12
-	b.ne	.LBB16_110
-	and	x21, x5, #0xff0000
-	orr	x23, x4, #0x10000
-	cmp	x21, #3840, lsl #12
-	orr	x7, x7, #0xff0000
-	csel	x4, x23, x4, eq
-	tst	x27, #0xff000000
-	b.ne	.LBB16_84
-.LBB16_92:
-	and	x4, x4, #0xffffffff00ffffff
-	and	x21, x20, #0xf0000000
-	cmp	w21, w25
-	b.ne	.LBB16_114
-	and	x21, x5, #0xff000000
-	orr	x23, x4, #0x1000000
-	cmp	x21, x25
-	orr	x7, x7, #0xff000000
-	csel	x4, x23, x4, eq
-	tst	x27, #0xff00000000
-	b.ne	.LBB16_85
-.LBB16_94:
-	and	x4, x4, #0xffffff00ffffffff
-	and	x21, x20, #0xf000000000
-	cmp	x21, x28
-	b.ne	.LBB16_116
-	and	x21, x5, #0xff00000000
-	orr	x23, x4, #0x100000000
-	cmp	x21, x28
-	orr	x7, x7, #0xff00000000
-	csel	x4, x23, x4, eq
-	tst	x27, #0xff0000000000
-	b.ne	.LBB16_86
-.LBB16_96:
-	and	x4, x4, #0xffff00ffffffffff
-	and	x21, x20, #0xf00000000000
-	cmp	x21, x24
-	b.ne	.LBB16_118
-	and	x21, x5, #0xff0000000000
-	orr	x23, x4, #0x10000000000
-	cmp	x21, x24
-	orr	x7, x7, #0xff0000000000
-	csel	x4, x23, x4, eq
-	tst	x27, #0xff000000000000
-	b.ne	.LBB16_87
-.LBB16_98:
-	and	x4, x4, #0xff00ffffffffffff
-	and	x21, x20, #0xf0000000000000
-	cmp	x21, x22
-	b.ne	.LBB16_120
-	and	x21, x5, #0xff000000000000
-	orr	x23, x4, #0x1000000000000
-	cmp	x21, x22
-	orr	x7, x7, #0xff000000000000
-	csel	x4, x23, x4, eq
-	lsr	x21, x27, #56
-	cbnz	x21, .LBB16_76
-.LBB16_100:
-	and	x4, x4, #0xffffffffffffff
-	lsr	x21, x20, #60
-	cmp	x21, #15
-	b.hs	.LBB16_75
-	and	x20, x20, #0xf000000000000000
-	mov	x21, #-2305843009213693952
-	cmp	x20, x21
-	b.eq	.LBB16_136
-	and	x6, x6, #0xffffffffffffff
-	cbnz	x20, .LBB16_137
-	orr	x4, x4, #0x100000000000000
-	b	.LBB16_76
-.LBB16_104:
-	cbnz	w21, .LBB16_122
-	mov	x7, xzr
-	and	x6, x6, #0xffffffffffffff00
-	orr	x4, x4, #0x1
-	b	.LBB16_81
-.LBB16_106:
-	and	x6, x6, #0xffffffffffff00ff
-	cbz	w21, .LBB16_109
-	cmp	w21, #14, lsl #12
-	b.ne	.LBB16_138
-	orr	x6, x6, #0xf000
-.LBB16_109:
-	orr	x4, x4, #0x100
-	tst	x27, #0xff0000
-	b.ne	.LBB16_83
-	b	.LBB16_90
-.LBB16_110:
-	and	x6, x6, #0xffffffffff00ffff
-	cbz	x21, .LBB16_113
-	cmp	x21, #3584, lsl #12
-	b.ne	.LBB16_139
-	orr	x6, x6, #0xf00000
-.LBB16_113:
-	orr	x4, x4, #0x10000
-	tst	x27, #0xff000000
-	b.ne	.LBB16_84
-	b	.LBB16_92
-.LBB16_114:
-	cbnz	w21, .LBB16_124
-	and	x6, x6, #0xffffffff00ffffff
-	b	.LBB16_126
-.LBB16_116:
-	cbnz	x21, .LBB16_127
-	and	x6, x6, #0xffffff00ffffffff
-	b	.LBB16_129
-.LBB16_118:
-	cbnz	x21, .LBB16_130
-	and	x6, x6, #0xffff00ffffffffff
-	b	.LBB16_132
-.LBB16_120:
-	cbnz	x21, .LBB16_133
-	and	x6, x6, #0xff00ffffffffffff
-	b	.LBB16_135
-.LBB16_122:
-	cmp	w21, #224
-	b.ne	.LBB16_140
-	and	x6, x6, #0xffffffffffffff00
-	mov	x7, xzr
-	orr	x6, x6, #0xf0
-	orr	x4, x4, #0x1
-	b	.LBB16_81
-.LBB16_124:
-	and	x6, x6, #0xffffffff00ffffff
-	mov	w23, #-536870912
-	cmp	w21, w23
-	b.ne	.LBB16_141
-	orr	x6, x6, #0xf0000000
-.LBB16_126:
-	orr	x4, x4, #0x1000000
-	tst	x27, #0xff00000000
-	b.ne	.LBB16_85
-	b	.LBB16_94
-.LBB16_127:
-	and	x6, x6, #0xffffff00ffffffff
-	mov	x23, #962072674304
-	cmp	x21, x23
-	b.ne	.LBB16_142
-	orr	x6, x6, #0xf000000000
-.LBB16_129:
-	orr	x4, x4, #0x100000000
-	tst	x27, #0xff0000000000
-	b.ne	.LBB16_86
-	b	.LBB16_96
-.LBB16_130:
-	and	x6, x6, #0xffff00ffffffffff
-	mov	x23, #246290604621824
-	cmp	x21, x23
-	b.ne	.LBB16_143
-	orr	x6, x6, #0xf00000000000
-.LBB16_132:
-	orr	x4, x4, #0x10000000000
-	tst	x27, #0xff000000000000
-	b.ne	.LBB16_87
-	b	.LBB16_98
-.LBB16_133:
-	and	x6, x6, #0xff00ffffffffffff
-	mov	x23, #63050394783186944
-	cmp	x21, x23
-	b.ne	.LBB16_144
-	orr	x6, x6, #0xf0000000000000
-.LBB16_135:
-	orr	x4, x4, #0x1000000000000
-	lsr	x21, x27, #56
-	cbnz	x21, .LBB16_76
-	b	.LBB16_100
-.LBB16_136:
-	mov	x20, #-1152921504606846976
-	orr	x4, x4, #0x100000000000000
-	bfxil	x20, x6, #0, #56
-	mov	x6, x20
-	b	.LBB16_76
-.LBB16_137:
-	orr	x6, x6, x20
-	b	.LBB16_76
-.LBB16_138:
-	orr	x6, x6, x21
-	tst	x27, #0xff0000
-	b.ne	.LBB16_83
-	b	.LBB16_90
-.LBB16_139:
-	orr	x6, x6, x21
-	tst	x27, #0xff000000
-	b.ne	.LBB16_84
-	b	.LBB16_92
-.LBB16_140:
-	and	x6, x6, #0xffffffffffffff00
-	mov	x7, xzr
-	orr	x6, x21, x6
-	b	.LBB16_81
-.LBB16_141:
-	orr	x6, x6, x21
-	tst	x27, #0xff00000000
-	b.ne	.LBB16_85
-	b	.LBB16_94
-.LBB16_142:
-	orr	x6, x6, x21
-	tst	x27, #0xff0000000000
-	b.ne	.LBB16_86
-	b	.LBB16_96
-.LBB16_143:
-	orr	x6, x6, x21
-	tst	x27, #0xff000000000000
-	b.ne	.LBB16_87
-	b	.LBB16_98
-.LBB16_144:
-	orr	x6, x6, x21
-	lsr	x21, x27, #56
-	cbnz	x21, .LBB16_76
-	b	.LBB16_100
-.LBB16_145:
-	mov	x0, x19
-	mov	w1, #1
-	mov	w2, wzr
-	str	w26, [x19, #276]
-	bl	ebc_lut_update
-	ldr	w9, [x19, #800]
-	ldr	w8, [x19, #328]
-	cmp	w9, #1
-	strh	w8, [x19, #280]
-	b.ge	.LBB16_373
-.LBB16_146:
-	mov	x0, x19
-	bl	ebc_frame_start
-	ldr	x0, [x19, #448]
-	cbnz	x0, .LBB16_69
-	b	.LBB16_70
-.LBB16_147:
 	mov	w8, #13
-.LBB16_148:
-	cbnz	x0, .LBB16_37
+.LBB16_66:
+	cbnz	x0, .LBB16_36
 	mov	x0, x8
 	bl	schedule_timeout
-	mov	x20, x0
+	mov	x19, x0
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w9, [x19, #312]
-	cmp	x20, #0
+	ldr	w9, [x20, #312]
+	cmp	x19, #0
 	ccmp	w9, #0, #4, eq
-	csinc	x8, x20, xzr, eq
-	cbnz	w9, .LBB16_36
-	cbnz	x8, .LBB16_148
-	b	.LBB16_36
-.LBB16_151:
-	ldr	w2, [x19, #296]
-	cbz	w2, .LBB16_154
+	csinc	x8, x19, xzr, eq
+	cbnz	w9, .LBB16_35
+	cbnz	x8, .LBB16_66
+	b	.LBB16_35
+.LBB16_69:
+	ldr	w2, [x20, #296]
+	cbz	w2, .LBB16_72
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_381
-.LBB16_153:
-	str	wzr, [x19, #296]
-	b	.LBB16_155
-.LBB16_154:
-	ldr	x8, [x19, #432]
-	ldr	x0, [x19, #368]
-	ldrsw	x2, [x19, #252]
+	b.ge	.LBB16_382
+.LBB16_71:
+	str	wzr, [x20, #296]
+	b	.LBB16_73
+.LBB16_72:
+	ldr	x8, [x20, #432]
+	ldr	x0, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	ldr	x8, [x19, #440]
-	ldr	x0, [x19, #360]
-	ldrsw	x2, [x19, #252]
+	ldr	x8, [x20, #440]
+	ldr	x0, [x20, #360]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-.LBB16_155:
-	ldr	x8, [x19, #440]
-	ldr	w9, [x20, #40]
+.LBB16_73:
+	ldr	x8, [x20, #440]
+	ldr	w9, [x19, #40]
 	ldr	w8, [x8, #40]
 	cmp	w9, w8
-	b.eq	.LBB16_176
+	b.eq	.LBB16_94
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_176
+	cbz	w8, .LBB16_94
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_375
-.LBB16_158:
+	b.ge	.LBB16_376
+.LBB16_76:
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_159:
+.LBB16_77:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
@@ -3772,42 +3391,42 @@ ebc_thread:
 	bl	prepare_to_wait_event
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_174
-	cbnz	x0, .LBB16_175
+	cbz	w8, .LBB16_92
+	cbnz	x0, .LBB16_93
 	bl	schedule
-	b	.LBB16_159
-.LBB16_162:
+	b	.LBB16_77
+.LBB16_80:
 	mov	w9, #1
 	movk	w9, #192, lsl #16
 	tst	w8, w9
-	b.eq	.LBB16_390
-	ldr	w8, [x19, #464]
-	str	x20, [x19, #440]
+	b.eq	.LBB16_391
+	ldr	w8, [x20, #464]
+	str	x19, [x20, #440]
 	cmp	w8, #4
-	b.eq	.LBB16_334
+	b.eq	.LBB16_249
 	cmp	w8, #2
-	b.eq	.LBB16_207
+	b.eq	.LBB16_125
 	cmp	w8, #1
-	b.ne	.LBB16_340
-	ldr	w8, [x19, #780]
-	cbz	w8, .LBB16_207
-	ldr	w8, [x19, #776]
-	cbnz	w8, .LBB16_169
-	ldr	w8, [x19, #784]
-	cbz	w8, .LBB16_207
-.LBB16_169:
+	b.ne	.LBB16_255
+	ldr	w8, [x20, #780]
+	cbz	w8, .LBB16_125
+	ldr	w8, [x20, #776]
+	cbnz	w8, .LBB16_87
+	ldr	w8, [x20, #784]
+	cbz	w8, .LBB16_125
+.LBB16_87:
 	ldur	x8, [x29, #-56]
-	mov	x9, x20
+	mov	x9, x19
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_410
-.LBB16_170:
-	ldr	w8, [x19, #252]
-	ldr	x1, [x19, #376]
+	b.ge	.LBB16_411
+.LBB16_88:
+	ldr	w8, [x20, #252]
+	ldr	x1, [x20, #376]
 	cmp	w8, #1
-	b.lt	.LBB16_379
+	b.lt	.LBB16_380
 	ldr	x9, [x9, #16]
-.LBB16_172:
+.LBB16_90:
 	ldrb	w10, [x9], #1
 	ldrb	w11, [x1]
 	mvn	w12, w10
@@ -3816,124 +3435,124 @@ ebc_thread:
 	csel	w10, w10, w12, eq
 	subs	x8, x8, #1
 	strb	w10, [x1], #1
-	b.ne	.LBB16_172
-	ldr	x1, [x19, #376]
-	ldr	w8, [x19, #252]
-	b	.LBB16_380
-.LBB16_174:
+	b.ne	.LBB16_90
+	ldr	x1, [x20, #376]
+	ldr	w8, [x20, #252]
+	b	.LBB16_381
+.LBB16_92:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-.LBB16_175:
+.LBB16_93:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_376
-.LBB16_176:
+	b.ge	.LBB16_377
+.LBB16_94:
 	mov	w8, #4
-	str	x20, [x19, #440]
-	ldp	x3, x4, [x19, #384]
-	str	w8, [x19, #464]
-	ldr	x0, [x19, #360]
-	ldr	x1, [x19, #240]
-	ldr	x2, [x20, #16]
+	str	x19, [x20, #440]
+	ldp	x3, x4, [x20, #384]
+	str	w8, [x20, #464]
+	ldr	x0, [x20, #360]
+	ldr	x1, [x20, #240]
+	ldr	x2, [x19, #16]
 	ldr	x5, [sp, #48]
 	bl	refresh_new_image
-	ldr	w8, [x19, #276]
+	ldr	w8, [x20, #276]
 	mov	w3, #1
-	cbnz	w8, .LBB16_211
-	str	w3, [x19, #276]
-	mov	x0, x19
-	ldr	w1, [x20, #40]
+	cbnz	w8, .LBB16_129
+	str	w3, [x20, #276]
+	mov	x0, x20
+	ldr	w1, [x19, #40]
 	mov	w2, wzr
 	bl	ebc_lut_update
-	ldr	w9, [x19, #800]
-	ldr	w8, [x19, #328]
+	ldr	w9, [x20, #800]
+	ldr	w8, [x20, #328]
 	cmp	w9, #1
-	strh	w8, [x19, #280]
-	b.ge	.LBB16_374
-.LBB16_178:
-	ldr	x20, [sp, #48]
+	strh	w8, [x20, #280]
+	b.ge	.LBB16_375
+.LBB16_96:
+	ldr	x19, [sp, #48]
 	mov	w6, #1
-	ldp	x4, x0, [x19, #392]
-	ldp	x1, x2, [x19, #360]
-	mov	x5, x20
-	ldr	w8, [x19, #204]
-	ldr	x3, [x19, #384]
-	cbz	w8, .LBB16_193
+	ldp	x4, x0, [x20, #392]
+	ldp	x1, x2, [x20, #360]
+	mov	x5, x19
+	ldr	w8, [x20, #204]
+	ldr	x3, [x20, #384]
+	cbz	w8, .LBB16_111
 	bl	get_overlay_image2
-	b	.LBB16_194
-.LBB16_180:
+	b	.LBB16_112
+.LBB16_98:
 	bl	ebc_get_dsp_list_enum_num
 	cbnz	w0, .LBB16_3
 	bl	ebc_get_osd_list_enum_num
 	cbnz	w0, .LBB16_3
-	b	.LBB16_365
-.LBB16_182:
+	b	.LBB16_286
+.LBB16_100:
 	add	w9, w10, #7
 	cmp	w10, #0
 	csel	w11, w9, w10, lt
 	cmp	w10, #8
-	b.lt	.LBB16_186
-	ldr	x9, [x19, #432]
+	b.lt	.LBB16_104
+	ldr	x9, [x20, #432]
 	asr	w10, w11, #3
-	ldr	x11, [x20, #16]
+	ldr	x11, [x19, #16]
 	ldr	x9, [x9, #16]
-.LBB16_184:
+.LBB16_102:
 	ldr	x12, [x11]
 	ldr	x13, [x9]
 	cmp	x12, x13
-	b.ne	.LBB16_218
+	b.ne	.LBB16_136
 	add	x9, x9, #8
 	add	x11, x11, #8
 	subs	w10, w10, #1
-	b.ne	.LBB16_184
-.LBB16_186:
+	b.ne	.LBB16_102
+.LBB16_104:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_357
-.LBB16_187:
-	str	x20, [x19, #440]
+	b.ge	.LBB16_272
+.LBB16_105:
+	str	x19, [x20, #440]
 	b	.LBB16_407
-.LBB16_188:
+.LBB16_106:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-.LBB16_189:
+.LBB16_107:
 	bl	ebc_get_dsp_list_enum_num
 	cbnz	w0, .LBB16_3
 	bl	ebc_get_osd_list_enum_num
 	cbnz	w0, .LBB16_3
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_365
-	ldr	w8, [x19, #312]
+	cbz	w8, .LBB16_286
+	ldr	w8, [x20, #312]
 	cbnz	w8, .LBB16_20
-	b	.LBB16_366
-.LBB16_193:
+	b	.LBB16_287
+.LBB16_111:
 	bl	get_overlay_image
-.LBB16_194:
+.LBB16_112:
+	ldr	w8, [x20, #284]
 	mov	w3, #1
-	ldr	w8, [x19, #284]
-	cbz	w8, .LBB16_197
-	ldp	x1, x2, [x19, #360]
-	mov	x5, x20
+	cbz	w8, .LBB16_115
+	ldp	x1, x2, [x20, #360]
+	mov	x5, x19
 	mov	w6, #1
-	ldp	x3, x4, [x19, #384]
-	ldr	w8, [x19, #204]
-	ldr	x0, [x19, #408]
-	cbz	w8, .LBB16_208
+	ldp	x3, x4, [x20, #384]
+	ldr	w8, [x20, #204]
+	ldr	x0, [x20, #408]
+	cbz	w8, .LBB16_126
 	bl	get_overlay_image2
-	b	.LBB16_209
-.LBB16_197:
-	ldr	w8, [x19, #800]
-	str	wzr, [x19, #276]
-	str	w3, [x19, #764]
+	b	.LBB16_127
+.LBB16_115:
+	ldr	w8, [x20, #800]
+	str	wzr, [x20, #276]
+	str	w3, [x20, #764]
 	cmp	w8, #1
-	b.lt	.LBB16_211
+	b.lt	.LBB16_129
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.102
 	adrp	x2, .L__func__.ebc_overlay_bg_frame_start
@@ -3941,27 +3560,27 @@ ebc_thread:
 	add	x2, x2, :lo12:.L__func__.ebc_overlay_bg_frame_start
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_210
-.LBB16_199:
-	ldr	w8, [x19, #780]
+	b	.LBB16_128
+.LBB16_117:
+	ldr	w8, [x20, #780]
 	cbz	w8, .LBB16_26
-	ldr	w8, [x19, #776]
-	cbnz	w8, .LBB16_202
-	ldr	w8, [x19, #784]
+	ldr	w8, [x20, #776]
+	cbnz	w8, .LBB16_120
+	ldr	w8, [x20, #784]
 	cbz	w8, .LBB16_26
-.LBB16_202:
+.LBB16_120:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_391
-.LBB16_203:
-	ldr	w8, [x19, #252]
-	ldr	x1, [x19, #376]
+	b.ge	.LBB16_400
+.LBB16_121:
+	ldr	w8, [x20, #252]
+	ldr	x1, [x20, #376]
 	cmp	w8, #1
-	b.lt	.LBB16_370
-	ldr	x9, [x19, #440]
+	b.lt	.LBB16_291
+	ldr	x9, [x20, #440]
 	ldr	x9, [x9, #16]
-.LBB16_205:
+.LBB16_123:
 	ldrb	w10, [x9], #1
 	ldrb	w11, [x1]
 	mvn	w12, w10
@@ -3970,262 +3589,268 @@ ebc_thread:
 	csel	w10, w10, w12, eq
 	subs	x8, x8, #1
 	strb	w10, [x1], #1
-	b.ne	.LBB16_205
-	ldr	x1, [x19, #376]
-	ldr	w8, [x19, #252]
-	b	.LBB16_371
-.LBB16_207:
-	ldr	x8, [x19, #432]
-	ldr	x0, [x19, #368]
-	ldrsw	x2, [x19, #252]
+	b.ne	.LBB16_123
+	ldr	x1, [x20, #376]
+	ldr	w8, [x20, #252]
+	b	.LBB16_292
+.LBB16_125:
+	ldr	x8, [x20, #432]
+	ldr	x0, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	b	.LBB16_361
-.LBB16_208:
+	b	.LBB16_276
+.LBB16_126:
 	bl	get_overlay_image
-.LBB16_209:
+.LBB16_127:
 	ldr	x0, [sp, #24]
-	mov	x1, x20
-	str	wzr, [x19, #112]
+	mov	x1, x19
+	str	wzr, [x20, #112]
 	bl	flip
-.LBB16_210:
+.LBB16_128:
 	mov	w3, #1
-.LBB16_211:
-	ldr	x8, [x19, #440]
+.LBB16_129:
+	ldr	x8, [x20, #440]
 	ldr	w8, [x8, #40]
 	cmp	w8, #23
-	b.hi	.LBB16_213
+	b.hi	.LBB16_131
 	mov	w9, #1
 	lsl	w8, w3, w8
 	movk	w9, #192, lsl #16
 	tst	w8, w9
 	b.ne	.LBB16_407
-.LBB16_213:
+.LBB16_131:
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
 	cbz	w8, .LBB16_407
-	ldr	w8, [x19, #800]
-	str	wzr, [x19, #764]
+	ldr	w8, [x20, #800]
+	str	wzr, [x20, #764]
 	cmp	w8, #1
-	b.ge	.LBB16_382
-.LBB16_215:
+	b.ge	.LBB16_387
+.LBB16_133:
 	adrp	x8, jiffies
-	ldr	x20, [x8, :lo12:jiffies]
-	ldrb	w8, [x19, #280]
+	ldr	x19, [x8, :lo12:jiffies]
+	ldrb	w8, [x20, #280]
 	add	w8, w8, w8, lsl #1
 	lsl	w0, w8, #2
 	bl	__msecs_to_jiffies
-	add	x1, x0, x20
+	add	x1, x0, x19
 	ldr	x0, [sp, #16]
 	b	.LBB16_405
-.LBB16_216:
+.LBB16_134:
 	ldur	x9, [x29, #-56]
 	ldr	w9, [x9]
 	cmp	w9, #1
-	b.ge	.LBB16_401
-.LBB16_217:
+	b.ge	.LBB16_409
+.LBB16_135:
 	mov	w9, #2
 	stur	w9, [x29, #-64]
-.LBB16_218:
-	ldr	w9, [x19, #780]
-	cbz	w9, .LBB16_222
+.LBB16_136:
+	ldr	w9, [x20, #780]
+	cbz	w9, .LBB16_140
 	sub	w8, w8, #12
 	cmp	w8, #2
-	b.hi	.LBB16_222
-	ldr	w8, [x19, #776]
-	cbz	w8, .LBB16_294
-	ldr	x8, [x19, #432]
-	ldr	x1, [x19, #368]
-	ldrsw	x2, [x19, #252]
+	b.hi	.LBB16_140
+	ldr	w8, [x20, #776]
+	cbz	w8, .LBB16_145
+	ldr	x8, [x20, #432]
+	ldr	x1, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x0, [x8, #16]
-	bl	memcpy
-	b	.LBB16_228
-.LBB16_222:
-	cbz	w9, .LBB16_227
-	ldr	w8, [x19, #784]
-	cbnz	w8, .LBB16_225
-	ldr	w8, [x19, #776]
-	cbz	w8, .LBB16_227
-.LBB16_225:
+	b	.LBB16_148
+.LBB16_140:
+	cbz	w9, .LBB16_144
+	ldr	w8, [x20, #784]
+	cbz	w8, .LBB16_144
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_383
-.LBB16_226:
+	b.ge	.LBB16_389
+.LBB16_143:
 	mov	w8, #21
-	str	w8, [x20, #40]
+	str	w8, [x19, #40]
 	mov	w8, #2
 	stur	w8, [x29, #-64]
-.LBB16_227:
-	str	wzr, [x19, #784]
-	str	wzr, [x19, #776]
-.LBB16_228:
-	str	x20, [x19, #440]
-	ldr	w1, [x20, #40]
+.LBB16_144:
+	str	wzr, [x20, #784]
+	str	wzr, [x20, #776]
+	b	.LBB16_149
+.LBB16_145:
+	ldr	w8, [x20, #784]
+	cbz	w8, .LBB16_280
+	ldr	x8, [x20, #432]
+	ldr	x1, [x8, #16]
+	ldr	w8, [x20, #252]
+.LBB16_147:
+	ldr	x0, [x20, #368]
+	sxtw	x2, w8
+.LBB16_148:
+	bl	memcpy
+.LBB16_149:
+	str	x19, [x20, #440]
+	ldr	w1, [x19, #40]
 	cmp	w1, #12
-	b.eq	.LBB16_233
+	b.eq	.LBB16_154
 	cmp	w1, #14
-	b.eq	.LBB16_235
+	b.eq	.LBB16_156
 	cmp	w1, #13
-	b.ne	.LBB16_239
-	ldr	w8, [x19, #780]
-	cbz	w8, .LBB16_239
+	b.ne	.LBB16_160
+	ldr	w8, [x20, #780]
+	cbz	w8, .LBB16_160
 	ldur	w8, [x29, #-64]
-	mov	x0, x19
+	mov	x0, x20
 	mov	w1, #14
 	cmp	w8, #2
 	cset	w2, eq
 	bl	ebc_lut_update
-	ldrb	w8, [x19, #328]
+	ldrb	w8, [x20, #328]
 	mov	w10, #21846
 	sub	w9, w8, #6
+	lsr	w8, w8, #1
 	mul	w9, w9, w10
-	mov	w10, #171
-	mul	w8, w8, w10
 	lsr	w10, w9, #16
 	add	w9, w10, w9, lsr #31
-	mov	w10, #3
-	lsr	w8, w8, #9
-	strb	w10, [x19, #280]
-	b	.LBB16_238
-.LBB16_233:
-	ldr	w8, [x19, #780]
-	cbz	w8, .LBB16_239
+	mov	w10, #2
+	b	.LBB16_158
+.LBB16_154:
+	ldr	w8, [x20, #780]
+	cbz	w8, .LBB16_160
 	ldur	w8, [x29, #-64]
-	mov	x0, x19
+	mov	x0, x20
 	mov	w1, #14
 	cmp	w8, #2
 	cset	w2, eq
 	bl	ebc_lut_update
-	ldrb	w8, [x19, #328]
+	ldrb	w8, [x20, #328]
+	mov	w11, #171
 	sub	w9, w8, #6
-	lsr	w8, w8, #2
+	mul	w8, w8, w11
 	and	w10, w9, #0xc000
+	lsr	w8, w8, #9
 	add	w9, w9, w10, lsr #14
-	mov	w10, #4
+	mov	w10, #3
 	lsr	w9, w9, #2
-	b	.LBB16_237
-.LBB16_235:
-	ldr	w8, [x19, #780]
-	cbz	w8, .LBB16_239
+	strb	w10, [x20, #280]
+	b	.LBB16_159
+.LBB16_156:
+	ldr	w8, [x20, #780]
+	cbz	w8, .LBB16_160
 	ldur	w8, [x29, #-64]
-	mov	x0, x19
+	mov	x0, x20
 	mov	w1, #14
 	cmp	w8, #2
 	cset	w2, eq
 	bl	ebc_lut_update
-	ldrb	w8, [x19, #328]
+	ldrb	w8, [x20, #328]
 	mov	w10, #26215
 	sub	w9, w8, #6
+	lsr	w8, w8, #2
 	mul	w9, w9, w10
-	mov	w10, #205
-	mul	w8, w8, w10
 	lsr	w10, w9, #17
 	add	w9, w10, w9, lsr #31
-	mov	w10, #5
-	lsr	w8, w8, #10
-.LBB16_237:
-	strb	w10, [x19, #280]
-.LBB16_238:
-	strb	w9, [x19, #872]
-	strb	w8, [x19, #873]
-	b	.LBB16_240
-.LBB16_239:
+	mov	w10, #4
+.LBB16_158:
+	strb	w10, [x20, #280]
+.LBB16_159:
+	strb	w9, [x20, #872]
+	strb	w8, [x20, #873]
+	b	.LBB16_161
+.LBB16_160:
 	ldur	w8, [x29, #-64]
-	mov	x0, x19
+	mov	x0, x20
 	cmp	w8, #2
 	cset	w2, eq
 	bl	ebc_lut_update
-	ldr	w8, [x19, #328]
-	strb	w8, [x19, #280]
-.LBB16_240:
-	ldr	w8, [x19, #780]
+	ldr	w8, [x20, #328]
+	strb	w8, [x20, #280]
+.LBB16_161:
+	ldr	w8, [x20, #780]
 	mov	w9, #1
-	cbz	w8, .LBB16_246
-	ldr	w8, [x20, #40]
+	cbz	w8, .LBB16_167
+	ldr	w8, [x19, #40]
 	sub	w8, w8, #12
 	cmp	w8, #2
-	b.hi	.LBB16_246
-	ldr	w8, [x19, #784]
-	cbnz	w8, .LBB16_244
-	ldr	x0, [x19, #376]
+	b.hi	.LBB16_167
+	ldr	w8, [x20, #784]
+	cbnz	w8, .LBB16_165
+	ldr	x0, [x20, #376]
 	mov	w1, wzr
-	ldrsw	x2, [x19, #252]
+	ldrsw	x2, [x20, #252]
 	bl	memset
-	ldr	x0, [x19, #360]
+	ldr	x0, [x20, #360]
 	mov	w1, wzr
-	ldrsw	x2, [x19, #252]
+	ldrsw	x2, [x20, #252]
 	bl	memset
 	mov	w9, #1
-.LBB16_244:
-	str	w9, [x19, #784]
-	b	.LBB16_246
-.LBB16_245:
-	ldr	x8, [x19, #432]
-	ldr	x1, [x19, #368]
-	ldrsw	x2, [x19, #252]
+.LBB16_165:
+	str	w9, [x20, #784]
+	b	.LBB16_167
+.LBB16_166:
+	ldr	x8, [x20, #432]
+	ldr	x1, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x0, [x8, #16]
 	bl	memcpy
 	mov	w9, #1
-.LBB16_246:
+.LBB16_167:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_290
-.LBB16_247:
+	b.ge	.LBB16_211
+.LBB16_168:
 	ldur	w8, [x29, #-64]
-	mov	x0, x19
-	str	w9, [x19, #276]
-	str	w8, [x19, #464]
+	mov	x0, x20
+	str	w9, [x20, #276]
+	str	w8, [x20, #464]
 	bl	ebc_frame_start
 	adrp	x8, jiffies
 	ldr	x8, [x8, :lo12:jiffies]
 	ldr	x0, [sp, #72]
 	add	x1, x8, #750
 	bl	mod_timer
-	ldr	w8, [x19, #780]
-	cbz	w8, .LBB16_268
-	ldr	w9, [x20, #40]
+	ldr	w8, [x20, #780]
+	cbz	w8, .LBB16_189
+	ldr	w9, [x19, #40]
 	sub	w9, w9, #12
 	cmp	w9, #2
-	b.hi	.LBB16_268
-	ldr	w9, [x19, #784]
-	cbz	w9, .LBB16_268
+	b.hi	.LBB16_189
+	ldr	w9, [x20, #784]
+	cbz	w9, .LBB16_189
 	ldur	x9, [x29, #-56]
 	ldr	w9, [x9]
 	cmp	w9, #1
-	b.ge	.LBB16_293
-.LBB16_251:
-	ldr	w9, [x19, #304]
+	b.ge	.LBB16_214
+.LBB16_172:
+	ldr	w9, [x20, #304]
 	cmp	w9, #1
-	b.lt	.LBB16_266
-	ldr	x14, [x19, #440]
+	b.lt	.LBB16_187
+	ldr	x14, [x20, #440]
 	mov	w11, wzr
-	ldrsb	w0, [x19, #872]
+	ldrsb	w0, [x20, #872]
 	mov	w12, wzr
-	ldrsb	w15, [x19, #873]
+	ldrsb	w15, [x20, #873]
 	mov	w10, wzr
-	ldp	x1, x16, [x19, #368]
+	ldp	x1, x16, [x20, #368]
 	and	w17, w0, #0xff
 	neg	w0, w0
-	ldr	w13, [x19, #308]
+	ldr	w13, [x20, #308]
 	neg	w2, w15
 	ldr	x14, [x14, #16]
 	mov	w30, #1
-	ldr	x3, [x19, #360]
-	b	.LBB16_254
-.LBB16_253:
+	ldr	x3, [x20, #360]
+	b	.LBB16_175
+.LBB16_174:
 	add	w12, w12, #1
 	add	w11, w11, w13
 	cmp	w12, w9
-	b.eq	.LBB16_267
-.LBB16_254:
+	b.eq	.LBB16_188
+.LBB16_175:
 	cmp	w13, #1
-	b.lt	.LBB16_253
+	b.lt	.LBB16_174
 	mov	w5, w11
 	mov	x4, x13
-	b	.LBB16_260
-.LBB16_256:
+	b	.LBB16_181
+.LBB16_177:
 	cmp	w8, #1
 	orr	w23, w23, #0x1
 	cset	w6, gt
@@ -4234,43 +3859,43 @@ ebc_thread:
 	orr	w6, w6, w26
 	cmp	w6, #0
 	mov	w6, #-16
-.LBB16_257:
+.LBB16_178:
 	csel	w6, w23, w6, ne
 	csinc	w10, w10, wzr, eq
-.LBB16_258:
+.LBB16_179:
 	strb	w6, [x1, x5]
 	strb	w7, [x3, x5]
 	strb	w21, [x16, x5]
-.LBB16_259:
+.LBB16_180:
 	subs	x4, x4, #1
 	add	w5, w5, #1
-	b.eq	.LBB16_253
-.LBB16_260:
+	b.eq	.LBB16_174
+.LBB16_181:
 	sxtw	x5, w5
 	ldrb	w6, [x14, x5]
 	ldrb	w23, [x1, x5]
 	cmp	w23, w6
-	b.eq	.LBB16_259
+	b.eq	.LBB16_180
 	ldrsb	w21, [x16, x5]
 	cmp	w6, #240
 	ldrb	w7, [x3, x5]
-	b.ne	.LBB16_264
+	b.ne	.LBB16_185
 	add	w6, w7, #1
 	cmp	w21, #0
 	sxtb	w7, w6
 	csinc	w21, w30, w21, lt
 	cmp	w17, w21, uxtb
-	b.ne	.LBB16_256
+	b.ne	.LBB16_177
 	mov	w6, #240
 	mov	w21, w17
-	b	.LBB16_258
-.LBB16_264:
+	b	.LBB16_179
+.LBB16_185:
 	sub	w26, w21, #1
 	cmp	w21, #0
 	csinv	w21, w26, wzr, le
 	sub	w7, w7, #1
 	cmp	w0, w21, sxtb
-	b.eq	.LBB16_258
+	b.eq	.LBB16_179
 	cmp	w8, #1
 	orr	w23, w23, #0x1
 	cset	w26, gt
@@ -4278,27 +3903,27 @@ ebc_thread:
 	cset	w27, lt
 	orr	w26, w26, w27
 	cmp	w26, #0
-	b	.LBB16_257
-.LBB16_266:
+	b	.LBB16_178
+.LBB16_187:
 	mov	w10, wzr
-.LBB16_267:
-	str	w10, [x19, #776]
-.LBB16_268:
+.LBB16_188:
+	str	w10, [x20, #776]
+.LBB16_189:
 	ldur	x8, [x29, #-48]
 	ldr	w9, [x8]
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
-	cbz	w9, .LBB16_275
+	cbz	w9, .LBB16_196
 	cmp	w8, #1
-	b.ge	.LBB16_291
-.LBB16_270:
+	b.ge	.LBB16_212
+.LBB16_191:
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_271:
+.LBB16_192:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
@@ -4306,34 +3931,34 @@ ebc_thread:
 	bl	prepare_to_wait_event
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_274
-	cbnz	x0, .LBB16_276
+	cbz	w8, .LBB16_195
+	cbnz	x0, .LBB16_197
 	bl	schedule
-	b	.LBB16_271
-.LBB16_274:
+	b	.LBB16_192
+.LBB16_195:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-	b	.LBB16_276
-.LBB16_275:
-	tbz	w8, #31, .LBB16_292
-.LBB16_276:
-	ldr	w8, [x19, #296]
-	cbnz	w8, .LBB16_300
-	ldr	w8, [x19, #780]
+	b	.LBB16_197
+.LBB16_196:
+	tbz	w8, #31, .LBB16_213
+.LBB16_197:
+	ldr	w8, [x20, #296]
+	cbnz	w8, .LBB16_215
+	ldr	w8, [x20, #780]
 	cbz	w8, .LBB16_404
-	ldr	w8, [x20, #40]
+	ldr	w8, [x19, #40]
 	sub	w8, w8, #12
 	cmp	w8, #2
 	b.hi	.LBB16_404
-	ldr	w8, [x19, #776]
-	cbz	w8, .LBB16_306
+	ldr	w8, [x20, #776]
+	cbz	w8, .LBB16_221
 	bl	ebc_get_dsp_list_enum_num
 	cbnz	w0, .LBB16_404
 	sub	x0, x29, #40
 	mov	w1, wzr
-	str	wzr, [x19, #312]
+	str	wzr, [x20, #312]
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
@@ -4343,30 +3968,30 @@ ebc_thread:
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w8, [x19, #312]
-	cbz	w8, .LBB16_286
-.LBB16_282:
+	ldr	w8, [x20, #312]
+	cbz	w8, .LBB16_207
+.LBB16_203:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-.LBB16_283:
+.LBB16_204:
 	bl	ebc_get_dsp_list_enum_num
 	cbnz	w0, .LBB16_404
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.lt	.LBB16_245
+	b.lt	.LBB16_166
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.91
 	add	x1, x1, :lo12:.L.str.91
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_245
-.LBB16_286:
+	b	.LBB16_166
+.LBB16_207:
 	mov	w8, #3
-.LBB16_287:
-	cbnz	x0, .LBB16_283
+.LBB16_208:
+	cbnz	x0, .LBB16_204
 	mov	x0, x8
 	bl	schedule_timeout
 	mov	x27, x0
@@ -4375,25 +4000,25 @@ ebc_thread:
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w9, [x19, #312]
+	ldr	w9, [x20, #312]
 	cmp	x27, #0
 	ccmp	w9, #0, #4, eq
 	csinc	x8, x27, xzr, eq
-	cbnz	w9, .LBB16_282
-	cbnz	x8, .LBB16_287
-	b	.LBB16_282
-.LBB16_290:
-	ldr	x8, [x19, #440]
+	cbnz	w9, .LBB16_203
+	cbnz	x8, .LBB16_208
+	b	.LBB16_203
+.LBB16_211:
+	ldr	x8, [x20, #440]
 	adrp	x1, .L.str.86
-	ldr	x0, [x19, #320]
+	ldr	x0, [x20, #320]
 	add	x1, x1, :lo12:.L.str.86
-	ldrb	w3, [x19, #280]
+	ldrb	w3, [x20, #280]
 	ldr	w2, [x8, #40]
-	ldrb	w4, [x19, #328]
+	ldrb	w4, [x20, #328]
 	bl	_dev_info
 	mov	w9, #1
-	b	.LBB16_247
-.LBB16_291:
+	b	.LBB16_168
+.LBB16_212:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.88
 	add	x1, x1, :lo12:.L.str.88
@@ -4401,102 +4026,72 @@ ebc_thread:
 	bl	_dev_info
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbnz	w8, .LBB16_270
-	b	.LBB16_276
-.LBB16_292:
+	cbnz	w8, .LBB16_191
+	b	.LBB16_197
+.LBB16_213:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.89
 	add	x1, x1, :lo12:.L.str.89
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_276
-.LBB16_293:
+	b	.LBB16_197
+.LBB16_214:
 	adrp	x1, .L.str.87
-	ldr	x0, [x19, #320]
+	ldr	x0, [x20, #320]
 	add	x1, x1, :lo12:.L.str.87
 	bl	_dev_info
-	ldr	w8, [x19, #780]
-	b	.LBB16_251
-.LBB16_294:
-	ldrsw	x2, [x19, #252]
-	add	w8, w2, #7
-	cmp	w2, #0
-	csel	w8, w8, w2, lt
-	cmp	w2, #8
-	b.lt	.LBB16_298
-	ldr	x9, [x19, #432]
-	asr	w8, w8, #3
-	ldr	x1, [x9, #16]
-	ldr	x9, [x20, #16]
-	mov	x10, x1
-.LBB16_296:
-	ldr	x11, [x9]
-	ldr	x12, [x10]
-	cmp	x11, x12
-	b.ne	.LBB16_372
-	add	x10, x10, #8
-	add	x9, x9, #8
-	subs	w8, w8, #1
-	b.ne	.LBB16_296
-.LBB16_298:
-	ldur	x8, [x29, #-56]
-	ldr	w8, [x8]
-	cmp	w8, #1
-	b.lt	.LBB16_187
-	ldr	x8, [sp, #40]
-	adrp	x1, .L.str.84
-	add	x1, x1, :lo12:.L.str.84
-	b	.LBB16_358
-.LBB16_300:
+	ldr	w8, [x20, #780]
+	b	.LBB16_172
+.LBB16_215:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
 	b.ge	.LBB16_388
-.LBB16_301:
-	ldr	x8, [x19, #432]
-	ldr	x0, [x19, #368]
-	ldrsw	x2, [x19, #252]
+.LBB16_216:
+	ldr	x8, [x20, #432]
+	ldr	x0, [x20, #368]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	ldr	x8, [x19, #440]
-	ldr	x0, [x19, #360]
-	ldrsw	x2, [x19, #252]
+	ldr	x8, [x20, #440]
+	ldr	x0, [x20, #360]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	ldr	x0, [x19, #384]
+	ldr	x0, [x20, #384]
 	mov	w1, wzr
-	ldrsw	x2, [x19, #252]
+	ldrsw	x2, [x20, #252]
 	bl	memset
-	ldr	w8, [x19, #252]
+	ldr	w8, [x20, #252]
 	cmp	w8, #1
 	b.lt	.LBB16_404
-	ldrb	w11, [x19, #280]
-	ldrb	w12, [x19, #296]
-	ldr	x9, [x19, #384]
+	ldrb	w11, [x20, #280]
+	ldrb	w12, [x20, #296]
+	ldr	x9, [x20, #384]
 	sub	w11, w11, w12
-	ldp	x12, x10, [x19, #360]
-	b	.LBB16_304
-.LBB16_303:
+	ldp	x12, x10, [x20, #360]
+	b	.LBB16_219
+.LBB16_218:
 	add	x9, x9, #1
 	add	x10, x10, #1
 	add	x12, x12, #1
 	subs	w8, w8, #1
 	b.eq	.LBB16_404
-.LBB16_304:
+.LBB16_219:
 	ldrb	w13, [x10]
 	ldrb	w14, [x12]
 	cmp	w13, w14
-	b.eq	.LBB16_303
+	b.eq	.LBB16_218
 	strb	w11, [x9]
-	b	.LBB16_303
-.LBB16_306:
-	ldr	w8, [x19, #784]
+	b	.LBB16_218
+.LBB16_221:
+	ldr	w8, [x20, #784]
 	cbz	w8, .LBB16_404
 	bl	ebc_get_dsp_list_enum_num
 	cbnz	w0, .LBB16_404
 	sub	x0, x29, #40
 	mov	w1, wzr
-	str	wzr, [x19, #312]
+	str	wzr, [x20, #312]
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
@@ -4506,30 +4101,30 @@ ebc_thread:
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w8, [x19, #312]
-	cbz	w8, .LBB16_384
-.LBB16_309:
+	ldr	w8, [x20, #312]
+	cbz	w8, .LBB16_383
+.LBB16_224:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-.LBB16_310:
+.LBB16_225:
 	bl	ebc_get_dsp_list_enum_num
 	cbnz	w0, .LBB16_404
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_412
-.LBB16_312:
-	ldr	w8, [x19, #304]
-	ldr	x23, [x19, #368]
+	b.ge	.LBB16_413
+.LBB16_227:
+	ldr	w8, [x20, #304]
+	ldr	x23, [x20, #368]
 	sub	w8, w8, #1
 	cmp	w8, #1
 	str	w8, [sp, #12]
 	b.le	.LBB16_393
-	ldr	x8, [x19, #440]
-	ldr	w9, [x19, #308]
-	ldr	x27, [x19, #376]
+	ldr	x8, [x20, #440]
+	ldr	w9, [x20, #308]
+	ldr	x21, [x20, #376]
 	ldr	x8, [x8, #16]
 	str	w9, [sp, #56]
 	stur	x8, [x29, #-64]
@@ -4537,111 +4132,111 @@ ebc_thread:
 	str	x8, [sp, #64]
 	mov	w8, #1
 	str	w8, [sp, #36]
-	b	.LBB16_315
-.LBB16_314:
+	b	.LBB16_230
+.LBB16_229:
 	ldr	w9, [sp, #36]
 	ldr	w8, [sp, #12]
 	add	w9, w9, #1
 	cmp	w9, w8
 	str	w9, [sp, #36]
 	b.eq	.LBB16_392
-.LBB16_315:
+.LBB16_230:
 	ldr	x8, [sp, #64]
 	cmp	w8, #2
-	b.lt	.LBB16_314
+	b.lt	.LBB16_229
 	ldr	w8, [sp, #56]
 	mov	w26, #1
 	ldr	w9, [sp, #36]
 	mul	w8, w9, w8
 	str	w8, [sp, #60]
-	b	.LBB16_318
-.LBB16_317:
+	b	.LBB16_233
+.LBB16_232:
 	ldr	x8, [sp, #64]
 	add	x26, x26, #1
 	cmp	x26, x8
-	b.eq	.LBB16_314
-.LBB16_318:
+	b.eq	.LBB16_229
+.LBB16_233:
 	ldr	w8, [sp, #60]
 	add	w8, w8, w26
-	sxtw	x20, w8
-	ldrb	w8, [x27, x20]
-	cbz	w8, .LBB16_317
+	sxtw	x19, w8
+	ldrb	w8, [x21, x19]
+	cbz	w8, .LBB16_232
 	ldur	x8, [x29, #-64]
-	ldrb	w21, [x8, x20]
-.LBB16_320:
+	ldrb	w27, [x8, x19]
+.LBB16_235:
 	bl	get_random_u8
 	and	w8, w0, #0xff
 	add	w8, w8, w0, uxtb #1
 	tst	w8, #0xff
-	b.eq	.LBB16_320
+	b.eq	.LBB16_235
 	lsr	w8, w8, #4
-	cmp	w21, #240
+	cmp	w27, #240
 	and	w8, w8, #0x30
 	sub	w9, w8, #88
-	strb	w9, [x23, x20]
-	b.ne	.LBB16_317
+	strb	w9, [x23, x19]
+	b.ne	.LBB16_232
 	ldr	w9, [sp, #56]
-	sub	w9, w20, w9
+	sub	w9, w19, w9
 	sxtw	x9, w9
-	ldrb	w10, [x27, x9]
-	cbnz	w10, .LBB16_325
+	ldrb	w10, [x21, x9]
+	cbnz	w10, .LBB16_240
 	ldur	x10, [x29, #-64]
 	ldrb	w10, [x10, x9]
 	cmp	w10, #240
-	b.ne	.LBB16_325
+	b.ne	.LBB16_240
 	sub	w10, w8, #40
 	strb	w10, [x23, x9]
-.LBB16_325:
+.LBB16_240:
 	ldr	w9, [sp, #56]
-	add	w9, w20, w9
+	add	w9, w19, w9
 	sxtw	x9, w9
-	ldrb	w10, [x27, x9]
-	cbnz	w10, .LBB16_328
+	ldrb	w10, [x21, x9]
+	cbnz	w10, .LBB16_243
 	ldur	x10, [x29, #-64]
 	ldrb	w10, [x10, x9]
 	cmp	w10, #240
-	b.ne	.LBB16_328
+	b.ne	.LBB16_243
 	sub	w10, w8, #40
 	strb	w10, [x23, x9]
-.LBB16_328:
-	sub	w9, w20, #1
+.LBB16_243:
+	sub	w9, w19, #1
 	sxtw	x9, w9
-	ldrb	w10, [x27, x9]
-	cbnz	w10, .LBB16_331
+	ldrb	w10, [x21, x9]
+	cbnz	w10, .LBB16_246
 	ldur	x10, [x29, #-64]
 	ldrb	w10, [x10, x9]
 	cmp	w10, #240
-	b.ne	.LBB16_331
+	b.ne	.LBB16_246
 	sub	w10, w8, #40
 	strb	w10, [x23, x9]
-.LBB16_331:
-	add	w9, w20, #1
+.LBB16_246:
+	add	w9, w19, #1
 	sxtw	x9, w9
-	ldrb	w10, [x27, x9]
-	cbnz	w10, .LBB16_317
+	ldrb	w10, [x21, x9]
+	cbnz	w10, .LBB16_232
 	ldur	x10, [x29, #-64]
 	ldrb	w10, [x10, x9]
 	cmp	w10, #240
-	b.ne	.LBB16_317
+	b.ne	.LBB16_232
 	sub	w8, w8, #40
 	strb	w8, [x23, x9]
-	b	.LBB16_317
-.LBB16_334:
+	b	.LBB16_232
+.LBB16_249:
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_340
+	cbz	w8, .LBB16_255
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_409
-.LBB16_336:
+	b.ge	.LBB16_410
+.LBB16_251:
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_337:
+.LBB16_252:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
@@ -4649,31 +4244,31 @@ ebc_thread:
 	bl	prepare_to_wait_event
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_359
-	cbnz	x0, .LBB16_360
+	cbz	w8, .LBB16_274
+	cbnz	x0, .LBB16_275
 	bl	schedule
-	b	.LBB16_337
-.LBB16_340:
-	ldr	x8, [x19, #432]
-	ldr	w9, [x20, #40]
+	b	.LBB16_252
+.LBB16_255:
+	ldr	x8, [x20, #432]
+	ldr	w9, [x19, #40]
 	ldr	w8, [x8, #40]
 	cmp	w9, w8
-	b.eq	.LBB16_347
+	b.eq	.LBB16_262
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_347
+	cbz	w8, .LBB16_262
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_411
-.LBB16_343:
+	b.ge	.LBB16_412
+.LBB16_258:
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_344:
+.LBB16_259:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
@@ -4681,46 +4276,46 @@ ebc_thread:
 	bl	prepare_to_wait_event
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbz	w8, .LBB16_359
-	cbnz	x0, .LBB16_360
+	cbz	w8, .LBB16_274
+	cbnz	x0, .LBB16_275
 	bl	schedule
-	b	.LBB16_344
-.LBB16_347:
-	ldr	w8, [x19, #308]
-	mov	w4, #255
-	ldr	w9, [x19, #304]
+	b	.LBB16_259
+.LBB16_262:
+	ldr	w8, [x20, #308]
+	ldr	w9, [x20, #304]
 	add	w10, w8, #7
 	cmp	w8, #0
 	csel	w13, w10, w8, lt
 	cmp	w9, #1
-	b.lt	.LBB16_362
+	b.lt	.LBB16_277
 	mov	w10, wzr
-	ldr	x11, [x19, #384]
-	ldr	x12, [x20, #16]
+	ldr	x11, [x20, #384]
+	ldr	x12, [x19, #16]
 	asr	w13, w13, #3
-	ldr	x14, [x19, #360]
-	b	.LBB16_350
-.LBB16_349:
+	ldr	x14, [x20, #360]
+	b	.LBB16_265
+.LBB16_264:
 	add	w10, w10, #1
 	cmp	w10, w9
-	b.eq	.LBB16_362
-.LBB16_350:
+	b.eq	.LBB16_277
+.LBB16_265:
 	cmp	w8, #8
-	b.lt	.LBB16_349
+	b.lt	.LBB16_264
 	mov	w15, w13
-	b	.LBB16_353
-.LBB16_352:
+	b	.LBB16_268
+.LBB16_267:
 	add	x14, x14, #8
 	subs	w15, w15, #1
-	b.eq	.LBB16_349
-.LBB16_353:
+	b.eq	.LBB16_264
+.LBB16_268:
 	ldr	x16, [x12], #8
 	ldr	x17, [x14]
 	ldr	x0, [x11], #8
 	cmp	x16, x17
-	b.eq	.LBB16_352
+	b.eq	.LBB16_267
 	tst	x0, #0xff
-	csel	x1, x4, xzr, eq
+	mov	w1, #255
+	csel	x1, x1, xzr, eq
 	tst	x0, #0xff00
 	orr	x2, x1, #0xff00
 	csel	x1, x2, x1, eq
@@ -4747,8 +4342,8 @@ ebc_thread:
 	and	x16, x0, x16
 	orr	x16, x17, x16
 	str	x16, [x14]
-	b	.LBB16_352
-.LBB16_355:
+	b	.LBB16_267
+.LBB16_270:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.77
 	add	x1, x1, :lo12:.L.str.77
@@ -4756,103 +4351,506 @@ ebc_thread:
 	bl	_dev_info
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbnz	w8, .LBB16_31
-	b	.LBB16_44
-.LBB16_356:
+	cbnz	w8, .LBB16_30
+	b	.LBB16_43
+.LBB16_271:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.78
 	add	x1, x1, :lo12:.L.str.78
 	ldr	x0, [x8]
 	bl	_dev_info
 	mov	w3, #1
-	b	.LBB16_45
-.LBB16_357:
+	b	.LBB16_44
+.LBB16_272:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.82
 	add	x1, x1, :lo12:.L.str.82
-.LBB16_358:
+.LBB16_273:
 	ldr	x0, [x8]
 	bl	_dev_info
 	mov	w3, #1
-	b	.LBB16_187
-.LBB16_359:
+	b	.LBB16_105
+.LBB16_274:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
-.LBB16_360:
+.LBB16_275:
 	ldur	x8, [x29, #-56]
 	ldr	w8, [x8]
 	cmp	w8, #1
-	b.ge	.LBB16_400
-.LBB16_361:
-	ldr	x8, [x19, #440]
-	ldr	x0, [x19, #360]
-	ldrsw	x2, [x19, #252]
+	b.ge	.LBB16_401
+.LBB16_276:
+	ldr	x8, [x20, #440]
+	ldr	x0, [x20, #360]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
 	mov	w3, #1
-.LBB16_362:
-	ldr	w8, [x19, #276]
+.LBB16_277:
+	ldr	w8, [x20, #276]
 	mov	w9, #3
-	str	w9, [x19, #464]
+	str	w9, [x20, #464]
 	cbnz	w8, .LBB16_407
-	str	w3, [x19, #276]
-	mov	x0, x19
-	ldr	w1, [x20, #40]
+	str	w3, [x20, #276]
+	mov	x0, x20
+	ldr	w1, [x19, #40]
 	mov	w2, wzr
 	bl	ebc_lut_update
-	ldr	w9, [x19, #800]
-	ldr	w8, [x19, #328]
+	ldr	w9, [x20, #800]
+	ldr	w8, [x20, #328]
 	cmp	w9, #1
-	strh	w8, [x19, #280]
-	b.ge	.LBB16_389
-.LBB16_364:
-	mov	x0, x19
+	strh	w8, [x20, #280]
+	b.ge	.LBB16_390
+.LBB16_279:
+	mov	x0, x20
 	bl	ebc_frame_start
 	b	.LBB16_406
-.LBB16_365:
-	mov	x0, x19
+.LBB16_280:
+	ldr	w8, [x20, #252]
+	add	w9, w8, #7
+	cmp	w8, #0
+	csel	w9, w9, w8, lt
+	cmp	w8, #8
+	b.lt	.LBB16_284
+	ldr	x10, [x20, #432]
+	asr	w9, w9, #3
+	ldr	x1, [x10, #16]
+	ldr	x10, [x19, #16]
+	mov	x11, x1
+.LBB16_282:
+	ldr	x12, [x10]
+	ldr	x13, [x11]
+	cmp	x12, x13
+	b.ne	.LBB16_147
+	add	x11, x11, #8
+	add	x10, x10, #8
+	subs	w9, w9, #1
+	b.ne	.LBB16_282
+.LBB16_284:
+	ldur	x8, [x29, #-56]
+	ldr	w8, [x8]
+	cmp	w8, #1
+	b.lt	.LBB16_105
+	ldr	x8, [sp, #40]
+	adrp	x1, .L.str.84
+	add	x1, x1, :lo12:.L.str.84
+	b	.LBB16_273
+.LBB16_286:
+	mov	x0, x20
 	mov	w1, wzr
 	bl	ebc_power_set
-	ldr	w8, [x19, #312]
+	ldr	w8, [x20, #312]
 	cbnz	w8, .LBB16_20
-.LBB16_366:
+.LBB16_287:
 	sub	x0, x29, #40
 	mov	w1, wzr
 	stp	xzr, xzr, [x29, #-16]
 	stp	xzr, xzr, [x29, #-32]
 	stur	xzr, [x29, #-40]
 	bl	init_wait_entry
-.LBB16_367:
+.LBB16_288:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w8, [x19, #312]
-	cbnz	w8, .LBB16_377
+	ldr	w8, [x20, #312]
+	cbnz	w8, .LBB16_378
 	cbnz	x0, .LBB16_20
 	bl	schedule
-	b	.LBB16_367
-.LBB16_370:
-.LBB16_371:
-	ldr	x0, [x19, #368]
+	b	.LBB16_288
+.LBB16_291:
+.LBB16_292:
+	ldr	x0, [x20, #368]
 	sxtw	x2, w8
 	bl	memcpy
-	ldr	x8, [x19, #440]
-	ldr	x0, [x19, #360]
-	ldrsw	x2, [x19, #252]
+	ldr	x8, [x20, #440]
+	ldr	x0, [x20, #360]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	str	wzr, [x19, #784]
-	str	wzr, [x19, #776]
-	b	.LBB16_27
+	str	wzr, [x20, #784]
+	str	wzr, [x20, #776]
+.LBB16_293:
+	mov	w8, #4
+	str	x19, [x20, #456]
+	ldr	w9, [x20, #308]
+	mov	w26, #1
+	str	w8, [x20, #464]
+	ldp	w10, w8, [x19, #48]
+	ldp	w12, w14, [x19, #56]
+	add	w11, w10, #7
+	cmp	w10, #0
+	add	w13, w12, #7
+	csel	w11, w11, w10, lt
+	cmp	w12, #0
+	add	w10, w9, #7
+	csel	w12, w13, w12, lt
+	cmp	w9, #0
+	asr	w15, w12, #3
+	csel	w12, w10, w9, lt
+	ldr	w10, [x20, #304]
+	add	w9, w15, #1
+	asr	w13, w12, #3
+	sub	w16, w13, #1
+	cmp	w9, w13
+	csinc	w9, w16, w15, ge
+	sub	w15, w10, #1
+	cmp	w14, w10
+	csel	w10, w14, w15, lt
+	cmp	w8, w10
+	b.le	.LBB16_298
+.LBB16_294:
+	ldur	x8, [x29, #-48]
+	ldr	w8, [x8]
+	cbz	w8, .LBB16_372
+	adrp	x8, ebc_auto_task
+	ldr	x0, [x8, :lo12:ebc_auto_task]
+	bl	wake_up_process
+	ldr	x0, [x20, #448]
+	cbz	x0, .LBB16_297
+.LBB16_296:
+	bl	ebc_buf_release
+.LBB16_297:
+	ldr	x8, [x20, #456]
+	str	x8, [x20, #448]
+	b	.LBB16_3
+.LBB16_298:
+	ldr	x14, [x20, #440]
+	mul	w13, w13, w8
+	ldp	x16, x15, [x20, #384]
+	sxtw	x13, w13
+	asr	w11, w11, #3
+	ldr	x14, [x14, #16]
+	lsl	x0, x13, #3
+	ldr	x17, [x19, #16]
+	sbfx	x2, x12, #3, #29
+	ldr	x1, [x20, #360]
+	add	x13, x16, x0
+	add	x12, x15, x0
+	add	x14, x14, x0
+	add	x15, x17, x0
+	sxtw	x17, w11
+	add	x16, x1, x0
+	add	w0, w9, #1
+	sxtw	x0, w0
+	lsl	x1, x2, #3
+	b	.LBB16_300
+.LBB16_299:
+	add	w8, w8, #1
+	add	x12, x12, x1
+	add	x13, x13, x1
+	add	x14, x14, x1
+	add	x15, x15, x1
+	add	x16, x16, x1
+	cmp	w8, w10
+	b.gt	.LBB16_294
+.LBB16_300:
+	cmp	w11, w9
+	b.gt	.LBB16_299
+	mov	x2, x17
+	b	.LBB16_304
+.LBB16_302:
+	lsr	x19, x5, #56
+	orr	x21, x4, #0x100000000000000
+	cmp	x19, #240
+	orr	x7, x7, #0xff00000000000000
+	csel	x4, x21, x4, eq
+.LBB16_303:
+	bic	x6, x6, x7
+	and	x5, x7, x5
+	add	x2, x2, #1
+	orr	x5, x6, x5
+	cmp	x0, x2
+	str	x4, [x12, x3]
+	str	x5, [x16, x3]
+	b.eq	.LBB16_299
+.LBB16_304:
+	lsl	x3, x2, #3
+	ldr	x27, [x13, x3]
+	ldr	x6, [x16, x3]
+	ldr	x19, [x15, x3]
+	ldr	x5, [x14, x3]
+	ldr	x4, [x12, x3]
+	tst	x27, #0xff
+	b.eq	.LBB16_306
+	mov	x7, xzr
+	b	.LBB16_308
+.LBB16_306:
+	and	x4, x4, #0xffffffffffffff00
+	and	x21, x19, #0xf0
+	cmp	w21, #240
+	b.ne	.LBB16_331
+	and	x7, x5, #0xff
+	cmp	x7, #240
+	cset	w7, eq
+	orr	x4, x4, x7
+	mov	w7, #255
+.LBB16_308:
+	tst	x27, #0xff00
+	b.eq	.LBB16_315
+	tst	x27, #0xff0000
+	b.eq	.LBB16_317
+.LBB16_310:
+	tst	x27, #0xff000000
+	b.eq	.LBB16_319
+.LBB16_311:
+	tst	x27, #0xff00000000
+	b.eq	.LBB16_321
+.LBB16_312:
+	tst	x27, #0xff0000000000
+	b.eq	.LBB16_323
+.LBB16_313:
+	tst	x27, #0xff000000000000
+	b.eq	.LBB16_325
+.LBB16_314:
+	lsr	x21, x27, #56
+	cbnz	x21, .LBB16_303
+	b	.LBB16_327
+.LBB16_315:
+	and	x4, x4, #0xffffffffffff00ff
+	and	x21, x19, #0xf000
+	cmp	w21, #15, lsl #12
+	b.ne	.LBB16_333
+	and	x21, x5, #0xff00
+	orr	x23, x4, #0x100
+	cmp	x21, #15, lsl #12
+	orr	x7, x7, #0xff00
+	csel	x4, x23, x4, eq
+	tst	x27, #0xff0000
+	b.ne	.LBB16_310
+.LBB16_317:
+	and	x4, x4, #0xffffffffff00ffff
+	and	x21, x19, #0xf00000
+	cmp	x21, #3840, lsl #12
+	b.ne	.LBB16_337
+	and	x21, x5, #0xff0000
+	orr	x23, x4, #0x10000
+	cmp	x21, #3840, lsl #12
+	orr	x7, x7, #0xff0000
+	csel	x4, x23, x4, eq
+	tst	x27, #0xff000000
+	b.ne	.LBB16_311
+.LBB16_319:
+	and	x4, x4, #0xffffffff00ffffff
+	and	x21, x19, #0xf0000000
+	cmp	w21, w25
+	b.ne	.LBB16_341
+	and	x21, x5, #0xff000000
+	orr	x23, x4, #0x1000000
+	cmp	x21, x25
+	orr	x7, x7, #0xff000000
+	csel	x4, x23, x4, eq
+	tst	x27, #0xff00000000
+	b.ne	.LBB16_312
+.LBB16_321:
+	and	x4, x4, #0xffffff00ffffffff
+	and	x21, x19, #0xf000000000
+	cmp	x21, x28
+	b.ne	.LBB16_343
+	and	x21, x5, #0xff00000000
+	orr	x23, x4, #0x100000000
+	cmp	x21, x28
+	orr	x7, x7, #0xff00000000
+	csel	x4, x23, x4, eq
+	tst	x27, #0xff0000000000
+	b.ne	.LBB16_313
+.LBB16_323:
+	and	x4, x4, #0xffff00ffffffffff
+	and	x21, x19, #0xf00000000000
+	cmp	x21, x24
+	b.ne	.LBB16_345
+	and	x21, x5, #0xff0000000000
+	orr	x23, x4, #0x10000000000
+	cmp	x21, x24
+	orr	x7, x7, #0xff0000000000
+	csel	x4, x23, x4, eq
+	tst	x27, #0xff000000000000
+	b.ne	.LBB16_314
+.LBB16_325:
+	and	x4, x4, #0xff00ffffffffffff
+	and	x21, x19, #0xf0000000000000
+	cmp	x21, x22
+	b.ne	.LBB16_347
+	and	x21, x5, #0xff000000000000
+	orr	x23, x4, #0x1000000000000
+	cmp	x21, x22
+	orr	x7, x7, #0xff000000000000
+	csel	x4, x23, x4, eq
+	lsr	x21, x27, #56
+	cbnz	x21, .LBB16_303
+.LBB16_327:
+	and	x4, x4, #0xffffffffffffff
+	lsr	x21, x19, #60
+	cmp	x21, #15
+	b.hs	.LBB16_302
+	and	x19, x19, #0xf000000000000000
+	mov	x21, #-2305843009213693952
+	cmp	x19, x21
+	b.eq	.LBB16_363
+	and	x6, x6, #0xffffffffffffff
+	cbnz	x19, .LBB16_364
+	orr	x4, x4, #0x100000000000000
+	b	.LBB16_303
+.LBB16_331:
+	cbnz	w21, .LBB16_349
+	mov	x7, xzr
+	and	x6, x6, #0xffffffffffffff00
+	orr	x4, x4, #0x1
+	b	.LBB16_308
+.LBB16_333:
+	and	x6, x6, #0xffffffffffff00ff
+	cbz	w21, .LBB16_336
+	cmp	w21, #14, lsl #12
+	b.ne	.LBB16_365
+	orr	x6, x6, #0xf000
+.LBB16_336:
+	orr	x4, x4, #0x100
+	tst	x27, #0xff0000
+	b.ne	.LBB16_310
+	b	.LBB16_317
+.LBB16_337:
+	and	x6, x6, #0xffffffffff00ffff
+	cbz	x21, .LBB16_340
+	cmp	x21, #3584, lsl #12
+	b.ne	.LBB16_366
+	orr	x6, x6, #0xf00000
+.LBB16_340:
+	orr	x4, x4, #0x10000
+	tst	x27, #0xff000000
+	b.ne	.LBB16_311
+	b	.LBB16_319
+.LBB16_341:
+	cbnz	w21, .LBB16_351
+	and	x6, x6, #0xffffffff00ffffff
+	b	.LBB16_353
+.LBB16_343:
+	cbnz	x21, .LBB16_354
+	and	x6, x6, #0xffffff00ffffffff
+	b	.LBB16_356
+.LBB16_345:
+	cbnz	x21, .LBB16_357
+	and	x6, x6, #0xffff00ffffffffff
+	b	.LBB16_359
+.LBB16_347:
+	cbnz	x21, .LBB16_360
+	and	x6, x6, #0xff00ffffffffffff
+	b	.LBB16_362
+.LBB16_349:
+	cmp	w21, #224
+	b.ne	.LBB16_367
+	and	x6, x6, #0xffffffffffffff00
+	mov	x7, xzr
+	orr	x6, x6, #0xf0
+	orr	x4, x4, #0x1
+	b	.LBB16_308
+.LBB16_351:
+	and	x6, x6, #0xffffffff00ffffff
+	mov	w23, #-536870912
+	cmp	w21, w23
+	b.ne	.LBB16_368
+	orr	x6, x6, #0xf0000000
+.LBB16_353:
+	orr	x4, x4, #0x1000000
+	tst	x27, #0xff00000000
+	b.ne	.LBB16_312
+	b	.LBB16_321
+.LBB16_354:
+	and	x6, x6, #0xffffff00ffffffff
+	mov	x23, #962072674304
+	cmp	x21, x23
+	b.ne	.LBB16_369
+	orr	x6, x6, #0xf000000000
+.LBB16_356:
+	orr	x4, x4, #0x100000000
+	tst	x27, #0xff0000000000
+	b.ne	.LBB16_313
+	b	.LBB16_323
+.LBB16_357:
+	and	x6, x6, #0xffff00ffffffffff
+	mov	x23, #246290604621824
+	cmp	x21, x23
+	b.ne	.LBB16_370
+	orr	x6, x6, #0xf00000000000
+.LBB16_359:
+	orr	x4, x4, #0x10000000000
+	tst	x27, #0xff000000000000
+	b.ne	.LBB16_314
+	b	.LBB16_325
+.LBB16_360:
+	and	x6, x6, #0xff00ffffffffffff
+	mov	x23, #63050394783186944
+	cmp	x21, x23
+	b.ne	.LBB16_371
+	orr	x6, x6, #0xf0000000000000
+.LBB16_362:
+	orr	x4, x4, #0x1000000000000
+	lsr	x21, x27, #56
+	cbnz	x21, .LBB16_303
+	b	.LBB16_327
+.LBB16_363:
+	mov	x19, #-1152921504606846976
+	orr	x4, x4, #0x100000000000000
+	bfxil	x19, x6, #0, #56
+	mov	x6, x19
+	b	.LBB16_303
+.LBB16_364:
+	orr	x6, x6, x19
+	b	.LBB16_303
+.LBB16_365:
+	orr	x6, x6, x21
+	tst	x27, #0xff0000
+	b.ne	.LBB16_310
+	b	.LBB16_317
+.LBB16_366:
+	orr	x6, x6, x21
+	tst	x27, #0xff000000
+	b.ne	.LBB16_311
+	b	.LBB16_319
+.LBB16_367:
+	and	x6, x6, #0xffffffffffffff00
+	mov	x7, xzr
+	orr	x6, x21, x6
+	b	.LBB16_308
+.LBB16_368:
+	orr	x6, x6, x21
+	tst	x27, #0xff00000000
+	b.ne	.LBB16_312
+	b	.LBB16_321
+.LBB16_369:
+	orr	x6, x6, x21
+	tst	x27, #0xff0000000000
+	b.ne	.LBB16_313
+	b	.LBB16_323
+.LBB16_370:
+	orr	x6, x6, x21
+	tst	x27, #0xff000000000000
+	b.ne	.LBB16_314
+	b	.LBB16_325
+.LBB16_371:
+	orr	x6, x6, x21
+	lsr	x21, x27, #56
+	cbnz	x21, .LBB16_303
+	b	.LBB16_327
 .LBB16_372:
-	ldr	x0, [x19, #368]
-	bl	memcpy
-	b	.LBB16_228
+	mov	x0, x20
+	mov	w1, #1
+	mov	w2, wzr
+	str	w26, [x20, #276]
+	bl	ebc_lut_update
+	ldr	w9, [x20, #800]
+	ldr	w8, [x20, #328]
+	cmp	w9, #1
+	strh	w8, [x20, #280]
+	b.ge	.LBB16_374
 .LBB16_373:
+	mov	x0, x20
+	bl	ebc_frame_start
+	ldr	x0, [x20, #448]
+	cbnz	x0, .LBB16_296
+	b	.LBB16_297
+.LBB16_374:
 	ldr	x9, [sp, #40]
 	adrp	x1, .L.str.76
 	and	w2, w8, #0xff
@@ -4860,17 +4858,17 @@ ebc_thread:
 	add	x1, x1, :lo12:.L.str.76
 	ldr	x0, [x9]
 	bl	_dev_info
-	b	.LBB16_146
-.LBB16_374:
-	ldr	x9, [x19, #440]
+	b	.LBB16_373
+.LBB16_375:
+	ldr	x9, [x20, #440]
 	adrp	x1, .L.str.79
-	ldr	x0, [x19, #320]
+	ldr	x0, [x20, #320]
 	and	w3, w8, #0xff
 	add	x1, x1, :lo12:.L.str.79
 	ldr	w2, [x9, #40]
 	bl	_dev_info
-	b	.LBB16_178
-.LBB16_375:
+	b	.LBB16_96
+.LBB16_376:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.77
 	add	x1, x1, :lo12:.L.str.77
@@ -4878,140 +4876,132 @@ ebc_thread:
 	bl	_dev_info
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbnz	w8, .LBB16_158
-	b	.LBB16_175
-.LBB16_376:
+	cbnz	w8, .LBB16_76
+	b	.LBB16_93
+.LBB16_377:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.78
 	add	x1, x1, :lo12:.L.str.78
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_176
-.LBB16_377:
+	b	.LBB16_94
+.LBB16_378:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
 	b	.LBB16_20
-.LBB16_378:
+.LBB16_379:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.74
 	add	x1, x1, :lo12:.L.str.74
 	ldr	x0, [x8]
 	bl	_dev_info
-	mov	w26, #1
-	b	.LBB16_65
-.LBB16_379:
+	b	.LBB16_64
 .LBB16_380:
-	ldr	x0, [x19, #368]
+.LBB16_381:
+	ldr	x0, [x20, #368]
 	sxtw	x2, w8
 	bl	memcpy
-	ldr	x8, [x19, #440]
-	ldr	x0, [x19, #360]
-	ldrsw	x2, [x19, #252]
+	ldr	x8, [x20, #440]
+	ldr	x0, [x20, #360]
+	ldrsw	x2, [x20, #252]
 	ldr	x1, [x8, #16]
 	bl	memcpy
-	str	wzr, [x19, #784]
+	str	wzr, [x20, #784]
 	mov	w3, #1
-	str	wzr, [x19, #776]
-	b	.LBB16_362
-.LBB16_381:
+	str	wzr, [x20, #776]
+	b	.LBB16_277
+.LBB16_382:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.74
 	add	x1, x1, :lo12:.L.str.74
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_153
-.LBB16_382:
-	ldr	x8, [sp, #40]
-	adrp	x1, .L.str.80
-	add	x1, x1, :lo12:.L.str.80
-	ldr	x0, [x8]
-	bl	_dev_info
-	b	.LBB16_215
+	b	.LBB16_71
 .LBB16_383:
-	ldr	x8, [sp, #40]
-	adrp	x1, .L.str.85
-	add	x1, x1, :lo12:.L.str.85
-	ldr	x0, [x8]
-	bl	_dev_info
-	b	.LBB16_226
-.LBB16_384:
 	mov	w8, #3
-.LBB16_385:
-	cbnz	x0, .LBB16_310
+.LBB16_384:
+	cbnz	x0, .LBB16_225
 	mov	x0, x8
 	bl	schedule_timeout
-	mov	x20, x0
+	mov	x19, x0
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w9, [x19, #312]
-	cmp	x20, #0
+	ldr	w9, [x20, #312]
+	cmp	x19, #0
 	ccmp	w9, #0, #4, eq
-	csinc	x8, x20, xzr, eq
-	cbnz	w9, .LBB16_309
-	cbnz	x8, .LBB16_385
-	b	.LBB16_309
+	csinc	x8, x19, xzr, eq
+	cbnz	w9, .LBB16_224
+	cbnz	x8, .LBB16_384
+	b	.LBB16_224
+.LBB16_387:
+	ldr	x8, [sp, #40]
+	adrp	x1, .L.str.80
+	add	x1, x1, :lo12:.L.str.80
+	ldr	x0, [x8]
+	bl	_dev_info
+	b	.LBB16_133
 .LBB16_388:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.90
 	add	x1, x1, :lo12:.L.str.90
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_301
+	b	.LBB16_216
 .LBB16_389:
+	ldr	x8, [sp, #40]
+	adrp	x1, .L.str.85
+	add	x1, x1, :lo12:.L.str.85
+	ldr	x0, [x8]
+	bl	_dev_info
+	b	.LBB16_143
+.LBB16_390:
 	ldr	x9, [sp, #40]
 	adrp	x1, .L.str.81
 	and	w2, w8, #0xff
 	add	x1, x1, :lo12:.L.str.81
 	ldr	x0, [x9]
 	bl	_dev_info
-	b	.LBB16_364
-.LBB16_390:
+	b	.LBB16_279
+.LBB16_391:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.94
 	add	x1, x1, :lo12:.L.str.94
 	ldr	x0, [x8]
 	bl	_dev_err
 	b	.LBB16_7
-.LBB16_391:
-	ldr	x8, [sp, #40]
-	adrp	x1, .L.str.75
-	add	x1, x1, :lo12:.L.str.75
-	ldr	x0, [x8]
-	bl	_dev_info
-	b	.LBB16_203
 .LBB16_392:
-	ldr	x23, [x19, #368]
+	ldr	x23, [x20, #368]
 .LBB16_393:
-	ldr	x8, [x19, #432]
+	ldr	x8, [x20, #432]
 	mov	x1, x23
-	ldrsw	x2, [x19, #252]
+	ldrsw	x2, [x20, #252]
 	ldr	x0, [x8, #16]
 	bl	memcpy
-	ldr	w8, [x19, #800]
+	ldr	w8, [x20, #800]
 	mov	w9, #13
-	ldur	x20, [x29, #-48]
+	ldur	x19, [x29, #-48]
 	cmp	w8, #1
 	mov	w8, #1
-	strb	w9, [x19, #280]
-	str	w8, [x19, #276]
-	b.ge	.LBB16_413
+	strb	w9, [x20, #280]
+	str	w8, [x20, #276]
+	b.ge	.LBB16_414
 .LBB16_394:
-	mov	x0, x19
+	mov	x0, x20
 	bl	ebc_frame_start
 	adrp	x8, jiffies
 	ldr	x8, [x8, :lo12:jiffies]
 	ldr	x0, [sp, #72]
 	add	x1, x8, #750
 	bl	mod_timer
-	ldr	w8, [x19, #800]
+	ldr	w8, [x20, #800]
 	cmp	w8, #1
-	b.ge	.LBB16_414
-	ldr	w8, [x20]
+	b.ge	.LBB16_415
+	ldr	w8, [x19]
 	cbz	w8, .LBB16_403
 .LBB16_396:
 	sub	x0, x29, #40
@@ -5026,34 +5016,32 @@ ebc_thread:
 	add	x0, x0, :lo12:ebc_thread_wq
 	mov	w2, #1
 	bl	prepare_to_wait_event
-	ldr	w8, [x20]
+	ldr	w8, [x19]
 	cbz	w8, .LBB16_402
 	cbnz	x0, .LBB16_403
 	bl	schedule
 	b	.LBB16_397
 .LBB16_400:
+	ldr	x8, [sp, #40]
+	adrp	x1, .L.str.75
+	add	x1, x1, :lo12:.L.str.75
+	ldr	x0, [x8]
+	bl	_dev_info
+	b	.LBB16_121
+.LBB16_401:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.78
 	add	x1, x1, :lo12:.L.str.78
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_361
-.LBB16_401:
-	ldr	x8, [sp, #40]
-	adrp	x1, .L.str.83
-	add	x1, x1, :lo12:.L.str.83
-	ldr	x0, [x8]
-	bl	_dev_info
-	ldr	w8, [x20, #40]
-	mov	w3, #1
-	b	.LBB16_217
+	b	.LBB16_276
 .LBB16_402:
 	adrp	x0, ebc_thread_wq
 	sub	x1, x29, #40
 	add	x0, x0, :lo12:ebc_thread_wq
 	bl	finish_wait
 .LBB16_403:
-	str	wzr, [x19, #784]
+	str	wzr, [x20, #784]
 .LBB16_404:
 	adrp	x8, jiffies
 	mov	w9, #335544320
@@ -5065,28 +5053,21 @@ ebc_thread:
 .LBB16_406:
 	mov	w3, #1
 .LBB16_407:
-	ldr	w8, [x19, #668]
-	cbnz	w8, .LBB16_1
-	str	w3, [x19, #668]
+	ldr	w8, [x20, #668]
+	cbz	w8, .LBB16_1
+	ldr	x0, [x20, #432]
+	bl	ebc_buf_release
 	b	.LBB16_2
 .LBB16_409:
 	ldr	x8, [sp, #40]
-	adrp	x1, .L.str.77
-	add	x1, x1, :lo12:.L.str.77
+	adrp	x1, .L.str.83
+	add	x1, x1, :lo12:.L.str.83
 	ldr	x0, [x8]
 	bl	_dev_info
-	ldur	x8, [x29, #-48]
-	ldr	w8, [x8]
-	cbnz	w8, .LBB16_336
-	b	.LBB16_360
+	ldr	w8, [x19, #40]
+	mov	w3, #1
+	b	.LBB16_135
 .LBB16_410:
-	adrp	x1, .L.str.75
-	ldr	x0, [x19, #320]
-	add	x1, x1, :lo12:.L.str.75
-	bl	_dev_info
-	ldr	x9, [x19, #440]
-	b	.LBB16_170
-.LBB16_411:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.77
 	add	x1, x1, :lo12:.L.str.77
@@ -5094,31 +5075,48 @@ ebc_thread:
 	bl	_dev_info
 	ldur	x8, [x29, #-48]
 	ldr	w8, [x8]
-	cbnz	w8, .LBB16_343
-	b	.LBB16_360
+	cbnz	w8, .LBB16_251
+	b	.LBB16_275
+.LBB16_411:
+	adrp	x1, .L.str.75
+	ldr	x0, [x20, #320]
+	add	x1, x1, :lo12:.L.str.75
+	bl	_dev_info
+	ldr	x9, [x20, #440]
+	b	.LBB16_88
 .LBB16_412:
+	ldr	x8, [sp, #40]
+	adrp	x1, .L.str.77
+	add	x1, x1, :lo12:.L.str.77
+	ldr	x0, [x8]
+	bl	_dev_info
+	ldur	x8, [x29, #-48]
+	ldr	w8, [x8]
+	cbnz	w8, .LBB16_258
+	b	.LBB16_275
+.LBB16_413:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.92
 	add	x1, x1, :lo12:.L.str.92
 	ldr	x0, [x8]
 	bl	_dev_info
-	b	.LBB16_312
-.LBB16_413:
-	ldr	x8, [x19, #440]
+	b	.LBB16_227
+.LBB16_414:
+	ldr	x8, [x20, #440]
 	adrp	x1, .L.str.93
-	ldr	x0, [x19, #320]
+	ldr	x0, [x20, #320]
 	add	x1, x1, :lo12:.L.str.93
 	mov	w3, #13
 	ldr	w2, [x8, #40]
 	bl	_dev_info
 	b	.LBB16_394
-.LBB16_414:
+.LBB16_415:
 	ldr	x8, [sp, #40]
 	adrp	x1, .L.str.88
 	add	x1, x1, :lo12:.L.str.88
 	ldr	x0, [x8]
 	bl	_dev_info
-	ldr	w8, [x20]
+	ldr	w8, [x19]
 	cbnz	w8, .LBB16_396
 	b	.LBB16_403
 .Lfunc_end16:
@@ -12282,7 +12280,7 @@ ebc_pm:
 
 	.type	.L.str.2,@object
 .L.str.2:
-	.asciz	"7.10_y8"
+	.asciz	"7.11_y8"
 	.size	.L.str.2, 8
 
 	.type	.L.str.3,@object