From ea8f1b0e82c689e2866536a7f0331ccafea0f7e9 Mon Sep 17 00:00:00 2001 From: Hu Kejun Date: Tue, 9 Oct 2018 20:05:14 +0800 Subject: [PATCH] iommu/rockchip: add sclk On some platform, it needs aclk/hclk/sclk for using iommu. Change-Id: Iaf60124e225d418af8bbf1e0b4a31e907358fcfd Signed-off-by: Hu Kejun --- drivers/iommu/rockchip-iommu.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c index 8faade084316..fc9c6b670975 100644 --- a/drivers/iommu/rockchip-iommu.c +++ b/drivers/iommu/rockchip-iommu.c @@ -103,6 +103,7 @@ struct rk_iommu { struct iommu_domain *domain; /* domain to which iommu is attached */ struct clk *aclk; /* aclock belong to master */ struct clk *hclk; /* hclock belong to master */ + struct clk *sclk; /* sclock belong to master */ struct list_head dev_node; }; @@ -274,6 +275,9 @@ static void rk_iommu_power_on(struct rk_iommu *iommu) clk_enable(iommu->hclk); } + if (iommu->sclk) + clk_enable(iommu->sclk); + pm_runtime_get_sync(iommu->dev); } @@ -285,6 +289,9 @@ static void rk_iommu_power_off(struct rk_iommu *iommu) clk_disable(iommu->aclk); clk_disable(iommu->hclk); } + + if (iommu->sclk) + clk_disable(iommu->sclk); } static u32 rk_iova_dte_index(dma_addr_t iova) @@ -1345,11 +1352,20 @@ static int rk_iommu_probe(struct platform_device *pdev) iommu->hclk = NULL; } + iommu->sclk = devm_clk_get(dev, "sclk"); + if (IS_ERR(iommu->sclk)) { + dev_info(dev, "can't get sclk\n"); + iommu->sclk = NULL; + } + if (iommu->aclk && iommu->hclk) { clk_prepare(iommu->aclk); clk_prepare(iommu->hclk); } + if (iommu->sclk) + clk_prepare(iommu->sclk); + pm_runtime_enable(iommu->dev); pm_runtime_get_sync(iommu->dev); list_add(&iommu->dev_node, &iommu_dev_list);