ARM64: dts: rockchip: rk3399: add cpul/cpub assingment clk rate

set clk_cpul:816M clk_cpub:1008M when clk tree init

Change-Id: I8f493ce8479fc670aa05d651db5be354d6870c98
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>
This commit is contained in:
Elaine Zhang
2016-03-24 14:34:41 +08:00
committed by Jianqun Xu
parent 87488bd467
commit eaa3e7f6ab

View File

@@ -1291,6 +1291,7 @@
#clock-cells = <1>;
#reset-cells = <1>;
assigned-clocks =
<&cru ARMCLKL>, <&cru ARMCLKB>,
<&cru PLL_GPLL>, <&cru PLL_CPLL>,
<&cru PLL_NPLL>,
<&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
@@ -1302,6 +1303,7 @@
<&cru ACLK_GIC_PRE>,
<&cru PCLK_DDR>;
assigned-clock-rates =
<816000000>, <1008000000>,
<594000000>, <800000000>,
<1000000000>,
<150000000>, <75000000>,