From eaa3e7f6ab6fa9f76a630a0bc7852f0c4749531e Mon Sep 17 00:00:00 2001 From: Elaine Zhang Date: Thu, 24 Mar 2016 14:34:41 +0800 Subject: [PATCH] ARM64: dts: rockchip: rk3399: add cpul/cpub assingment clk rate set clk_cpul:816M clk_cpub:1008M when clk tree init Change-Id: I8f493ce8479fc670aa05d651db5be354d6870c98 Signed-off-by: Elaine Zhang Signed-off-by: Jianqun Xu --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index c88e603396f6..5508da233294 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -1291,6 +1291,7 @@ #clock-cells = <1>; #reset-cells = <1>; assigned-clocks = + <&cru ARMCLKL>, <&cru ARMCLKB>, <&cru PLL_GPLL>, <&cru PLL_CPLL>, <&cru PLL_NPLL>, <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>, @@ -1302,6 +1303,7 @@ <&cru ACLK_GIC_PRE>, <&cru PCLK_DDR>; assigned-clock-rates = + <816000000>, <1008000000>, <594000000>, <800000000>, <1000000000>, <150000000>, <75000000>,