From eabde4b76f74ae953056d87d28a874d695e2c210 Mon Sep 17 00:00:00 2001 From: Shawn Lin Date: Thu, 12 Nov 2020 17:55:27 +0800 Subject: [PATCH] phy: phy-rockchip-snps-pcie3: Fix PMA output clamp mode PMA output clamp mode should be configured. Change-Id: I3f622d8dbde00b7f91caf9ba1c3868d6f9ad8d3e Signed-off-by: Shawn Lin --- drivers/phy/rockchip/phy-rockchip-snps-pcie3.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c index 15a0fe1860cc..c833209cf36f 100644 --- a/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c +++ b/drivers/phy/rockchip/phy-rockchip-snps-pcie3.c @@ -20,6 +20,7 @@ #define GRF_PCIE30PHY_CON1 0x4 #define GRF_PCIE30PHY_CON6 0x18 +#define GRF_PCIE30PHY_CON9 0x24 struct rockchip_p3phy_priv { void __iomem *mmio; @@ -78,6 +79,9 @@ static int rochchip_p3phy_init(struct phy *phy) reset_control_assert(priv->p30phy); udelay(1); + /* Deassert PCIe PMA output clamp mode */ + regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON9, + (0x1 << 15) | (0x1 << 31)); /* Set bifurcation if needed, and it doesn't care RC/EP */ if (priv->is_bifurcation) { regmap_write(priv->phy_grf, GRF_PCIE30PHY_CON6,