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arm64: dts: add kevin r1 and r2
Some pinctrl stuff has moved around and will be identical between gru and kevin going forward, so kevin r1-specific things will be stored in the kevin-r1 dts file. BUG=none TEST=kernel still boots on kevin-r1 Change-Id: If3e88a57acc40367afca34b5310a59efd70287f6 Signed-off-by: Stephen Barber <smbarber@chromium.org> Reviewed-on: https://chrome-internal-review.googlesource.com/256345 Commit-Ready: Stephen Barber <smbarber@google.com> Tested-by: Stephen Barber <smbarber@google.com> Reviewed-by: Doug Anderson <dianders@google.com> Signed-off-by: Caesar Wang <wxt@rock-chips.com>
This commit is contained in:
committed by
Huang, Tao
parent
8fedd9d578
commit
eb8a871c2c
@@ -6,7 +6,8 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb1-android.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-evb1-cros.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-fpga.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-gru.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r1.dtb
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dtb-$(CONFIG_ARCH_ROCKCHIP) += rk3399-gru-kevin-r2.dtb
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always := $(dtb-y)
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subdir-y := $(dts-dirs)
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100
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r1.dts
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100
arch/arm64/boot/dts/rockchip/rk3399-gru-kevin-r1.dts
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@@ -0,0 +1,100 @@
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/*
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* Google Gru-Kevin Rev 1+ board device tree source
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*
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* Copyright 2016 Google, Inc
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*
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* This file is dual-licensed: you can use it either under the terms
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* of the GPL or the X11 license, at your option. Note that this dual
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* licensing only applies to this file, and not this project as a
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* whole.
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*
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* a) This file is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This file is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Or, alternatively,
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*
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* b) Permission is hereby granted, free of charge, to any person
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* obtaining a copy of this software and associated documentation
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* files (the "Software"), to deal in the Software without
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* restriction, including without limitation the rights to use,
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* copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following
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* conditions:
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*
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* The above copyright notice and this permission notice shall be
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* included in all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
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* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
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* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
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* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*/
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/dts-v1/;
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#include "rk3399-gru.dtsi"
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/ {
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model = "Google Kevin Rev 1";
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compatible = "google,kevin-rev1", "google,kevin-rev0",
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"google,kevin", "google,veyron", "rockchip,rk3399";
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};
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&pp3000 {
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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};
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&pp1800_audio {
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gpio = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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};
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&pp1800_pcie {
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gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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};
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&sdmmc {
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cd-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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};
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&cros_ec {
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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};
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&ec_ap_int_l {
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rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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&pp1500_en {
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rockchip,pins = <RK_GPIO1 11 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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&pp1800_audio_en {
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rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO
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&pcfg_pull_none>;
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};
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&pp3000_en {
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rockchip,pins = <RK_GPIO1 12 RK_FUNC_GPIO
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&pcfg_pull_none>;
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};
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&wlan_module_pd_l {
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rockchip,pins = <RK_GPIO0 8 RK_FUNC_GPIO
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&pcfg_pull_none>;
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};
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/* This is where we actually hook up CD; has external pull */
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&sdmmc_cd_gpio {
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rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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@@ -1,5 +1,5 @@
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/*
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* Google Gru-Kevin Rev 0+ board device tree source
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* Google Gru-Kevin Rev 2+ board device tree source
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*
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* Copyright 2016 Google, Inc
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*
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@@ -54,7 +54,16 @@
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"google,kevin-rev7", "google,kevin-rev6",
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"google,kevin-rev5", "google,kevin-rev4",
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"google,kevin-rev3", "google,kevin-rev2",
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"google,kevin-rev1", "google,kevin-rev0",
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"google,kevin", "google,veyron", "rockchip,rk3399";
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};
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/* PINCTRL: always below everything else */
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&pinctrl {
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pen-eject {
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pen_eject_l: pen-eject-l {
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rockchip,pins = <RK_GPIO0 13 RK_FUNC_GPIO
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&pcfg_pull_up>;
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};
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};
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};
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@@ -129,7 +129,7 @@
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pinctrl-0 = <&pp3000_en>;
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enable-active-high;
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gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
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gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
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regulator-always-on;
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regulator-boot-on;
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@@ -350,7 +350,7 @@
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regulator-boot-on;
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enable-active-high;
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gpio = <&gpio0 1 GPIO_ACTIVE_HIGH>;
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gpio = <&gpio0 2 GPIO_ACTIVE_HIGH>;
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vin-supply = <&pp1800>;
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};
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@@ -364,7 +364,7 @@
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regulator-always-on; // TODO: for bringup???
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regulator-boot-on; // TODO: for bringup???
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enable-active-high;
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gpio = <&gpio0 8 GPIO_ACTIVE_HIGH>;
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gpio = <&gpio0 4 GPIO_ACTIVE_HIGH>;
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vin-supply = <&pp1800>;
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};
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@@ -707,7 +707,7 @@ ap_i2c_audio: &i2c8 {
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clock-freq-min-max = <400000 37500000>;
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bus-width = <4>;
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cd-gpios = <&gpio4 26 GPIO_ACTIVE_LOW>;
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cd-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
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disable-wp;
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cap-mmc-highspeed;
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@@ -789,7 +789,7 @@ ap_i2c_audio: &i2c8 {
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google,cros-ec-spi-pre-delay = <30>; // TODO: check
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interrupt-parent = <&gpio0>;
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interrupts = <2 IRQ_TYPE_LEVEL_LOW>;
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interrupts = <1 IRQ_TYPE_LEVEL_LOW>;
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spi-max-frequency = <3000000>; // TODO: check; TODO: rx-sample-delay-ns?
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i2c_tunnel: i2c-tunnel {
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@@ -953,19 +953,19 @@ ap_i2c_audio: &i2c8 {
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cros-ec {
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ec_ap_int_l: ec-ap-int-l {
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rockchip,pins = <0 2 RK_FUNC_GPIO &pcfg_pull_up>;
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rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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};
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discrete-regulators {
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pp1500_en: pp1500-en {
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rockchip,pins = <RK_GPIO1 11 RK_FUNC_GPIO
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rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO
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&pcfg_pull_none>;
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};
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pp1800_audio_en: pp1800-audio-en {
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rockchip,pins = <RK_GPIO0 1 RK_FUNC_GPIO
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&pcfg_pull_none>;
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rockchip,pins = <RK_GPIO0 2 RK_FUNC_GPIO
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&pcfg_pull_down>;
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};
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pp3300_disp_en: pp3300-disp-en {
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@@ -974,7 +974,7 @@ ap_i2c_audio: &i2c8 {
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};
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pp3000_en: pp3000-en {
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rockchip,pins = <RK_GPIO1 12 RK_FUNC_GPIO
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rockchip,pins = <RK_GPIO0 12 RK_FUNC_GPIO
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&pcfg_pull_none>;
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};
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@@ -994,8 +994,8 @@ ap_i2c_audio: &i2c8 {
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};
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wlan_module_pd_l: wlan-module-pd-l {
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rockchip,pins = <RK_GPIO0 8 RK_FUNC_GPIO
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&pcfg_pull_none>;
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rockchip,pins = <RK_GPIO0 4 RK_FUNC_GPIO
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&pcfg_pull_down>;
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};
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};
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@@ -1053,7 +1053,7 @@ ap_i2c_audio: &i2c8 {
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/* This is where we actually hook up CD; has external pull */
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sdmmc_cd_gpio: sdmmc-cd-gpio {
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rockchip,pins = <4 26 RK_FUNC_GPIO &pcfg_pull_none>;
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rockchip,pins = <4 24 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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