From ebac5559a8bb000f93113ab7ecc244b6d8a940de Mon Sep 17 00:00:00 2001 From: Sugar Zhang Date: Fri, 30 Jun 2023 18:14:06 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3308: Enable Schmitt-Trigger for pins I2Sx-CLK This patch enable Schmitt-Trigger for pins I2S-MCLK/BCLK/LRCK for clk noise reduction on slave mode which clk is provided by external devices. and this can make controllers work much more robust. Signed-off-by: Sugar Zhang Change-Id: I08b127b7f75f303c8da45973d068f57b9a6ebc62 --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 36 ++++++++-------- .../boot/dts/rockchip/rk3308bs-pinctrl.dtsi | 41 +++++++++++-------- 2 files changed, 41 insertions(+), 36 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 099d9448920c..79c2efc4433d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -1812,17 +1812,17 @@ i2s_2ch_0 { i2s_2ch_0_mclk: i2s-2ch-0-mclk { rockchip,pins = - <4 RK_PB4 1 &pcfg_pull_none>; + <4 RK_PB4 1 &pcfg_pull_none_smt>; }; i2s_2ch_0_sclk: i2s-2ch-0-sclk { rockchip,pins = - <4 RK_PB5 1 &pcfg_pull_none>; + <4 RK_PB5 1 &pcfg_pull_none_smt>; }; i2s_2ch_0_lrck: i2s-2ch-0-lrck { rockchip,pins = - <4 RK_PB6 1 &pcfg_pull_none>; + <4 RK_PB6 1 &pcfg_pull_none_smt>; }; i2s_2ch_0_sdo: i2s-2ch-0-sdo { @@ -1839,27 +1839,27 @@ i2s_8ch_0 { i2s_8ch_0_mclk: i2s-8ch-0-mclk { rockchip,pins = - <2 RK_PA4 1 &pcfg_pull_none>; + <2 RK_PA4 1 &pcfg_pull_none_smt>; }; i2s_8ch_0_sclktx: i2s-8ch-0-sclktx { rockchip,pins = - <2 RK_PA5 1 &pcfg_pull_none>; + <2 RK_PA5 1 &pcfg_pull_none_smt>; }; i2s_8ch_0_sclkrx: i2s-8ch-0-sclkrx { rockchip,pins = - <2 RK_PA6 1 &pcfg_pull_none>; + <2 RK_PA6 1 &pcfg_pull_none_smt>; }; i2s_8ch_0_lrcktx: i2s-8ch-0-lrcktx { rockchip,pins = - <2 RK_PA7 1 &pcfg_pull_none>; + <2 RK_PA7 1 &pcfg_pull_none_smt>; }; i2s_8ch_0_lrckrx: i2s-8ch-0-lrckrx { rockchip,pins = - <2 RK_PB0 1 &pcfg_pull_none>; + <2 RK_PB0 1 &pcfg_pull_none_smt>; }; i2s_8ch_0_sdo0: i2s-8ch-0-sdo0 { @@ -1906,27 +1906,27 @@ i2s_8ch_1_m0 { i2s_8ch_1_m0_mclk: i2s-8ch-1-m0-mclk { rockchip,pins = - <1 RK_PA2 2 &pcfg_pull_none>; + <1 RK_PA2 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m0_sclktx: i2s-8ch-1-m0-sclktx { rockchip,pins = - <1 RK_PA3 2 &pcfg_pull_none>; + <1 RK_PA3 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m0_sclkrx: i2s-8ch-1-m0-sclkrx { rockchip,pins = - <1 RK_PA4 2 &pcfg_pull_none>; + <1 RK_PA4 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m0_lrcktx: i2s-8ch-1-m0-lrcktx { rockchip,pins = - <1 RK_PA5 2 &pcfg_pull_none>; + <1 RK_PA5 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m0_lrckrx: i2s-8ch-1-m0-lrckrx { rockchip,pins = - <1 RK_PA6 2 &pcfg_pull_none>; + <1 RK_PA6 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m0_sdo0: i2s-8ch-1-m0-sdo0 { @@ -1958,27 +1958,27 @@ i2s_8ch_1_m1 { i2s_8ch_1_m1_mclk: i2s-8ch-1-m1-mclk { rockchip,pins = - <1 RK_PB4 2 &pcfg_pull_none>; + <1 RK_PB4 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m1_sclktx: i2s-8ch-1-m1-sclktx { rockchip,pins = - <1 RK_PB5 2 &pcfg_pull_none>; + <1 RK_PB5 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m1_sclkrx: i2s-8ch-1-m1-sclkrx { rockchip,pins = - <1 RK_PB6 2 &pcfg_pull_none>; + <1 RK_PB6 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m1_lrcktx: i2s-8ch-1-m1-lrcktx { rockchip,pins = - <1 RK_PB7 2 &pcfg_pull_none>; + <1 RK_PB7 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m1_lrckrx: i2s-8ch-1-m1-lrckrx { rockchip,pins = - <1 RK_PC0 2 &pcfg_pull_none>; + <1 RK_PC0 2 &pcfg_pull_none_smt>; }; i2s_8ch_1_m1_sdo0: i2s-8ch-1-m1-sdo0 { diff --git a/arch/arm64/boot/dts/rockchip/rk3308bs-pinctrl.dtsi b/arch/arm64/boot/dts/rockchip/rk3308bs-pinctrl.dtsi index 90dc2c17c771..038ed00c25c8 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308bs-pinctrl.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308bs-pinctrl.dtsi @@ -9,6 +9,11 @@ bias-disable; drive-strength-s = <4>; }; + pcfg_pull_none_0_4ma_smt: pcfg-pull-none-0-4ma-smt { + bias-disable; + drive-strength-s = <4>; + input-schmitt-enable; + }; pcfg_pull_up_0_4ma: pcfg-pull-up-0-4ma { bias-pull-up; drive-strength-s = <4>; @@ -127,17 +132,17 @@ i2s_2ch_0 { i2s_2ch_0_mclk: i2s-2ch-0-mclk { rockchip,pins = - <4 RK_PB4 1 &pcfg_pull_none>; + <4 RK_PB4 1 &pcfg_pull_none_smt>; }; i2s_2ch_0_sclk: i2s-2ch-0-sclk { rockchip,pins = - <4 RK_PB5 1 &pcfg_pull_none>; + <4 RK_PB5 1 &pcfg_pull_none_smt>; }; i2s_2ch_0_lrck: i2s-2ch-0-lrck { rockchip,pins = - <4 RK_PB6 1 &pcfg_pull_none_0_4ma>; + <4 RK_PB6 1 &pcfg_pull_none_0_4ma_smt>; }; i2s_2ch_0_sdo: i2s-2ch-0-sdo { @@ -154,27 +159,27 @@ i2s_8ch_0 { i2s_8ch_0_mclk: i2s-8ch-0-mclk { rockchip,pins = - <2 RK_PA4 1 &pcfg_pull_none_0_4ma>; + <2 RK_PA4 1 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_0_sclktx: i2s-8ch-0-sclktx { rockchip,pins = - <2 RK_PA5 1 &pcfg_pull_none_0_4ma>; + <2 RK_PA5 1 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_0_sclkrx: i2s-8ch-0-sclkrx { rockchip,pins = - <2 RK_PA6 1 &pcfg_pull_none_0_4ma>; + <2 RK_PA6 1 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_0_lrcktx: i2s-8ch-0-lrcktx { rockchip,pins = - <2 RK_PA7 1 &pcfg_pull_none_0_4ma>; + <2 RK_PA7 1 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_0_lrckrx: i2s-8ch-0-lrckrx { rockchip,pins = - <2 RK_PB0 1 &pcfg_pull_none_0_4ma>; + <2 RK_PB0 1 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_0_sdo0: i2s-8ch-0-sdo0 { @@ -222,27 +227,27 @@ i2s_8ch_1_m0 { i2s_8ch_1_m0_mclk: i2s-8ch-1-m0-mclk { rockchip,pins = - <1 RK_PA2 2 &pcfg_pull_none_0_4ma>; + <1 RK_PA2 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m0_sclktx: i2s-8ch-1-m0-sclktx { rockchip,pins = - <1 RK_PA3 2 &pcfg_pull_none_0_4ma>; + <1 RK_PA3 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m0_sclkrx: i2s-8ch-1-m0-sclkrx { rockchip,pins = - <1 RK_PA4 2 &pcfg_pull_none_0_4ma>; + <1 RK_PA4 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m0_lrcktx: i2s-8ch-1-m0-lrcktx { rockchip,pins = - <1 RK_PA5 2 &pcfg_pull_none_0_4ma>; + <1 RK_PA5 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m0_lrckrx: i2s-8ch-1-m0-lrckrx { rockchip,pins = - <1 RK_PA6 2 &pcfg_pull_none_0_4ma>; + <1 RK_PA6 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m0_sdo0: i2s-8ch-1-m0-sdo0 { @@ -274,27 +279,27 @@ i2s_8ch_1_m1 { i2s_8ch_1_m1_mclk: i2s-8ch-1-m1-mclk { rockchip,pins = - <1 RK_PB4 2 &pcfg_pull_none_0_4ma>; + <1 RK_PB4 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m1_sclktx: i2s-8ch-1-m1-sclktx { rockchip,pins = - <1 RK_PB5 2 &pcfg_pull_none_0_4ma>; + <1 RK_PB5 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m1_sclkrx: i2s-8ch-1-m1-sclkrx { rockchip,pins = - <1 RK_PB6 2 &pcfg_pull_none_0_4ma>; + <1 RK_PB6 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m1_lrcktx: i2s-8ch-1-m1-lrcktx { rockchip,pins = - <1 RK_PB7 2 &pcfg_pull_none_0_4ma>; + <1 RK_PB7 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m1_lrckrx: i2s-8ch-1-m1-lrckrx { rockchip,pins = - <1 RK_PC0 2 &pcfg_pull_none_0_4ma>; + <1 RK_PC0 2 &pcfg_pull_none_0_4ma_smt>; }; i2s_8ch_1_m1_sdo0: i2s-8ch-1-m1-sdo0 {