From ecb82b10b08955b77b6bed61261bf004a510e5a4 Mon Sep 17 00:00:00 2001 From: William Wu Date: Mon, 8 Apr 2019 10:29:50 +0800 Subject: [PATCH] arm64: dts: rockchip: fix pd_usb3 power domain for rk3399 dwc3 This patch assigns the pd_usb3 power domain to the parent of dwc3 node. Change-Id: I2074539c23f958041d8829f7b3826a7813c3631a Signed-off-by: William Wu --- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index f1da0ec48e4a..b67ed2387f7e 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -436,6 +436,7 @@ <&cru ACLK_USB3OTG0>, <&cru ACLK_USB3_GRF>; clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk"; + power-domains = <&power RK3399_PD_USB3>; resets = <&cru SRST_A_USB3_OTG0>; reset-names = "usb3-otg"; status = "disabled"; @@ -456,7 +457,6 @@ snps,xhci-slow-suspend-quirk; snps,xhci-trb-ent-quirk; snps,usb3-warm-reset-on-resume-quirk; - power-domains = <&power RK3399_PD_USB3>; status = "disabled"; }; }; @@ -470,6 +470,7 @@ <&cru ACLK_USB3OTG1>, <&cru ACLK_USB3_GRF>; clock-names = "ref_clk", "suspend_clk", "bus_clk", "grf_clk"; + power-domains = <&power RK3399_PD_USB3>; resets = <&cru SRST_A_USB3_OTG1>; reset-names = "usb3-otg"; status = "disabled"; @@ -490,7 +491,6 @@ snps,xhci-slow-suspend-quirk; snps,xhci-trb-ent-quirk; snps,usb3-warm-reset-on-resume-quirk; - power-domains = <&power RK3399_PD_USB3>; status = "disabled"; }; };