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https://github.com/hardkernel/linux.git
synced 2026-06-10 04:48:04 +09:00
rk2928 hdmi: remove unnecessary files and update low power mode
This commit is contained in:
yzq
@@ -55,12 +55,12 @@ static void rk2928_hdmi_set_pwr_mode(int mode)
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case LOWER_PWR:
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rk2928_hdmi_av_mute(0);
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rk2928_hdmi_sys_power_down();
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HDMIWrReg(0xe0, 0x0a);
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HDMIWrReg(0xe1, 0x03);
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HDMIWrReg(0xe2, 0x99);
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HDMIWrReg(0xe3, 0x0f);
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HDMIWrReg(0xe4, 0x00);
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HDMIWrReg(0xec, 0x02);
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HDMIWrReg(0xe0, 0x3a);
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HDMIWrReg(0xe1, 0x00);
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HDMIWrReg(0xe2, 0x00);
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HDMIWrReg(0xe3, 0x00);
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HDMIWrReg(0xe4, 0x03);
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HDMIWrReg(0xec, 0x03);
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break;
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default:
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hdmi_dbg(hdmi->dev,"unkown rk2928 hdmi pwr mode %d\n",mode);
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@@ -1,497 +0,0 @@
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#ifndef __RK2928_HDMI_HW_H__
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#define __RK2928_HDMI_HW_H__
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//0x00
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#define INT_POL 1
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#define SYS_PWR_ON 0
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#define SYS_PWR_OFF 1
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#define PHY_CLK 0
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#define SYS_CLK 1
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#define MCLK_FS 0x01 //256fs
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//0x01
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// INPUT_VIDEO_FORMAT
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#define RGB_YUV444 0x00
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#define DDR_RGB444_YUV444 0x05
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#define DDR_YUV422 0x06
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//0x02
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//video output format
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#define RGB444 0x00
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#define YUV444 0x01
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#define YUV422 0x02
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//DATA WIDTH
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#define DATA_12BIT 0X00
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#define DATA_10BIT 0X01
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#define DATA_8BIT 0X03
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//0X04
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//1:after 0:not After 1st sof for external DE sample
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#define DE_AFTER_SOF 0
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#define DE_NOAFTER_SOF 1
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#define CSC_ENABLE 0
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#define CSC_DISABLE 1
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//0X05
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#define CLEAR_AVMUTE(x) (x)<<7
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#define SET_AVMUTE(x) (x)<<6
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#define AUDIO_MUTE(x) (x)<<1
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#define VIDEO_BLACK(x) (x)<<0 //1:black 0:normal
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//0x08
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#define VSYNC_POL(x) (x)<<3 //0:Negative 1:Positive
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#define HSYNC_POL(x) (x)<<2 //0:Negative 1:Positive
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#define INTER_PROGRESSIVE(x) (x)<<1 //0: progressive 1:interlace
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#define VIDEO_SET_ENABLE(x) (x)<<0 //0:disable 1: enable
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/* 0xe1 */
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//Main-driver strength :0000~1111: the strength from low to high
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#define M_DRIVER_STR(x) (((x)&0xf)<<4)
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//Pre-driver strength :00~11: the strength from low to high
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#define P_DRIVER_STR(x) (((x)&3)<<2)
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//TX driver enable 1: enable 0: disable
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#define TX_DRIVER_EN(x) (((x)&1)<<1)
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/* 0xe2 */
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//Pre-emphasis strength 00~11: the strength from 0 to high
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#define P_EMPHASIS_STR(x) (((x)&3)<<4)
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//Power down TMDS driver 1: power down. 0: not
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#define PWR_DOWN_TMDS(x) (((x)&1)<<0)
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/* 0xe3 */
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//PLL out enable. Just for test. need set to 1’b0
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#define PLL_OUT_EN(x) (((x)&1)<<7)
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/* 0xe4 */
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// Band-Gap power down 11: power down 00: not
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#define BAND_PWR(x) (((x)&3)<<0)
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/* 0xe5 */
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//PLL disable 1: disable 0: enable
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#define PLL_PWR(x) (((x)&1)<<4)
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// PLL reset 1: reset 0: not
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#define PLL_RST(x) (((x)&1)<<3)
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//PHY TMDS channels reset 1: reset 0: not
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#define TMDS_RST(x) (((x)&1)<<2)
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/* 0xe7 */
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// PLL LDO power down 1: power down 0: not
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#define PLL_LDO_PWR(x) (((x)&1)<<2)
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enum PWR_MODE{
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NORMAL,
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LOWER_PWR,
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};
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#if 0
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/* HDMI_SYS_CONTROL */
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#define SYS_CTRL 0x0
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enum {
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PWR_SAVE_MODE_A = 1,
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PWR_SAVE_MODE_B = 2,
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PWR_SAVE_MODE_D = 4,
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PWR_SAVE_MODE_E = 8
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};
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#define m_PWR_SAVE_MODE 0xF0
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#define v_PWR_SAVE_MODE(n) (n << 4)
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#define PLL_B_RESET (1 << 3)
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#define N_32K 0x1000
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#define N_441K 0x1880
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#define N_882K 0x3100
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#define N_1764K 0x6200
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#define N_48K 0x1800
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#define N_96K 0x3000
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#define N_192K 0x6000
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#define LR_SWAP_N3 0x04
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#define N_2 0x08
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#define N_1 0x0c
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#define AUDIO_CTRL1 0x28
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#define AUDIO_CTRL2 0x2c
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#define I2S_AUDIO_CTRL 0x30
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enum {
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I2S_MODE_STANDARD = 0,
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I2S_MODE_RIGHT_JUSTIFIED,
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I2S_MODE_LEFT_JUSTIFIED
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};
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#define v_I2S_MODE(n) n
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enum {
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I2S_CHANNEL_1_2 = 1,
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I2S_CHANNEL_3_4 = 3,
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I2S_CHANNEL_5_6 = 7,
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I2S_CHANNEL_7_8 = 0xf
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};
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#define v_I2S_CHANNEL(n) ( (n) << 2 )
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#define I2S_INPUT_SWAP 0x40
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#define SRC_NUM_AUDIO_LEN 0x50
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/* HDMI_AV_CTRL1*/
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#define AV_CTRL1 0x54
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enum {
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AUDIO_32K = 0x3,
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AUDIO_441K = 0x0,
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AUDIO_48K = 0x2,
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AUDIO_882K = 0x8,
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AUDIO_96K = 0xa,
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AUDIO_1764K = 0xc,
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AUDIO_192K = 0xe,
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};
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#define m_AUDIO_SAMPLE_RATE 0xF0
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#define v_AUDIO_SAMPLE_RATE(n) (n << 4)
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#define m_INPUT_VIDEO_MODE (7 << 1)
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#define v_INPUT_VIDEO_MODE(n) (n << 1)
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enum {
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INTERNAL_DE = 0,
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EXTERNAL_DE
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};
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#define m_DE_SIGNAL_SELECT (1 << 0)
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/* HDMI_AV_CTRL2 */
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#define AV_CTRL2 0xec
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#define m_CSC_ENABLE (1 << 0)
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#define v_CSC_ENABLE(n) (n)
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/* HDMI_VIDEO_CTRL1 */
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#define VIDEO_CTRL1 0x58
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#define m_VIDEO_OUTPUT_MODE (0x3 << 6)
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#define v_VIDEO_OUTPUT_MODE(n) (n << 6)
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enum {
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VIDEO_INPUT_DEPTH_12BIT = 0,
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VIDEO_INPUT_DEPTH_10BIT = 0x1,
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VIDEO_INPUT_DEPTH_8BIT = 0x3
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};
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#define m_VIDEO_INPUT_DEPTH (3 << 4)
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#define v_VIDEO_INPUT_DEPTH(n) (n << 4)
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enum {
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VIDEO_EMBEDDED_SYNC_LOCATION_0 = 0,
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VIDEO_EMBEDDED_SYNC_LOCATION_1,
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VIDEO_EMBEDDED_SYNC_LOCATION_2
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};
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#define m_VIDEO_EMBEDDED_SYNC_LOCATION (3 << 2)
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#define VIDEO_EMBEDDED_SYNC_LOCATION(n) (n << 2)
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#define m_VIDEO_INPUT_COLOR_MODE (1 << 0)
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/* DEEP_COLOR_MODE */
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#define DEEP_COLOR_MODE 0x5c
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enum{
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TMDS_CLOCK_MODE_8BIT = 0,
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TMDS_CLOKK_MODE_10BIT,
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TMDS_CLOKK_MODE_12BIT
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};
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#define TMDS_CLOCK_MODE_MASK 0x3 << 6
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#define TMDS_CLOCK_MODE(n) (n) << 6
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/* VIDEO_CTRL2 */
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#define VIDEO_SETTING2 0x114
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#define m_UNMUTE (1 << 7)
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#define m_MUTE (1 << 6)
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#define m_AUDIO_RESET (1 << 2)
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#define m_NOT_SEND_AUDIO (1 << 1)
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#define m_NOT_SEND_VIDEO (1 << 0)
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#define AV_UNMUTE (1 << 7) // Unmute video and audio, send normal video and audio data
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#define AV_MUTE (1 << 6) // Mute video and audio, send black video data and silent audio data
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#define AUDIO_CAPTURE_RESET (1 << 2) // Reset audio process logic, only available in pwr_e mode.
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#define NOT_SEND_AUDIO (1 << 1) // Send silent audio data
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#define NOT_SEND_VIDEO (1 << 0) // Send black video data
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/* Color Space Convertion Parameter*/
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#define CSC_PARA_C0_H 0x60
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#define CSC_PARA_C0_L 0x64
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#define CSC_PARA_C1_H 0x68
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#define CSC_PARA_C1_L 0x6c
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#define CSC_PARA_C2_H 0x70
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#define CSC_PARA_C2_L 0x74
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#define CSC_PARA_C3_H 0x78
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#define CSC_PARA_C3_L 0x7c
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#define CSC_PARA_C4_H 0x80
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#define CSC_PARA_C4_L 0x84
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#define CSC_PARA_C5_H 0x88
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#define CSC_PARA_C5_L 0x8c
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#define CSC_PARA_C6_H 0x90
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#define CSC_PARA_C6_L 0x94
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#define CSC_PARA_C7_H 0x98
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#define CSC_PARA_C7_L 0x9c
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#define CSC_PARA_C8_H 0xa0
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#define CSC_PARA_C8_L 0xa4
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#define CSC_PARA_C9_H 0xa8
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#define CSC_PARA_C9_L 0xac
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#define CSC_PARA_C10_H 0xac
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#define CSC_PARA_C10_L 0xb4
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#define CSC_PARA_C11_H 0xb8
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#define CSC_PARA_C11_L 0xbc
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#define CSC_CONFIG1 0x34c
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#define m_CSC_MODE (1 << 7)
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#define m_CSC_COEF_MODE (0xF << 3) //Only used in auto csc mode
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#define m_CSC_STATUS (1 << 2)
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#define m_CSC_VID_SELECT (1 << 1)
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#define m_CSC_BRSWAP_DIABLE (1)
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enum {
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CSC_MODE_MANUAL = 0,
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CSC_MODE_AUTO
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};
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#define v_CSC_MODE(n) (n << 7)
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enum {
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COE_SDTV_LIMITED_RANGE = 0x08,
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COE_SDTV_FULL_RANGE = 0x04,
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COE_HDTV_60Hz = 0x2,
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COE_HDTV_50Hz = 0x1
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};
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#define v_CSC_COE_MODE(n) (n << 3)
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enum {
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CSC_INPUT_VID_5_19 = 0,
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CSC_INPUT_VID_28_29
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};
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#define v_CSC_VID_SELECT(n) (n << 1)
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#define v_CSC_BRSWAP_DIABLE(n) (n)
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#endif
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/* CONTROL_PACKET_BUF_INDEX */
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#define CONTROL_PACKET_BUF_INDEX 0x17c
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enum {
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INFOFRAME_AVI = 0x06,
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INFOFRAME_AAI = 0x08
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};
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#define CONTROL_PACKET_HB0 0x180
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#define CONTROL_PACKET_HB1 0x184
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#define CONTROL_PACKET_HB2 0x188
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#define CONTROL_PACKET_PB_ADDR 0x18c
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#define SIZE_AVI_INFOFRAME 0x11 // 17 bytes
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#define SIZE_AUDIO_INFOFRAME 0x0F // 15 bytes
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enum {
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AVI_COLOR_MODE_RGB = 0,
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AVI_COLOR_MODE_YCBCR422,
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AVI_COLOR_MODE_YCBCR444
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};
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enum {
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AVI_COLORIMETRY_NO_DATA = 0,
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AVI_COLORIMETRY_SMPTE_170M,
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AVI_COLORIMETRY_ITU709,
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AVI_COLORIMETRY_EXTENDED
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};
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enum {
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AVI_CODED_FRAME_ASPECT_NO_DATA,
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AVI_CODED_FRAME_ASPECT_4_3,
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AVI_CODED_FRAME_ASPECT_16_9
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};
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enum {
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ACTIVE_ASPECT_RATE_SAME_AS_CODED_FRAME = 0x08,
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ACTIVE_ASPECT_RATE_4_3,
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ACTIVE_ASPECT_RATE_16_9,
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ACTIVE_ASPECT_RATE_14_9
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};
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#if 0
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/* External Video Parameter Setting*/
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#define EXT_VIDEO_PARA 0xC0
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#define m_VSYNC_OFFSET (0xF << 4)
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#define m_VSYNC_POLARITY (1 << 3)
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#define m_HSYNC_POLARITY (1 << 2)
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#define m_INTERLACE (1 << 1)
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#define m_EXT_VIDEO_ENABLE (1 << 0)
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#define v_VSYNC_OFFSET(n) (n << 4)
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#define v_VSYNC_POLARITY(n) (n << 3)
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#define v_HSYNC_POLARITY(n) (n << 2)
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#define v_INTERLACE(n) (n << 1)
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#define v_EXT_VIDEO_ENABLE(n) (n << 0)
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#define EXT_VIDEO_PARA_HTOTAL_L 0xC4
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#define EXT_VIDEO_PARA_HTOTAL_H 0xC8
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#define EXT_VIDEO_PARA_HBLANK_L 0xCC
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#define EXT_VIDEO_PARA_HBLANK_H 0xD0
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#define EXT_VIDEO_PARA_HDELAY_L 0xD4
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#define EXT_VIDEO_PARA_HDELAY_H 0xD8
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#define EXT_VIDEO_PARA_HSYNCWIDTH_L 0xDC
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#define EXT_VIDEO_PARA_HSYNCWIDTH_H 0xE0
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#define EXT_VIDEO_PARA_VTOTAL_L 0xE4
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#define EXT_VIDEO_PARA_VTOTAL_H 0xE8
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#define EXT_VIDEO_PARA_VBLANK_L 0xF4
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#define EXT_VIDEO_PARA_VDELAY 0xF8
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#define EXT_VIDEO_PARA_VSYNCWIDTH 0xFC
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#define PHY_PLL_SPEED 0x158
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#define v_TEST_EN(n) (n << 6)
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#define v_PLLA_BYPASS(n) (n << 4)
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#define v_PLLB_SPEED(n) (n << 2)
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#define v_PLLA_SPEED(n) (n)
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enum {
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PLL_SPEED_LOWEST = 0,
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PLL_SPEED_MIDLOW,
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PLL_SPEED_MIDHIGH,
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PLL_SPEED_HIGHEST
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};
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#define PHY_PLL_17 0x15c // PLL A & B config bit 17
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#define v_PLLA_BIT17(n) (n << 2)
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#define v_PLLB_BIT17(n) (n << 1)
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#define PHY_BGR 0x160
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#define v_BGR_DISCONNECT(n) (n << 7)
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#define v_BGR_V_OFFSET(n) (n << 4)
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#define v_BGR_I_OFFSET(n) (n)
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#define PHY_PLLA_1 0x164
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#define PHY_PLLA_2 0x168
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#define PHY_PLLB_1 0x16c
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#define PHY_PLLB_2 0x170
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#define PHY_DRIVER_PREEMPHASIS 0x174
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#define v_TMDS_SWING(n) (n << 4)
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#define v_PRE_EMPHASIS(n) (n)
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#define PHY_PLL_16_AML 0x178 // PLL A & B config bit 16 and AML control
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#define v_PLLA_BIT16(n) (n << 5)
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#define v_PLLB_BIT16(n) (n << 4)
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#define v_AML(n) (n)
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#endif
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/* Interrupt Setting */
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#define INTR_MASK1 0xc0
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#define INTR_STATUS1 0xc1
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#define m_INT_HOTPLUG (1 << 7)
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#define m_INT_VSYNC (1 << 5)
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#define m_INT_EDID_READY (1 << 2)
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#define INTR_MASK2 0xc2
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#define INTR_STATUS2 0xc3
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#define m_INT_HDCP_ERR (1 << 7) // HDCP error detected
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#define m_INT_BKSV_RPRDY (1 << 6) // BKSV list ready from repeater
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#define m_INT_AUTH_DONE (1 << 4) // HDCP authentication done
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#if 0
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#define DDC_READ_FIFO_ADDR 0x200
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#define DDC_BUS_FREQ_L 0x204
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#define DDC_BUS_FREQ_H 0x208
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#define DDC_BUS_CTRL 0x2dc
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#define DDC_I2C_LEN 0x278
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#define DDC_I2C_OFFSET 0x280
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#define DDC_I2C_CTRL 0x284
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#define DDC_I2C_READ_BUF0 0x288
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#define DDC_I2C_READ_BUF1 0x28c
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#define DDC_I2C_READ_BUF2 0x290
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#define DDC_I2C_READ_BUF3 0x294
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#define DDC_I2C_WRITE_BUF0 0x298
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#define DDC_I2C_WRITE_BUF1 0x29c
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#define DDC_I2C_WRITE_BUF2 0x2a0
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#define DDC_I2C_WRITE_BUF3 0x2a4
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#define DDC_I2C_WRITE_BUF4 0x2ac
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#define DDC_I2C_WRITE_BUF5 0x2b0
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#define DDC_I2C_WRITE_BUF6 0x2b4
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#endif
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#define EDID_SEGMENT_POINTER 0x4d
|
||||
#define EDID_WORD_ADDR 0x4e
|
||||
#define EDID_FIFO_ADDR 0x4f
|
||||
|
||||
#define PIN_STATUS 0xc8
|
||||
#define m_HOTPLUG_STATUS (1 << 7)
|
||||
#define m_DDCSDA_STATUS (1 << 5)
|
||||
#define m_DDCSCL_STATUS (1 << 4)
|
||||
#if 0
|
||||
/* HDCP_CTRL */
|
||||
#define HDCP_CTRL 0x2bc
|
||||
enum {
|
||||
OUTPUT_DVI = 0,
|
||||
OUTPUT_HDMI
|
||||
};
|
||||
#define m_HDCP_AUTH_START (1 << 7) // start hdcp
|
||||
#define m_HDCP_BKSV_PASS (1 << 6) // bksv valid
|
||||
#define m_HDCP_BKSV_FAILED (1 << 5) // bksv invalid
|
||||
#define m_HDCP_FRAMED_ENCRYPED (1 << 4)
|
||||
#define m_HDCP_AUTH_STOP (1 << 3) // stop hdcp
|
||||
#define m_HDCP_ADV_CIPHER (1 << 2) // advanced cipher mode
|
||||
#define m_HDMI_DVI (1 << 1)
|
||||
#define m_HDCP_RESET (1 << 0) // reset hdcp
|
||||
#define v_HDCP_AUTH_START(n) (n << 7)
|
||||
#define v_HDCP_BKSV_PASS(n) (n << 6)
|
||||
#define v_HDCP_BKSV_FAILED(n) (n << 5)
|
||||
#define v_HDCP_FRAMED_ENCRYPED(n) (n << 4)
|
||||
#define v_HDCP_AUTH_STOP(n) (n << 3)
|
||||
#define v_HDCP_ADV_CIPHER(n) (n << 2)
|
||||
#define v_HDMI_DVI(n) (n << 1)
|
||||
#define v_HDCP_RESET(n) (n << 0)
|
||||
#define HDCP_CTRL2 0x340
|
||||
|
||||
/* HDCP Key Memory Access Control */
|
||||
#define HDCP_KEY_ACCESS_CTRL1 0x338
|
||||
#define HDCP_KEY_ACCESS_CTRL2 0x33c
|
||||
#define m_LOAD_FACSIMILE_HDCP_KEY (1 << 1)
|
||||
#define m_LOAD_HDCP_KEY (1 << 0)
|
||||
/* HDCP Key Memory Control */
|
||||
#define HDCP_KEY_MEM_CTRL 0x348
|
||||
#define m_USE_KEY1 (1 << 6)
|
||||
#define m_USE_KEY2 (1 << 5)
|
||||
#define m_LOAD_AKSV (1 << 4)
|
||||
#define m_KSV_SELECTED (1 << 3)
|
||||
#define m_KSV_VALID (1 << 2)
|
||||
#define m_KEY_VALID (1 << 1)
|
||||
#define m_KEY_READY (1 << 0)
|
||||
#define v_USE_KEY1(n) (n << 6)
|
||||
#define v_USE_KEY2(n) (n << 5)
|
||||
#define v_LOAD_AKSV(n) (n << 4)
|
||||
|
||||
/* HDCP B device capacity */
|
||||
#define HDCP_BCAPS 0x2f8
|
||||
#define m_HDMI_RECEIVED (1 << 7) //If HDCP receiver support HDMI, this bit must be 1.
|
||||
#define m_REPEATER (1 << 6)
|
||||
#define m_KSV_FIFO_READY (1 << 5)
|
||||
#define m_DDC_FAST (1 << 4)
|
||||
#define m_1_1_FEATURE (1 << 1)
|
||||
#define m_FAST_REAUTHENTICATION (1 << 0) //For HDMI, this function is supported whether this bit is enabled or not.
|
||||
|
||||
/* HDCP KSV Value */
|
||||
#define HDCP_KSV_BYTE0 0x2fc
|
||||
#define HDCP_KSV_BYTE1 0x300
|
||||
#define HDCP_KSV_BYTE2 0x304
|
||||
#define HDCP_KSV_BYTE3 0x308
|
||||
#define HDCP_KSV_BYTE4 0x30c
|
||||
|
||||
/* HDCP error status */
|
||||
#define HDCP_ERROR 0x320
|
||||
|
||||
/* HDCP 100 ms timer */
|
||||
#define HDCP_TIMER_100MS 0x324
|
||||
/* HDCP 5s timer */
|
||||
#define HDCP_TIMER_5S 0x328
|
||||
|
||||
/* HDCP Key ram address */
|
||||
#define HDCP_RAM_KEY_KSV1 0x400
|
||||
#define HDCP_RAM_KEY_KSV2 0x407
|
||||
#define HDCP_RAM_KEY_PRIVATE 0x40e
|
||||
#define HDCP_KEY_LENGTH 0x13C
|
||||
|
||||
|
||||
#define HDCP_ENABLE_HW_AUTH // Enable hardware authentication mode
|
||||
#define HDMI_INTERANL_CLK_DIV 0x19
|
||||
|
||||
#define HDMIRdReg(addr) __raw_readl(hdmi->regbase + addr)
|
||||
#define HDMIWrReg(addr, val) __raw_writel((val), hdmi->regbase + addr);
|
||||
#define HDMIMskReg(temp, addr, msk, val) \
|
||||
temp = __raw_readl(hdmi->regbase + addr) & (0xFF - (msk)) ; \
|
||||
__raw_writel(temp | ( (val) & (msk) ), hdmi->regbase + addr);
|
||||
|
||||
|
||||
|
||||
/* Color Space Convertion Mode */
|
||||
enum {
|
||||
CSC_RGB_0_255_TO_ITU601_16_235 = 0, //RGB 0-255 input to YCbCr 16-235 output according BT601
|
||||
CSC_RGB_0_255_TO_ITU709_16_235, //RGB 0-255 input to YCbCr 16-235 output accroding BT709
|
||||
CSC_ITU601_16_235_TO_RGB_16_235, //YCbCr 16-235 input to RGB 16-235 output according BT601
|
||||
CSC_ITU709_16_235_TO_RGB_16_235, //YCbCr 16-235 input to RGB 16-235 output according BT709
|
||||
CSC_ITU601_16_235_TO_RGB_0_255, //YCbCr 16-235 input to RGB 0-255 output according BT601
|
||||
CSC_ITU709_16_235_TO_RGB_0_255 //YCbCr 16-235 input to RGB 0-255 output according BT709
|
||||
};
|
||||
#endif
|
||||
extern int rk2928_hdmi_initial(void);
|
||||
extern int rk2928_hdmi_detect_hotplug(void);
|
||||
extern int rk2928_hdmi_read_edid(int block, unsigned char *buff);
|
||||
extern int rk2928_hdmi_removed(void);
|
||||
extern int rk2928_hdmi_config_video(struct hdmi_video_para *vpara);
|
||||
extern int rk2928_hdmi_config_audio(struct hdmi_audio *audio);
|
||||
extern void rk2928_hdmi_control_output(int enable);
|
||||
|
||||
#endif
|
||||
@@ -1,254 +0,0 @@
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/slab.h>
|
||||
#include <linux/hdmi.h>
|
||||
#include <linux/input.h>
|
||||
|
||||
|
||||
struct class *hdmi_class;
|
||||
struct hdmi_id_ref_info {
|
||||
struct hdmi *hdmi;
|
||||
int id;
|
||||
int ref;
|
||||
}ref_info[HDMI_MAX_ID];
|
||||
#ifdef CONFIG_SYSFS
|
||||
|
||||
extern int hdmi_create_attrs(struct hdmi *hdmi);
|
||||
extern void hdmi_remove_attrs(struct hdmi *hdmi);
|
||||
|
||||
#else
|
||||
|
||||
static inline int hdmi_create_attrs(struct hdmi *hdmi)
|
||||
{ return 0; }
|
||||
static inline void hdmi_remove_attrs(struct hdmi *hdmi) {}
|
||||
|
||||
#endif /* CONFIG_SYSFS */
|
||||
static void __hdmi_changed(struct hdmi *hdmi)
|
||||
{
|
||||
int precent;
|
||||
|
||||
mutex_lock(&hdmi->lock);
|
||||
precent = hdmi->ops->hdmi_precent(hdmi);
|
||||
if(precent && (hdmi->mode == DISP_ON_LCD) && hdmi->display_on){
|
||||
if(hdmi->ops->insert(hdmi) == 0){
|
||||
hdmi->mode = hdmi->display_on;
|
||||
kobject_uevent(&hdmi->dev->kobj, KOBJ_CHANGE);
|
||||
}
|
||||
else
|
||||
hdmi_dbg(hdmi->dev, "insert error\n");
|
||||
hdmi_set_backlight(hdmi->display_on==DISP_ON_HDMI?HDMI_DISABLE: HDMI_ENABLE);
|
||||
|
||||
}
|
||||
else if(precent &&(hdmi->mode != hdmi->display_on)&& hdmi->display_on){
|
||||
hdmi->mode = hdmi->display_on;
|
||||
hdmi_set_backlight(hdmi->display_on==DISP_ON_HDMI?HDMI_DISABLE: HDMI_ENABLE);
|
||||
}
|
||||
else if((!precent || !hdmi->display_on) && hdmi->mode != DISP_ON_LCD){
|
||||
if(hdmi->ops->remove(hdmi) == 0){
|
||||
hdmi->mode = DISP_ON_LCD;
|
||||
hdmi_set_backlight(HDMI_ENABLE);
|
||||
kobject_uevent(&hdmi->dev->kobj, KOBJ_CHANGE);
|
||||
}
|
||||
else
|
||||
hdmi_dbg(hdmi->dev, "remove error\n");
|
||||
}
|
||||
mutex_unlock(&hdmi->lock);
|
||||
return;
|
||||
}
|
||||
|
||||
void hdmi_changed(struct hdmi *hdmi, int msec)
|
||||
{
|
||||
schedule_delayed_work(&hdmi->work, msecs_to_jiffies(msec));
|
||||
return;
|
||||
}
|
||||
void hdmi_suspend(struct hdmi *hdmi)
|
||||
{
|
||||
del_timer(&hdmi->timer);
|
||||
flush_delayed_work(&hdmi->work);
|
||||
if(hdmi->mode != DISP_ON_LCD){
|
||||
hdmi->ops->remove(hdmi);
|
||||
hdmi->mode = DISP_ON_LCD;
|
||||
}
|
||||
return;
|
||||
}
|
||||
void hdmi_resume(struct hdmi *hdmi)
|
||||
{
|
||||
mod_timer(&hdmi->timer, jiffies + msecs_to_jiffies(10));
|
||||
return;
|
||||
}
|
||||
|
||||
static void hdmi_changed_work(struct work_struct *work)
|
||||
{
|
||||
struct hdmi *hdmi = container_of(work, struct hdmi,
|
||||
work.work);
|
||||
|
||||
__hdmi_changed(hdmi);
|
||||
return;
|
||||
}
|
||||
|
||||
void *hdmi_priv(struct hdmi *hdmi)
|
||||
{
|
||||
return (void *)hdmi->priv;
|
||||
}
|
||||
static void hdmi_detect_timer(unsigned long data)
|
||||
{
|
||||
struct hdmi *hdmi = (struct hdmi*)data;
|
||||
|
||||
int precent = hdmi->ops->hdmi_precent(hdmi);
|
||||
|
||||
if((precent && hdmi->mode == DISP_ON_LCD) ||
|
||||
(!precent && hdmi->mode != DISP_ON_LCD))
|
||||
hdmi_changed(hdmi, 100);
|
||||
mod_timer(&hdmi->timer, jiffies + msecs_to_jiffies(200));
|
||||
}
|
||||
struct hdmi *hdmi_register(int extra, struct device *parent)
|
||||
{
|
||||
int rc = 0, i;
|
||||
char name[8];
|
||||
struct hdmi *hdmi = kzalloc(sizeof(struct hdmi)+ extra, GFP_KERNEL);
|
||||
|
||||
if(!hdmi)
|
||||
return NULL;
|
||||
for(i = 0; i < HDMI_MAX_ID; i++)
|
||||
{
|
||||
if(ref_info[i].ref == 0)
|
||||
{
|
||||
ref_info[i].ref = 1;
|
||||
hdmi->id = i;
|
||||
break;
|
||||
}
|
||||
}
|
||||
if(i == HDMI_MAX_ID)
|
||||
{
|
||||
kfree(hdmi);
|
||||
return NULL;
|
||||
}
|
||||
sprintf(name, "hdmi-%d", hdmi->id);
|
||||
|
||||
hdmi->dev = device_create(hdmi_class, parent, 0,
|
||||
"%s", name);
|
||||
if (IS_ERR(hdmi->dev)) {
|
||||
rc = PTR_ERR(hdmi->dev);
|
||||
goto dev_create_failed;
|
||||
}
|
||||
|
||||
dev_set_drvdata(hdmi->dev, hdmi);
|
||||
ref_info[i].hdmi = hdmi;
|
||||
|
||||
INIT_DELAYED_WORK(&hdmi->work, hdmi_changed_work);
|
||||
|
||||
rc = hdmi_create_attrs(hdmi);
|
||||
if (rc)
|
||||
goto create_attrs_failed;
|
||||
|
||||
goto success;
|
||||
|
||||
create_attrs_failed:
|
||||
device_unregister(hdmi->dev);
|
||||
dev_create_failed:
|
||||
hdmi_remove_attrs(hdmi);
|
||||
kfree(hdmi);
|
||||
return NULL;
|
||||
success:
|
||||
mutex_init(&hdmi->lock);
|
||||
setup_timer(&hdmi->timer, hdmi_detect_timer,(unsigned long)hdmi);
|
||||
mod_timer(&hdmi->timer, jiffies + msecs_to_jiffies(200));
|
||||
return hdmi;
|
||||
}
|
||||
void hdmi_unregister(struct hdmi *hdmi)
|
||||
{
|
||||
int id;
|
||||
|
||||
if(!hdmi)
|
||||
return;
|
||||
id = hdmi->id;
|
||||
del_timer(&hdmi->timer);
|
||||
flush_scheduled_work();
|
||||
hdmi_remove_attrs(hdmi);
|
||||
device_unregister(hdmi->dev);
|
||||
|
||||
kfree(hdmi);
|
||||
hdmi = NULL;
|
||||
ref_info[id].ref = 0;
|
||||
ref_info[id].hdmi = NULL;
|
||||
}
|
||||
struct hdmi *get_hdmi_struct(int nr)
|
||||
{
|
||||
if(ref_info[nr].ref == 0)
|
||||
return NULL;
|
||||
else
|
||||
return ref_info[nr].hdmi;
|
||||
}
|
||||
int hdmi_is_insert(void)
|
||||
{
|
||||
struct hdmi *hdmi = get_hdmi_struct(0);
|
||||
|
||||
if(hdmi && hdmi->ops && hdmi->ops->hdmi_precent)
|
||||
return hdmi->ops->hdmi_precent(hdmi);
|
||||
else
|
||||
return 0;
|
||||
}
|
||||
int hdmi_get_scale(void)
|
||||
{
|
||||
struct hdmi* hdmi = get_hdmi_struct(0);
|
||||
if(!hdmi)
|
||||
return 100;
|
||||
else if(hdmi->mode != DISP_ON_LCD)
|
||||
return hdmi->scale;
|
||||
else
|
||||
return 100;
|
||||
}
|
||||
|
||||
int hdmi_set_scale(int event, char *data, int len)
|
||||
{
|
||||
int result;
|
||||
struct hdmi* hdmi = get_hdmi_struct(0);
|
||||
|
||||
if(!hdmi)
|
||||
return -1;
|
||||
if(len != 4)
|
||||
return -1;
|
||||
if(fb_get_video_mode() || hdmi->mode == DISP_ON_LCD)
|
||||
return -1;
|
||||
|
||||
result = data[0] | data[1]<<1 | data[2]<<2;
|
||||
if(event != MOUSE_NONE && (result & event) != event)
|
||||
return -1;
|
||||
|
||||
hdmi->scale += data[3];
|
||||
|
||||
hdmi->scale = (hdmi->scale>100)?100:hdmi->scale;
|
||||
hdmi->scale = (hdmi->scale<MIN_SCALE)?MIN_SCALE:hdmi->scale;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init hdmi_class_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
hdmi_class = class_create(THIS_MODULE, "hdmi");
|
||||
|
||||
if (IS_ERR(hdmi_class))
|
||||
return PTR_ERR(hdmi_class);
|
||||
for(i = 0; i < HDMI_MAX_ID; i++) {
|
||||
ref_info[i].id = i;
|
||||
ref_info[i].ref = 0;
|
||||
ref_info[i].hdmi = NULL;
|
||||
}
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit hdmi_class_exit(void)
|
||||
{
|
||||
class_destroy(hdmi_class);
|
||||
}
|
||||
EXPORT_SYMBOL(hdmi_changed);
|
||||
EXPORT_SYMBOL(hdmi_register);
|
||||
EXPORT_SYMBOL(hdmi_unregister);
|
||||
EXPORT_SYMBOL(get_hdmi_struct);
|
||||
|
||||
subsys_initcall(hdmi_class_init);
|
||||
module_exit(hdmi_class_exit);
|
||||
|
||||
Reference in New Issue
Block a user