From ed9eb4b06dcef6f511a250fccc65f8750b210eb7 Mon Sep 17 00:00:00 2001 From: XiaoDong Huang Date: Tue, 11 Jan 2022 17:44:23 +0800 Subject: [PATCH] arm64: dts: rockchip: rk3588: add rockchip-suspend node Signed-off-by: XiaoDong Huang Change-Id: I977f43bdc0a4b13202d15dc276ec82db4e1b5e0d --- arch/arm64/boot/dts/rockchip/rk3588s.dtsi | 21 ++++++++ include/dt-bindings/suspend/rockchip-rk3588.h | 53 +++++++++++++++++++ 2 files changed, 74 insertions(+) create mode 100644 include/dt-bindings/suspend/rockchip-rk3588.h diff --git a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi index 19cef0d5401a..ace76ae4ffb1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3588s.dtsi @@ -10,6 +10,7 @@ #include #include #include +#include / { compatible = "rockchip,rk3588"; @@ -1094,6 +1095,26 @@ status = "disabled"; }; + rockchip_suspend: rockchip-suspend { + compatible = "rockchip,pm-rk3588"; + status = "disabled"; + rockchip,sleep-debug-en = <0>; + rockchip,sleep-mode-config = < + (0 + | RKPM_SLP_ARMOFF_DDRPD + | RKPM_SLP_PMU_PMUALIVE_32K + | RKPM_SLP_PMU_DIS_OSC + | RKPM_SLP_32K_EXT + | RKPM_SLP_PMU_DBG + ) + >; + rockchip,wakeup-config = < + (0 + | RKPM_GPIO_WKUP_EN + ) + >; + }; + rockchip_system_monitor: rockchip-system-monitor { compatible = "rockchip,system-monitor"; diff --git a/include/dt-bindings/suspend/rockchip-rk3588.h b/include/dt-bindings/suspend/rockchip-rk3588.h new file mode 100644 index 000000000000..5d75d73f2404 --- /dev/null +++ b/include/dt-bindings/suspend/rockchip-rk3588.h @@ -0,0 +1,53 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Header providing constants for Rockchip suspend bindings. + * + * Copyright (C) 2022, Rockchip Electronics Co., Ltd + * Author: XiaoDong.Huang + */ + +#ifndef __DT_BINDINGS_RK3588_PM_H__ +#define __DT_BINDINGS_RK3588_PM_H__ +/******************************bits ops************************************/ + +#ifndef BIT +#define BIT(nr) (1 << (nr)) +#endif + +#define RKPM_SLP_ARMPD BIT(0) +#define RKPM_SLP_ARMOFF BIT(1) +#define RKPM_SLP_ARMOFF_DDRPD BIT(2) +#define RKPM_SLP_ARMOFF_LOGOFF BIT(3) +#define RKPM_SLP_ARMOFF_PMUOFF BIT(4) + +/* all plls except ddr's pll*/ +#define RKPM_SLP_PMU_HW_PLLS_PD BIT(8) +#define RKPM_SLP_PMU_PMUALIVE_32K BIT(9) +#define RKPM_SLP_PMU_DIS_OSC BIT(10) + +#define RKPM_SLP_CLK_GT BIT(16) +#define RKPM_SLP_PMIC_LP BIT(17) + +#define RKPM_SLP_32K_EXT BIT(24) +#define RKPM_SLP_TIME_OUT_WKUP BIT(25) +#define RKPM_SLP_PMU_DBG BIT(26) + +/* the wake up source */ +#define RKPM_CPU0_WKUP_EN BIT(0) +#define RKPM_CPU1_WKUP_EN BIT(1) +#define RKPM_CPU2_WKUP_EN BIT(2) +#define RKPM_CPU3_WKUP_EN BIT(3) +#define RKPM_CPU4_WKUP_EN BIT(4) +#define RKPM_CPU5_WKUP_EN BIT(5) +#define RKPM_CPU6_WKUP_EN BIT(6) +#define RKPM_CPU7_WKUP_EN BIT(7) +#define RKPM_GPIO_WKUP_EN BIT(8) +#define RKPM_SDMMC_WKUP_EN BIT(9) +#define RKPM_SDIO_WKUP_EN BIT(10) +#define RKPM_USB_WKUP_EN BIT(11) +#define RKPM_UART0_WKUP_EN BIT(12) +#define RKPM_VAD_WKUP_EN BIT(13) +#define RKPM_TIMER_WKUP_EN BIT(14) +#define RKPM_SYSINT_WKUP_EN BIT(15) +#define RKPM_TIME_OUT_WKUP_EN BIT(16) +#endif