diff --git a/MAINTAINERS b/MAINTAINERS index 1783af26f4a7..24629490fe0d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -13500,6 +13500,7 @@ F: drivers/amlogic/power/* HDMITX OUTPUT DRIVER M: Zongdong Jiao M: Yi Zhou +M: Kaifu Hu S: Maintained F: drivers/amlogic/media/vout/hdmitx/* F: drivers/amlogic/media/vout/hdmitx/hdcp/* diff --git a/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts index 145484274084..7e1baf715788 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p212_1g.dts @@ -615,6 +615,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p212_1g_buildroot.dts b/arch/arm64/boot/dts/amlogic/gxl_p212_1g_buildroot.dts index adf19448f25e..17a47eb66902 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p212_1g_buildroot.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p212_1g_buildroot.dts @@ -603,6 +603,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts index 0a880a6c64a5..1e5e72a18363 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p212_2g.dts @@ -712,6 +712,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p212_2g_buildroot.dts b/arch/arm64/boot/dts/amlogic/gxl_p212_2g_buildroot.dts index 23d6d1f878ec..e1990774993b 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p212_2g_buildroot.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p212_2g_buildroot.dts @@ -680,6 +680,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts index 1eb647fdc27e..7c4eb97fe8bf 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p230_2g.dts @@ -701,6 +701,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p230_2g_buildroot.dts b/arch/arm64/boot/dts/amlogic/gxl_p230_2g_buildroot.dts index dffaf35d0ce3..8a08cefc0d7c 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p230_2g_buildroot.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p230_2g_buildroot.dts @@ -687,6 +687,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p231_1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p231_1g.dts index dd032242db18..193e45b42277 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p231_1g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p231_1g.dts @@ -628,6 +628,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p231_2g.dts b/arch/arm64/boot/dts/amlogic/gxl_p231_2g.dts index 0b00b0def085..343bde7f6f35 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p231_2g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p231_2g.dts @@ -628,6 +628,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p231_2g_buildroot.dts b/arch/arm64/boot/dts/amlogic/gxl_p231_2g_buildroot.dts index 5cf0a645b667..fbcf30cbb0b1 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p231_2g_buildroot.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p231_2g_buildroot.dts @@ -620,6 +620,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts index 9c49473eee07..78ef526cd2ce 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p241_1g.dts @@ -687,6 +687,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p241_1g_buildroot.dts b/arch/arm64/boot/dts/amlogic/gxl_p241_1g_buildroot.dts index 403d173fc55e..3c852499f1f2 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p241_1g_buildroot.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p241_1g_buildroot.dts @@ -693,6 +693,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts b/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts index 7ab9ac254c86..2eae6f5855d6 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p241_v2-1g.dts @@ -664,6 +664,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/arch/arm64/boot/dts/amlogic/gxl_p241_v2_1g_buildroot.dts b/arch/arm64/boot/dts/amlogic/gxl_p241_v2_1g_buildroot.dts index bbb08eebcee3..2e5aa808616d 100644 --- a/arch/arm64/boot/dts/amlogic/gxl_p241_v2_1g_buildroot.dts +++ b/arch/arm64/boot/dts/amlogic/gxl_p241_v2_1g_buildroot.dts @@ -662,6 +662,10 @@ /* HPD, 57 + 32 = 89; CEC, 151 + 32 = 183*/ interrupts = <0 57 1>; interrupt-names = "hdmitx_hpd"; + /* 0:M8B 1:GXBB 2:GXTVBB 3:GXL 4:GXM + * 5:TXL 6:TXLX 7:AXG 8:GXLX 9:TXHD + */ + ic_type = <3>; vend_data: vend_data{ /* Should modified by Customer */ vendor_name = "Amlogic"; /* Max Chars: 8 */ /* standards.ieee.org/develop/regauth/oui/oui.txt */ diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c b/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c index 90bc84c7ec0d..f5f4f16c3c07 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_common/hdmi_parameters.c @@ -1409,7 +1409,7 @@ struct hdmi_format_para *hdmi_match_dtd_paras(struct dtd *t) if (!t) return NULL; for (i = 0; all_fmt_paras[i]; i++) { - if ((abs(all_fmt_paras[i]->timing.frac_freq / 10 + if ((abs(all_fmt_paras[i]->timing.pixel_freq / 10 - t->pixel_clock) <= (t->pixel_clock + 1000) / 1000) && (t->h_active == all_fmt_paras[i]->timing.h_active) && (t->h_blank == all_fmt_paras[i]->timing.h_blank) && @@ -1584,20 +1584,22 @@ struct vinfo_s *hdmi_get_valid_vinfo(char *mode) struct vinfo_s *info = NULL; char mode_[32]; - /* the string of mode contains char NF */ - memset(mode_, 0, sizeof(mode_)); - strncpy(mode_, mode, strlen(mode)); - for (i = 0; i < sizeof(mode_); i++) - if (mode_[i] == 10) - mode_[i] = 0; + if (strlen(mode)) { + /* the string of mode contains char NF */ + memset(mode_, 0, sizeof(mode_)); + strncpy(mode_, mode, sizeof(mode_)); + for (i = 0; i < sizeof(mode_); i++) + if (mode_[i] == 10) + mode_[i] = 0; - for (i = 0; all_fmt_paras[i]; i++) { - if (all_fmt_paras[i]->hdmitx_vinfo.mode == VMODE_MAX) - continue; - if (strncmp(all_fmt_paras[i]->hdmitx_vinfo.name, mode_, - strlen(mode_)) == 0) { - info = &all_fmt_paras[i]->hdmitx_vinfo; - break; + for (i = 0; all_fmt_paras[i]; i++) { + if (all_fmt_paras[i]->hdmitx_vinfo.mode == VMODE_MAX) + continue; + if (strncmp(all_fmt_paras[i]->hdmitx_vinfo.name, mode_, + strlen(mode_)) == 0) { + info = &all_fmt_paras[i]->hdmitx_vinfo; + break; + } } } return info; diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_audio.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_audio.c index 1358ef3928df..1357960bec17 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_audio.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_audio.c @@ -32,6 +32,8 @@ #include #include #include +#include "hw/common.h" + #undef PCM_USE_INFOFRAME @@ -53,17 +55,13 @@ static const unsigned char channel_status_sample_word_length[] = { 0xb /*24 bits*/ }; -void hdmi_tx_set_N_CTS(unsigned int N_value, unsigned int CTS) -{ -} - static void hdmi_tx_construct_aud_packet( struct hdmitx_audpara *audio_param, unsigned char *AUD_DB, unsigned char *CHAN_STAT_BUF, int hdmi_ch) { #ifndef PCM_USE_INFOFRAME if (audio_param->type == CT_PCM) { - hdmi_print(INF, AUD "Audio Type: PCM\n"); + pr_info(AUD "Audio Type: PCM\n"); if (AUD_DB) { /*Note: HDMI Spec V1.4 Page 154*/ if ((audio_param->channel_num == CC_2CH) || @@ -97,7 +95,7 @@ static void hdmi_tx_construct_aud_packet( audio_param->sample_rate])<<4); } } else if (audio_param->type == CT_AC_3) { - hdmi_print(INF, AUD "Audio Type: AC3\n"); + pr_info(AUD "Audio Type: AC3\n"); if (AUD_DB) { AUD_DB[0] = (CT_AC_3<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -105,7 +103,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_MPEG1) { - hdmi_print(INF, AUD "Audio Type: MPEG1\n"); + pr_info(AUD "Audio Type: MPEG1\n"); if (AUD_DB) { AUD_DB[0] = (CT_MPEG1<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -113,7 +111,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_MP3) { - hdmi_print(INF, AUD "Audio Type: MP3\n"); + pr_info(AUD "Audio Type: MP3\n"); if (AUD_DB) { AUD_DB[0] = (CT_MP3<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -121,7 +119,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_MPEG2) { - hdmi_print(INF, AUD "Audio Type: MPEG2\n"); + pr_info(AUD "Audio Type: MPEG2\n"); if (AUD_DB) { AUD_DB[0] = (CT_MPEG2<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -129,7 +127,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_AAC) { - hdmi_print(INF, AUD "Audio Type: AAC\n"); + pr_info(AUD "Audio Type: AAC\n"); if (AUD_DB) { AUD_DB[0] = (CT_AAC<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -137,7 +135,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_DTS) { - hdmi_print(INF, AUD "Audio Type: DTS\n"); + pr_info(AUD "Audio Type: DTS\n"); if (AUD_DB) { AUD_DB[0] = (CT_DTS<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -145,7 +143,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_ATRAC) { - hdmi_print(INF, AUD "Audio Type: ATRAC\n"); + pr_info(AUD "Audio Type: ATRAC\n"); if (AUD_DB) { AUD_DB[0] = (CT_ATRAC<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -153,7 +151,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_ONE_BIT_AUDIO) { - hdmi_print(INF, AUD "Audio Type: One Bit Audio\n"); + pr_info(AUD "Audio Type: One Bit Audio\n"); if (AUD_DB) { AUD_DB[0] = (CT_ONE_BIT_AUDIO<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -161,7 +159,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_DOLBY_D) { - hdmi_print(INF, AUD "Audio Type: Dobly Digital +\n"); + pr_info(AUD "Audio Type: Dobly Digital +\n"); if (AUD_DB) { AUD_DB[0] = (FS_REFER_TO_STREAM<<4)|(CC_REFER_TO_STREAM); @@ -175,7 +173,7 @@ static void hdmi_tx_construct_aud_packet( CHAN_STAT_BUF[4] = CHAN_STAT_BUF[24+4] = 0x1; } } else if (audio_param->type == CT_DTS_HD) { - hdmi_print(INF, AUD "Audio Type: DTS-HD\n"); + pr_info(AUD "Audio Type: DTS-HD\n"); if (AUD_DB) { AUD_DB[0] = (FS_REFER_TO_STREAM<<4)|(CC_REFER_TO_STREAM); @@ -184,7 +182,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_MAT) { - hdmi_print(INF, AUD "Audio Type: MAT(MLP)\n"); + pr_info(AUD "Audio Type: MAT(MLP)\n"); if (AUD_DB) { AUD_DB[0] = (CT_MAT<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -192,7 +190,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_DST) { - hdmi_print(INF, AUD "Audio Type: DST\n"); + pr_info(AUD "Audio Type: DST\n"); if (AUD_DB) { AUD_DB[0] = (CT_DST<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -200,7 +198,7 @@ static void hdmi_tx_construct_aud_packet( AUD_DB[4] = 0; } } else if (audio_param->type == CT_WMA) { - hdmi_print(INF, AUD "Audio Type: WMA Pro\n"); + pr_info(AUD "Audio Type: WMA Pro\n"); if (AUD_DB) { AUD_DB[0] = (CT_WMA<<4)|(CC_REFER_TO_STREAM); AUD_DB[1] = (FS_REFER_TO_STREAM<<2)|SS_REFER_TO_STREAM; @@ -218,11 +216,12 @@ static void hdmi_tx_construct_aud_packet( } int hdmitx_set_audio(struct hdmitx_dev *hdmitx_device, - struct hdmitx_audpara *audio_param, int hdmi_ch) + struct hdmitx_audpara *audio_param) { int i, ret = -1; unsigned char AUD_DB[32]; unsigned char CHAN_STAT_BUF[24*2]; + unsigned int hdmi_ch = hdmitx_device->hdmi_ch; for (i = 0; i < 32; i++) AUD_DB[i] = 0; diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_edid.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_edid.c index 76ff26ba7bbd..e92b41993555 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_edid.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_edid.c @@ -29,18 +29,16 @@ #include #include #include -/* #include */ -/* #include */ -/* #include "hw/hdmi_tx_reg.h" */ #include #include #include -/* #include */ +#include #include #include #include #include +#include "hw/common.h" #define CEA_DATA_BLOCK_COLLECTION_ADDR_1StP 0x04 #define VIDEO_TAG 0x40 @@ -151,11 +149,9 @@ static void Edid_ParsingIDSerialNumber(struct rx_cap *pRXCap, { int i; - if (data == NULL) - return; - for (i = 0; i < 4; i++) - pRXCap->IDSerialNumber[i] = data[3-i]; - return; + if (data != NULL) + for (i = 0; i < 4; i++) + pRXCap->IDSerialNumber[i] = data[3-i]; } static int Edid_find_name_block(unsigned char *data) @@ -243,6 +239,7 @@ static void set_vsdb_phy_addr(struct hdmitx_dev *hdev, unsigned char *edid_offset) { int phy_addr; + vsdb->a = (edid_offset[4] >> 4) & 0xf; vsdb->b = (edid_offset[4] >> 0) & 0xf; vsdb->c = (edid_offset[5] >> 4) & 0xf; @@ -777,11 +774,10 @@ static void Edid_ParsingVendSpec(struct rx_cap *pRXCap, pos++; if (dat[pos] != 1) { - pr_info("hdmitx: edid: parsing fail %s[%d]\n", __func__, + pr_info(EDID "parsing fail %s[%d]\n", __func__, __LINE__); - return; - } else - pos++; + } else { + pos++; dv->ieeeoui = dat[pos++]; dv->ieeeoui += dat[pos++] << 8; @@ -842,6 +838,8 @@ static void Edid_ParsingVendSpec(struct rx_cap *pRXCap, dv->vers.ver1.chrom_blue_primary_x = dat[pos++]; dv->vers.ver1.chrom_blue_primary_y = dat[pos++]; } + } + if (pos > len) pr_info("hdmitx: edid: maybe invalid dv%d data\n", dv->ver); } @@ -1238,8 +1236,8 @@ static void hdmitx_edid_4k2k_parse(struct rx_cap *pRXCap, unsigned char *dat, unsigned int size) { if ((size > 4) || (size == 0)) { - hdmi_print(ERR, EDID - "HDMI: 4k2k in edid out of range, SIZE = %d\n", + pr_info(EDID + "4k2k in edid out of range, SIZE = %d\n", size); return; } @@ -1483,7 +1481,7 @@ static void hdmitx_edid_set_default_vic(struct hdmitx_dev *hdmitx_device) pRXCap->VIC[2] = HDMI_1920x1080p60_16x9; pRXCap->native_VIC = HDMI_720x480p60_16x9; hdmitx_device->vic_count = pRXCap->VIC_count; - hdmi_print(IMP, EDID "HDMI: set default vic\n"); + pr_info(EDID "set default vic\n"); } #if 0 @@ -1705,8 +1703,8 @@ static int edid_zero_data(unsigned char *buf) static void dump_dtd_info(struct dtd *t) { - pr_info("%s[%d]\n", __func__, __LINE__); -#define PR(a) pr_info("%s %d\n", #a, t->a) + pr_info(EDID "%s[%d]\n", __func__, __LINE__); +#define PR(a) pr_info(EDID "%s: %d\n", #a, t->a) PR(pixel_clock); PR(h_active); PR(h_blank); @@ -1761,7 +1759,7 @@ next: if (para) { t->vic = para->vic; pRXCap->preferred_mode = pRXCap->dtd[0].vic; /* Select dtd0 */ - pr_info("hdmitx: get dtd%d vic: %d\n", + pr_info(EDID "get dtd%d vic: %d\n", pRXCap->dtd_idx, para->vic); pRXCap->dtd_idx++; } else @@ -1787,7 +1785,7 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) } else EDID_buf = hdmitx_device->EDID_buf1; hdmitx_device->edid_ptr = EDID_buf; - hdmi_print(0, "EDID Parser:\n"); + pr_info(EDID "EDID Parser:\n"); memset(rptx_edid_buf, 0, sizeof(rptx_edid_buf)); rptx_edid_aud = &rptx_edid_buf[0]; /* Calculate the EDID hash for special use */ @@ -1797,18 +1795,13 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) ret_val = Edid_DecodeHeader(&hdmitx_device->hdmi_info, &EDID_buf[0]); -/* if(ret_val == -1) */ -/* return -1; */ - for (i = 0, CheckSum = 0 ; i < 128 ; i++) { CheckSum += EDID_buf[i]; CheckSum &= 0xFF; } - if (CheckSum != 0) { - hdmi_print(0, "PLUGIN_DVI_OUT\n"); - /* return -1 ; */ - } + if (CheckSum != 0) + pr_info(EDID "PLUGIN_DVI_OUT\n"); Edid_ParsingIDManufacturerName(&hdmitx_device->RXCap, &EDID_buf[8]); Edid_ParsingIDProductCode(&hdmitx_device->RXCap, &EDID_buf[0x0A]); @@ -1840,7 +1833,7 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) hdmitx_device->RXCap.blk0_chksum = EDID_buf[0x7F]; if (BlockCount == 0) { - hdmi_print(0, "EDID BlockCount=0\n"); + pr_info(EDID "EDID BlockCount=0\n"); hdmitx_edid_set_default_vic(hdmitx_device); /* DVI case judgement: only contains one block and @@ -1853,7 +1846,7 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) if (EDID_buf[i] == 0) zero_numbers++; } - hdmi_print(INF, EDID "edid blk0 checksum:%d ext_flag:%d\n", + pr_info(EDID "edid blk0 checksum:%d ext_flag:%d\n", CheckSum, EDID_buf[0x7e]); if ((CheckSum & 0xff) == 0) hdmitx_device->RXCap.IEEEOUI = 0; @@ -1874,7 +1867,7 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) hdmitx_device->RXCap.VIC[2] = HDMI_1920x1080p60_16x9; hdmitx_device->RXCap.native_VIC = HDMI_720x480p60_16x9; hdmitx_device->vic_count = hdmitx_device->RXCap.VIC_count; - hdmi_print(IMP, EDID "HDMI: set default vic\n"); + pr_info(EDID "set default vic\n"); return 0; } else if (BlockCount > EDID_MAX_BLOCK) { BlockCount = EDID_MAX_BLOCK; @@ -1921,17 +1914,17 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) */ if (!pRXCap->flag_vfpdb && (pRXCap->preferred_mode != pRXCap->VIC[0]) && (pRXCap->number_of_dtd == 0)) { - pr_info("hdmitx: edid: change preferred_mode from %d to %d\n", + pr_info(EDID "change preferred_mode from %d to %d\n", pRXCap->preferred_mode, pRXCap->VIC[0]); pRXCap->preferred_mode = pRXCap->VIC[0]; } if (hdmitx_edid_search_IEEEOUI(&EDID_buf[128])) { pRXCap->IEEEOUI = 0x0c03; - pr_info("hdmitx: edid: find IEEEOUT\n"); + pr_info(EDID "find IEEEOUT\n"); } else { pRXCap->IEEEOUI = 0x0; - pr_info("hdmitx: edid: not find IEEEOUT\n"); + pr_info(EDID "not find IEEEOUT\n"); } if ((pRXCap->IEEEOUI != 0x0c03) || (pRXCap->IEEEOUI == 0x0) || @@ -1943,7 +1936,7 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) if (edid_check_valid(&EDID_buf[0]) && !hdmitx_edid_search_IEEEOUI(&EDID_buf[128])) { pRXCap->IEEEOUI = 0x0; - pr_info("hdmitx: edid: sink is DVI device\n"); + pr_info(EDID "sink is DVI device\n"); } else pRXCap->IEEEOUI = 0x0c03; @@ -1955,15 +1948,13 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) edid_save_checkvalue(EDID_buf, BlockCount+1); -#if 1 i = hdmitx_edid_dump(hdmitx_device, (char *)(hdmitx_device->tmp_buf), HDMI_TMP_BUF_SIZE); hdmitx_device->tmp_buf[i] = 0; - hdmi_print(0, "\n"); -#endif + if (!hdmitx_edid_check_valid_blocks(&EDID_buf[0])) { pRXCap->IEEEOUI = 0x0c03; - pr_info("hdmitx: Invalid edid, consider RX as HDMI device\n"); + pr_info(EDID "Invalid edid, consider RX as HDMI device\n"); } /* update RX HDR information */ info = get_current_vinfo(); @@ -1979,7 +1970,7 @@ int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device) info->hdr_info.lumi_max = pRXCap->hdr_lum_max; info->hdr_info.lumi_avg = pRXCap->hdr_lum_avg; info->hdr_info.lumi_min = pRXCap->hdr_lum_min; - pr_info("hdmitx: update rx hdr info %x at edid parsing\n", + pr_info(EDID "update rx hdr info %x at edid parsing\n", info->hdr_info.hdr_support); } } @@ -2007,14 +1998,15 @@ static struct dispmode_vic dispmode_vic_tab[] = { {"smpte24hz", HDMI_4k2k_smpte_24}, {"smpte25hz", HDMI_4096x2160p25_256x135}, {"smpte30hz", HDMI_4096x2160p30_256x135}, - {"smpte50hz", HDMI_4096x2160p50_256x135}, {"smpte50hz420", HDMI_4096x2160p50_256x135_Y420}, - {"smpte60hz", HDMI_4096x2160p60_256x135}, {"smpte60hz420", HDMI_4096x2160p60_256x135_Y420}, - {"2160p60hz", HDMI_4k2k_60}, - {"2160p50hz", HDMI_4k2k_50}, {"2160p60hz420", HDMI_3840x2160p60_16x9_Y420}, {"2160p50hz420", HDMI_3840x2160p50_16x9_Y420}, + {"smpte50hz", HDMI_4096x2160p50_256x135}, + {"smpte60hz", HDMI_4096x2160p60_256x135}, + {"2160p60hz", HDMI_4k2k_60}, + {"2160p50hz", HDMI_4k2k_50}, + }; int hdmitx_edid_VIC_support(enum hdmi_vic vic) @@ -2035,14 +2027,15 @@ enum hdmi_vic hdmitx_edid_vic_tab_map_vic(const char *disp_mode) int i; for (i = 0; i < ARRAY_SIZE(dispmode_vic_tab); i++) { - if (strcmp(disp_mode, dispmode_vic_tab[i].disp_mode) == 0) { + if (strncmp(disp_mode, dispmode_vic_tab[i].disp_mode, + strlen(dispmode_vic_tab[i].disp_mode)) == 0) { vic = dispmode_vic_tab[i].VIC; break; } } if (vic == HDMI_Unknown) - hdmi_print(INF, EDID "not find mapped vic\n"); + pr_info(EDID "not find mapped vic\n"); return vic; } @@ -2332,14 +2325,14 @@ static void hdmitx_edid_blk_print(unsigned char *blk, unsigned int blk_idx) return; memset(tmp_buf, 0, TMP_EDID_BUF_SIZE); - hdmi_print(INF, EDID "blk%d raw data\n", blk_idx); + pr_info(EDID "blk%d raw data\n", blk_idx); for (i = 0, pos = 0; i < 128; i++) { pos += sprintf(tmp_buf + pos, "%02x", blk[i]); if (((i+1) & 0x1f) == 0) /* print 32bytes a line */ pos += sprintf(tmp_buf + pos, "\n"); } pos += sprintf(tmp_buf + pos, "\n"); - pr_info("%s\n", tmp_buf); + pr_info(EDID "\n%s\n", tmp_buf); kfree(tmp_buf); } @@ -2358,9 +2351,9 @@ static unsigned int hdmitx_edid_check_valid_blocks(unsigned char *buf) if (tmp_chksum != 0) { valid_blk_no++; if ((tmp_chksum & 0xff) == 0) - hdmi_print(INF, EDID "check sum valid\n"); + pr_info(EDID "check sum valid\n"); else - hdmi_print(INF, EDID "check sum invalid\n"); + pr_info(EDID "check sum invalid\n"); } tmp_chksum = 0; } @@ -2391,14 +2384,14 @@ void hdmitx_edid_buf_compare_print(struct hdmitx_dev *hdmitx_device) valid_blk_no = hdmitx_edid_check_valid_blocks(buf0); if (valid_blk_no == 0) - hdmi_print(ERR, EDID "raw data are all zeroes\n"); + pr_info(EDID "raw data are all zeroes\n"); else { for (blk_idx = 0; blk_idx < valid_blk_no; blk_idx++) hdmitx_edid_blk_print(&buf0[blk_idx*128], blk_idx); } } else { - hdmi_print(ERR, EDID "%d errors between two reading\n", err_no); + pr_info(EDID "%d errors between two reading\n", err_no); valid_blk_no = hdmitx_edid_check_valid_blocks(buf0); for (blk_idx = 0; blk_idx < valid_blk_no; blk_idx++) hdmitx_edid_blk_print(&buf0[blk_idx*128], blk_idx); diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.c index eb4838b36d0b..423b46a84eb0 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.c @@ -42,7 +42,7 @@ /* #include */ #include #include -/* #include */ +#include "hw/common.h" #include "hdmi_tx_hdcp.h" /* * hdmi_tx_hdcp.c @@ -52,6 +52,24 @@ static int hdmi_authenticated; +unsigned int hdcp_get_downstream_ver(void) +{ + unsigned int ret = 14; + + struct hdmitx_dev *hdev = get_hdmitx_device(); + + /* if TX don't have HDCP22 key, skip RX hdcp22 ver */ + if (hdev->HWOp.CntlDDC(hdev, + DDC_HDCP_22_LSTORE, 0) == 0) + if (hdcp_rd_hdcp22_ver()) + ret = 22; + else + ret = 14; + else + ret = 14; + return ret; +} + /* Notic: the HDCP key setting has been moved to uboot * On MBX project, it is too late for HDCP get from * other devices @@ -107,9 +125,9 @@ static int __init hdmitx_hdcp_init(void) { struct hdmitx_dev *hdev = get_hdmitx_device(); - pr_info("hdmitx_hdcp_init\n"); + pr_info(HDCP "hdmitx_hdcp_init\n"); if (hdev->hdtx_dev == NULL) { - hdmi_print(IMP, SYS "exit for null device of hdmitx!\n"); + pr_info(HDCP "exit for null device of hdmitx!\n"); return -ENODEV; } diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.h index 44f1e029adea..ae39f444eff9 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.h +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_hdcp.h @@ -26,10 +26,8 @@ * On MBX project, it is too late for HDCP get from * other devices */ - -/* int task_tx_key_setting(unsigned force_wrong); */ - -int hdcp_ksv_valid(unsigned char *dat); +extern int hdcp_ksv_valid(unsigned char *dat); +extern unsigned int hdcp_get_downstream_ver(void); #endif diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c index 88786f341cc2..b331cfa2c40b 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_main.c @@ -37,11 +37,6 @@ #include #include #include -/* #include */ - -/* #include */ -#include "hdmi_tx_hdcp.h" - #include #include #include @@ -50,8 +45,8 @@ #include #include #include +#include -#include #include #include #ifdef CONFIG_AMLOGIC_SND_SOC @@ -61,11 +56,9 @@ #include #include #include -#include #include "hw/tvenc_conf.h" -#ifdef CONFIG_INSTABOOT -#include -#endif +#include "hw/common.h" +#include "hdmi_tx_hdcp.h" #define DEVICE_NAME "amhdmitx" #define HDMI_TX_COUNT 32 @@ -73,7 +66,6 @@ #define HDMI_TX_RESOURCE_NUM 4 #define HDMI_TX_PWR_CTRL_NUM 6 -static dev_t hdmitx_id; static struct class *hdmitx_class; static int set_disp_mode_auto(void); struct vinfo_s *hdmi_get_current_vinfo(void); @@ -81,39 +73,13 @@ static void hdmitx_get_edid(struct hdmitx_dev *hdev); static void hdmitx_set_drm_pkt(struct master_display_info_s *data); static void hdmitx_set_vsif_pkt(enum eotf_type type, uint8_t tunnel_mode); static int check_fbc_special(unsigned char *edid_dat); -static int hdcp_tst_sig; +static struct vinfo_s *hdmitx_get_current_vinfo(void); + static DEFINE_MUTEX(setclk_mutex); static DEFINE_MUTEX(getedid_mutex); -static atomic_t kref_audio_mute; -static atomic_t kref_video_mute; -static char fmt_attr[16]; static struct hdmitx_dev hdmitx_device; -#ifndef CONFIG_AMLOGIC_VOUT -/* Fake vinfo */ -struct vinfo_s vinfo_1080p60hz = { - .name = "1080p60hz", - .mode = VMODE_1080P, - .width = 1920, - .height = 1080, - .field_height = 1080, - .aspect_ratio_num = 16, - .aspect_ratio_den = 9, - .sync_duration_num = 60, - .sync_duration_den = 1, - .video_clk = 148500000, - .htotal = 2200, - .vtotal = 1125, - .viu_color_fmt = COLOR_FMT_YUV444, - .viu_mux = VIU_MUX_ENCP, -}; -struct vinfo_s *get_current_vinfo(void) -{ - return &vinfo_1080p60hz; -} -#endif - struct vout_device_s hdmitx_vdev = { .dv_info = &(hdmitx_device.RXCap.dv_info), .fresh_tx_hdr_pkt = hdmitx_set_drm_pkt, @@ -128,13 +94,11 @@ static const unsigned int hdmi_cable[] = { }; struct extcon_dev *hdmitx_extcon_hdmi; -struct extcon_dev *hdmitx_excton_audio; -struct extcon_dev *hdmitx_excton_power; -struct extcon_dev *hdmitx_excton_hdr; -struct extcon_dev *hdmitx_excton_rxsense; -struct extcon_dev *hdmitx_excton_hdcp; - -static int hdmi_init; +struct extcon_dev *hdmitx_extcon_audio; +struct extcon_dev *hdmitx_extcon_power; +struct extcon_dev *hdmitx_extcon_hdr; +struct extcon_dev *hdmitx_extcon_rxsense; +struct extcon_dev *hdmitx_extcon_hdcp; static inline void hdmitx_notify_hpd(int hpd) { @@ -158,14 +122,14 @@ static void hdmitx_early_suspend(struct early_suspend *h) msleep(20); phdmi->HWOp.CntlMisc(phdmi, MISC_AVMUTE_OP, SET_AVMUTE); mdelay(100); - hdmi_print(IMP, SYS "HDMITX: early suspend\n"); + pr_info(SYS "HDMITX: early suspend\n"); phdmi->HWOp.Cntl((struct hdmitx_dev *)h->param, HDMITX_EARLY_SUSPEND_RESUME_CNTL, HDMITX_EARLY_SUSPEND); phdmi->cur_VIC = HDMI_Unknown; phdmi->output_blank_flag = 0; phdmi->HWOp.CntlDDC(phdmi, DDC_HDCP_MUX_INIT, 1); phdmi->HWOp.CntlDDC(phdmi, DDC_HDCP_OP, HDCP14_OFF); - extcon_set_state_sync(hdmitx_excton_power, EXTCON_DISP_HDMI, 0); + extcon_set_state_sync(hdmitx_extcon_power, EXTCON_DISP_HDMI, 0); phdmi->HWOp.CntlConfig(&hdmitx_device, CONF_CLR_AVI_PACKET, 0); phdmi->HWOp.CntlConfig(&hdmitx_device, CONF_CLR_VSDB_PACKET, 0); } @@ -187,41 +151,37 @@ static void hdmitx_late_resume(struct early_suspend *h) if (info && (strncmp(info->name, "panel", 5) == 0 || strncmp(info->name, "null", 4) == 0)) { - hdmitx_device.HWOp.CntlConfig(&hdmitx_device, - CONF_VIDEO_BLANK_OP, VIDEO_UNBLANK); - return; + ; } else { - hdmitx_device.HWOp.CntlConfig(&hdmitx_device, - CONF_VIDEO_BLANK_OP, VIDEO_BLANK); - } + if (hdmitx_is_hdmi_vmode(info->name) == 1) + phdmi->HWOp.CntlMisc(&hdmitx_device, MISC_HPLL_FAKE, 0); - if (hdmitx_is_hdmi_vmode(info->name) == 1) - phdmi->HWOp.CntlMisc(&hdmitx_device, MISC_HPLL_FAKE, 0); + phdmi->hpd_lock = 0; - phdmi->hpd_lock = 0; - - /* update status for hpd and switch/state */ - hdmitx_device.hpd_state = !!(hdmitx_device.HWOp.CntlMisc(&hdmitx_device, + /* update status for hpd and switch/state */ + hdmitx_device.hpd_state = + !!(hdmitx_device.HWOp.CntlMisc(&hdmitx_device, MISC_HPD_GPI_ST, 0)); - hdmitx_notify_hpd(hdmitx_device.hpd_state); + hdmitx_notify_hpd(hdmitx_device.hpd_state); - /*force to get EDID after resume for Amplifer Power case*/ - if (hdmitx_device.hpd_state) - hdmitx_get_edid(phdmi); + /*force to get EDID after resume for Amplifer Power case*/ + if (hdmitx_device.hpd_state) + hdmitx_get_edid(phdmi); - hdmitx_device.HWOp.CntlConfig(&hdmitx_device, - CONF_AUDIO_MUTE_OP, AUDIO_MUTE); - set_disp_mode_auto(); + hdmitx_device.HWOp.CntlConfig(&hdmitx_device, + CONF_AUDIO_MUTE_OP, AUDIO_MUTE); + set_disp_mode_auto(); - extcon_set_state_sync(hdmitx_extcon_hdmi, EXTCON_DISP_HDMI, - hdmitx_device.hpd_state); - extcon_set_state_sync(hdmitx_excton_power, EXTCON_DISP_HDMI, - hdmitx_device.hpd_state); + extcon_set_state_sync(hdmitx_extcon_hdmi, EXTCON_DISP_HDMI, + hdmitx_device.hpd_state); + extcon_set_state_sync(hdmitx_extcon_power, EXTCON_DISP_HDMI, + hdmitx_device.hpd_state); - pr_info("amhdmitx: late resume module %d\n", __LINE__); - phdmi->HWOp.Cntl((struct hdmitx_dev *)h->param, - HDMITX_EARLY_SUSPEND_RESUME_CNTL, HDMITX_LATE_RESUME); - hdmi_print(INF, SYS "late resume\n"); + pr_info("amhdmitx: late resume module %d\n", __LINE__); + phdmi->HWOp.Cntl((struct hdmitx_dev *)h->param, + HDMITX_EARLY_SUSPEND_RESUME_CNTL, HDMITX_LATE_RESUME); + pr_info(SYS "late resume\n"); + } } /* Set avmute_set signal to HDMIRX */ @@ -245,33 +205,14 @@ static struct early_suspend hdmitx_early_suspend_handler = { }; #endif -/* static struct hdmitx_info hdmi_info; */ #define INIT_FLAG_VDACOFF 0x1 /* unplug powerdown */ #define INIT_FLAG_POWERDOWN 0x2 #define INIT_FLAG_NOT_LOAD 0x80 -int hdmi_ch = 1; /* 1: 2ch */ - static unsigned char init_flag; #undef DISABLE_AUDIO -/* if set to 1, then HDMI will output no audio */ -/* In KTV case, HDMI output Picture only, and Audio is driven by other - * sources. - */ -unsigned char hdmi_audio_off_flag; -/* - * 0, do not unmux hpd when off or unplug ; - * 1, unmux hpd when unplug; - * 2, unmux hpd when unplug or off; - */ -static int hpdmode = 1; -/* 0xffff=disable; 0=PRBS 11; 1=PRBS 15; 2=PRBS 7; 3=PRBS 31*/ -static int hdmi_prbs_mode = 0xffff; -static int hdmi_detect_when_booting = 1; -/* 1: error 2: important 3: normal 4: detailed */ -static int debug_level = INF; int get_cur_vout_index(void) /* @@ -319,9 +260,7 @@ static int set_disp_mode(const char *mode) return 0; } } -#if 0 - set_vmode_enc_hw(vic); -#endif + hdmitx_device.cur_VIC = HDMI_Unknown; ret = hdmitx_set_display(&hdmitx_device, vic); if (ret >= 0) { @@ -333,7 +272,7 @@ static int set_disp_mode(const char *mode) } if (hdmitx_device.cur_VIC == HDMI_Unknown) { - if (hpdmode == 2) { + if (hdmitx_device.hpdmode == 2) { /* edid will be read again when hpd is muxed and * it is high */ @@ -343,7 +282,7 @@ static int set_disp_mode(const char *mode) if (hdmitx_device.HWOp.Cntl) { hdmitx_device.HWOp.Cntl(&hdmitx_device, HDMITX_HWCMD_TURNOFF_HDMIHW, - (hpdmode == 2)?1:0); + (hdmitx_device.hpdmode == 2)?1:0); } } @@ -354,8 +293,6 @@ static void hdmitx_pre_display_init(void) { hdmitx_device.cur_VIC = HDMI_Unknown; hdmitx_device.auth_process_timer = AUTH_PROCESS_TIME; - hdmitx_device.HWOp.CntlConfig(&hdmitx_device, - CONF_VIDEO_BLANK_OP, VIDEO_BLANK); hdmitx_device.HWOp.CntlConfig(&hdmitx_device, CONF_AUDIO_MUTE_OP, AUDIO_MUTE); hdmitx_device.HWOp.CntlDDC(&hdmitx_device, DDC_HDCP_MUX_INIT, 1); @@ -387,6 +324,9 @@ static void recalc_vinfo_sync_duration(struct vinfo_s *info, unsigned int frac) { struct frac_rate_table *fr = &fr_tab[0]; + pr_info(SYS "recalc before %s %d %d\n", info->name, + info->sync_duration_num, info->sync_duration_den); + while (fr->hz) { if (strstr(info->name, fr->hz)) { if (frac) { @@ -400,6 +340,9 @@ static void recalc_vinfo_sync_duration(struct vinfo_s *info, unsigned int frac) } fr++; } + + pr_info(SYS "recalc after %s %d %d\n", info->name, + info->sync_duration_num, info->sync_duration_den); } static void hdmi_physcial_size_update(struct vinfo_s *info, @@ -408,7 +351,7 @@ static void hdmi_physcial_size_update(struct vinfo_s *info, unsigned int width, height; if (info == NULL) { - hdmi_print(ERR, VID "cann't get valid mode\n"); + pr_info(SYS "cann't get valid mode\n"); return; } @@ -421,7 +364,7 @@ static void hdmi_physcial_size_update(struct vinfo_s *info, info->screen_real_width = width * 10; /* transfer mm */ info->screen_real_height = height * 10; /* transfer mm */ } - pr_info("hdmitx: update physcial size: %d %d\n", + pr_info(SYS "update physcial size: %d %d\n", info->screen_real_width, info->screen_real_height); } @@ -440,8 +383,8 @@ static int set_disp_mode_auto(void) memset(mode, 0, sizeof(mode)); /* get current vinfo */ - info = hdmi_get_current_vinfo(); - hdmi_print(IMP, VID "get current mode: %s\n", + info = hdmitx_get_current_vinfo(); + pr_info(SYS "get current mode: %s\n", info ? info->name : "null"); if (info == NULL) return -1; @@ -455,7 +398,7 @@ static int set_disp_mode_auto(void) info->hdr_info.lumi_max = hdev->RXCap.hdr_lum_max; info->hdr_info.lumi_avg = hdev->RXCap.hdr_lum_avg; info->hdr_info.lumi_min = hdev->RXCap.hdr_lum_min; - pr_info("hdmitx: update rx hdr info %x\n", + pr_info(SYS "update rx hdr info %x\n", info->hdr_info.hdr_support); } hdmi_physcial_size_update(info, hdev); @@ -469,12 +412,11 @@ static int set_disp_mode_auto(void) (strncmp(info->name, "pal_n", 5) == 0) || (strncmp(info->name, "panel", 5) == 0) || (strncmp(info->name, "null", 4) == 0)) { - hdmi_print(ERR, VID "%s not valid hdmi mode\n", info->name); + pr_info(SYS "%s not valid hdmi mode\n", info->name); hdev->HWOp.CntlConfig(hdev, CONF_CLR_AVI_PACKET, 0); hdev->HWOp.CntlConfig(hdev, CONF_CLR_VSDB_PACKET, 0); hdev->HWOp.CntlMisc(hdev, MISC_TMDS_PHY_OP, TMDS_PHY_DISABLE); - hdev->HWOp.CntlConfig(hdev, CONF_VIDEO_BLANK_OP, VIDEO_UNBLANK); - hdev->para = para = hdmi_get_fmt_name("invalid", fmt_attr); + hdev->para = hdmi_get_fmt_name("invalid", hdev->fmt_attr); return -1; } memcpy(mode, info->name, strlen(info->name)); @@ -498,13 +440,13 @@ static int set_disp_mode_auto(void) * as two different modes, such Scrambler * So if node "attr" contains 420, need append 420 to mode. */ - if (strstr(fmt_attr, "420")) { + if (strstr(hdev->fmt_attr, "420")) { if (!strstr(mode, "420")) strncat(mode, "420", 3); } - para = hdmi_get_fmt_name(mode, fmt_attr); + + para = hdmi_get_fmt_name(mode, hdev->fmt_attr); hdev->para = para; - /* msleep(500); */ vic = hdmitx_edid_get_VIC(hdev, mode, 1); if (strncmp(info->name, "2160p30hz", strlen("2160p30hz")) == 0) { vic = HDMI_4k2k_30; @@ -521,7 +463,7 @@ static int set_disp_mode_auto(void) /* nothing */ } if ((vic_ready != HDMI_Unknown) && (vic_ready == vic)) { - hdmi_print(IMP, SYS "[%s] ALREADY init VIC = %d\n", + pr_info(SYS "[%s] ALREADY init VIC = %d\n", __func__, vic); if (hdev->RXCap.IEEEOUI == 0) { /* DVI case judgement. In uboot, directly output HDMI @@ -529,29 +471,28 @@ static int set_disp_mode_auto(void) */ hdev->HWOp.CntlConfig(hdev, CONF_HDMI_DVI_MODE, DVI_MODE); - hdmi_print(IMP, SYS "change to DVI mode\n"); + pr_info(SYS "change to DVI mode\n"); } else if ((hdev->RXCap.IEEEOUI == 0xc03) && (hdev->HWOp.CntlConfig(hdev, CONF_GET_HDMI_DVI_MODE, 0) == DVI_MODE)) { hdev->HWOp.CntlConfig(hdev, CONF_HDMI_DVI_MODE, HDMI_MODE); - hdmi_print(IMP, SYS "change to HDMI mode\n"); + pr_info(SYS "change to HDMI mode\n"); } hdev->cur_VIC = vic; hdev->output_blank_flag = 1; hdev->ready = 1; return 1; } + hdmitx_pre_display_init(); hdev->cur_VIC = HDMI_Unknown; /* if vic is HDMI_Unknown, hdmitx_set_display will disable HDMI */ ret = hdmitx_set_display(hdev, vic); - pr_info("%s %d %d\n", info->name, info->sync_duration_num, - info->sync_duration_den); + recalc_vinfo_sync_duration(info, hdev->frac_rate_policy); - pr_info("%s %d %d\n", info->name, info->sync_duration_num, - info->sync_duration_den); + if (ret >= 0) { hdev->HWOp.Cntl(hdev, HDMITX_AVMUTE_CNTL, AVMUTE_CLEAR); hdev->cur_VIC = vic; @@ -559,7 +500,7 @@ static int set_disp_mode_auto(void) hdev->auth_process_timer = AUTH_PROCESS_TIME; } if (hdev->cur_VIC == HDMI_Unknown) { - if (hpdmode == 2) { + if (hdev->hpdmode == 2) { /* edid will be read again when hpd is muxed * and it is high */ @@ -569,10 +510,10 @@ static int set_disp_mode_auto(void) /* If current display is NOT panel, needn't TURNOFF_HDMIHW */ if (strncmp(mode, "panel", 5) == 0) { hdev->HWOp.Cntl(hdev, HDMITX_HWCMD_TURNOFF_HDMIHW, - (hpdmode == 2)?1:0); + (hdev->hpdmode == 2)?1:0); } } - hdmitx_set_audio(hdev, &(hdev->cur_audio_param), hdmi_ch); + hdmitx_set_audio(hdev, &(hdev->cur_audio_param)); hdev->output_blank_flag = 1; hdev->ready = 1; return ret; @@ -601,14 +542,14 @@ static ssize_t show_attr(struct device *dev, { int pos = 0; - pos += snprintf(buf+pos, PAGE_SIZE, "%s\n\r", fmt_attr); + pos += snprintf(buf+pos, PAGE_SIZE, "%s\n\r", hdmitx_device.fmt_attr); return pos; } static ssize_t store_attr(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { - memcpy(fmt_attr, buf, sizeof(fmt_attr)); + memcpy(hdmitx_device.fmt_attr, buf, sizeof(hdmitx_device.fmt_attr)); return count; } @@ -701,7 +642,6 @@ PROCESS_END: return 0; } -unsigned int use_loaded_edid; static int load_edid_data(unsigned int type, char *path) { struct file *filp = NULL; @@ -770,7 +710,7 @@ static ssize_t store_edid(struct device *dev, if (buf[0] == 'h') { int i; - hdmi_print(INF, EDID "EDID hash value:\n"); + pr_info(EDID "EDID hash value:\n"); for (i = 0; i < 20; i++) pr_info("%02x", hdmitx_device.EDID_hash[i]); pr_info("\n"); @@ -784,12 +724,12 @@ static ssize_t store_edid(struct device *dev, if (block_idx < EDID_MAX_BLOCK) { for (ii = 0; ii < 8; ii++) { for (jj = 0; jj < 16; jj++) { - hdmi_print(INF, "%02x ", - hdmitx_device.EDID_buf[block_idx*128+ii*16+jj]); + pr_info(EDID "%02x ", + hdmitx_device.EDID_buf[block_idx*128+ii*16+jj]); } - hdmi_print(INF, "\n"); + pr_info("\n"); } - hdmi_print(INF, "\n"); + pr_info("\n"); } } if (buf[0] == 'e') { @@ -801,12 +741,12 @@ static ssize_t store_edid(struct device *dev, if (block_idx < EDID_MAX_BLOCK) { for (ii = 0; ii < 8; ii++) { for (jj = 0; jj < 16; jj++) { - hdmi_print(INF, "%02x ", + pr_info(EDID "%02x ", hdmitx_device.EDID_buf1[block_idx*128+ii*16+jj]); } - hdmi_print(INF, "\n"); + pr_info("\n"); } - hdmi_print(INF, "\n"); + pr_info("\n"); } } @@ -948,16 +888,12 @@ static ssize_t store_hdcp_repeater(struct device *dev, return count; } -/* - * hdcp22_type attr - */ -static bool hdcp22_type; static ssize_t show_hdcp22_type(struct device *dev, struct device_attribute *attr, char *buf) { int pos = 0; - pos += snprintf(buf+pos, PAGE_SIZE, "%d\n", hdcp22_type); + pos += snprintf(buf+pos, PAGE_SIZE, "%d\n", hdmitx_device.hdcp22_type); return pos; } @@ -966,9 +902,9 @@ static ssize_t store_hdcp22_type(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { if (buf[0] == '0') - hdcp22_type = 0; + hdmitx_device.hdcp22_type = 0; if (buf[0] == '1') - hdcp22_type = 1; + hdmitx_device.hdcp22_type = 1; return count; } @@ -1150,7 +1086,6 @@ static void hdmitx_set_drm_pkt(struct master_display_info_s *data) hdmitx_device.HWOp.SetPacket(HDMI_PACKET_DRM, NULL, NULL); hdmitx_device.HWOp.CntlConfig(&hdmitx_device, CONF_AVI_BT2020, CLR_AVI_BT2020); - return; } static void hdmitx_set_vsif_pkt(enum eotf_type type, uint8_t tunnel_mode) @@ -1162,7 +1097,7 @@ static void hdmitx_set_vsif_pkt(enum eotf_type type, uint8_t tunnel_mode) unsigned int vic = hdev->cur_VIC; unsigned int hdmi_vic_4k_flag = 0; - if (get_cpu_type() < MESON_CPU_MAJOR_ID_GXL) { + if (hdev->chip_type < MESON_CPU_ID_GXL) { pr_info("hdmitx: not support DolbyVision\n"); return; } @@ -1287,11 +1222,8 @@ static ssize_t store_config(struct device *dev, int ret = 0; pr_info("hdmitx: config: %s\n", buf); - if (strncmp(buf, "force", 5) == 0) - hdmitx_device.disp_switch_config = DISP_SWITCH_FORCE; - else if (strncmp(buf, "edid", 4) == 0) - hdmitx_device.disp_switch_config = DISP_SWITCH_EDID; - else if (strncmp(buf, "unplug_powerdown", 16) == 0) { + + if (strncmp(buf, "unplug_powerdown", 16) == 0) { if (buf[16] == '0') hdmitx_device.unplug_powerdown = 0; else @@ -1330,18 +1262,18 @@ static ssize_t store_config(struct device *dev, } else if (strncmp(buf, "audio_", 6) == 0) { if (strncmp(buf+6, "off", 3) == 0) { hdmitx_audio_mute_op(0); - hdmi_print(IMP, AUD "configure off\n"); + pr_info(AUD "configure off\n"); } else if (strncmp(buf+6, "on", 2) == 0) { hdmitx_audio_mute_op(1); - hdmi_print(IMP, AUD "configure on\n"); + pr_info(AUD "configure on\n"); } else if (strncmp(buf+6, "auto", 4) == 0) { /* auto mode. if sink doesn't support current * audio format, then no audio output */ hdmitx_device.tx_aud_cfg = 2; - hdmi_print(IMP, AUD "configure auto\n"); + pr_info(AUD "configure auto\n"); } else - hdmi_print(ERR, AUD "configure error\n"); + pr_info(AUD "configure error\n"); } else if (strncmp(buf, "drm", 3) == 0) { unsigned char DRM_HB[3] = {0x87, 0x1, 26}; unsigned char DRM_DB[26] = { @@ -1351,7 +1283,7 @@ static ssize_t store_config(struct device *dev, 0x00, 0x00, }; - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXTVBB) + if (hdmitx_device.chip_type >= MESON_CPU_ID_GXTVBB) hdmitx_device.HWOp.SetPacket(HDMI_PACKET_DRM, DRM_DB, DRM_HB); } else if (strncmp(buf, "vsif", 4) == 0) @@ -1366,13 +1298,15 @@ static ssize_t show_aud_mute(struct device *dev, int pos = 0; pos += snprintf(buf+pos, PAGE_SIZE, "%d\n", - atomic_read(&kref_audio_mute)); + atomic_read(&(hdmitx_device.kref_audio_mute))); return pos; } static ssize_t store_aud_mute(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { + atomic_t kref_audio_mute = hdmitx_device.kref_audio_mute; + if (buf[0] == '1') { atomic_inc(&kref_audio_mute); if (atomic_read(&kref_audio_mute) == 1) @@ -1386,6 +1320,8 @@ static ssize_t store_aud_mute(struct device *dev, } } + hdmitx_device.kref_audio_mute = kref_audio_mute; + return count; } @@ -1395,13 +1331,15 @@ static ssize_t show_vid_mute(struct device *dev, int pos = 0; pos += snprintf(buf+pos, PAGE_SIZE, "%d\n", - atomic_read(&kref_video_mute)); + atomic_read(&(hdmitx_device.kref_video_mute))); return pos; } static ssize_t store_vid_mute(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { + atomic_t kref_video_mute = hdmitx_device.kref_video_mute; + if (buf[0] == '1') { atomic_inc(&kref_video_mute); if (atomic_read(&kref_video_mute) == 1) @@ -1415,6 +1353,8 @@ static ssize_t store_vid_mute(struct device *dev, } } + hdmitx_device.kref_video_mute = kref_video_mute; + return count; } @@ -1707,10 +1647,10 @@ static ssize_t show_valid_mode(struct device *dev, para = hdmi_get_fmt_name(cvalid_mode, cvalid_mode); } if (para) { - pr_info("sname = %s\n", para->sname); - pr_info("char_clk = %d\n", para->tmds_clk); - pr_info("cd = %d\n", para->cd); - pr_info("cs = %d\n", para->cs); + pr_info(SYS "sname = %s\n", para->sname); + pr_info(SYS "char_clk = %d\n", para->tmds_clk); + pr_info(SYS "cd = %d\n", para->cd); + pr_info(SYS "cs = %d\n", para->cs); } valid_mode = hdmitx_edid_check_valid_mode(&hdmitx_device, para); @@ -1795,7 +1735,8 @@ static ssize_t show_aud_ch(struct device *dev, int pos = 0; pos += snprintf(buf + pos, PAGE_SIZE, - "hdmi_channel = %d ch\n", hdmi_ch ? hdmi_ch + 1 : 0); + "hdmi_channel = %d ch\n", + hdmitx_device.hdmi_ch ? hdmitx_device.hdmi_ch + 1 : 0); return pos; } @@ -1803,11 +1744,11 @@ static ssize_t store_aud_ch(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { if (strncmp(buf, "6ch", 3) == 0) - hdmi_ch = 5; + hdmitx_device.hdmi_ch = 5; else if (strncmp(buf, "8ch", 3) == 0) - hdmi_ch = 7; + hdmitx_device.hdmi_ch = 7; else if (strncmp(buf, "2ch", 3) == 0) - hdmi_ch = 1; + hdmitx_device.hdmi_ch = 1; else return count; @@ -1855,7 +1796,8 @@ static ssize_t store_aud_output_chs(struct device *dev, hdev->aud_output_ch = 0; if (update_flag != hdev->aud_output_ch) { update_flag = hdev->aud_output_ch; - hdmitx_set_audio(hdev, &(hdev->cur_audio_param), 0); + hdev->hdmi_ch = 0; + hdmitx_set_audio(hdev, &(hdev->cur_audio_param)); } return count; } @@ -1874,7 +1816,8 @@ static ssize_t store_aud_output_chs(struct device *dev, if (update_flag != hdev->aud_output_ch) { update_flag = hdev->aud_output_ch; - hdmitx_set_audio(hdev, &(hdev->cur_audio_param), 0); + hdev->hdmi_ch = 0; + hdmitx_set_audio(hdev, &(hdev->cur_audio_param)); } return count; } @@ -1896,7 +1839,7 @@ static ssize_t store_avmute(struct device *dev, else if (strncmp(buf, "1", 1) == 0) cmd = SET_AVMUTE; else - pr_info("set avmute wrong: %s\n", buf); + pr_info(SYS "set avmute wrong: %s\n", buf); hdmitx_device.HWOp.CntlMisc(&hdmitx_device, MISC_AVMUTE_OP, cmd); return count; @@ -1946,12 +1889,14 @@ static ssize_t store_phy(struct device *dev, { int cmd = TMDS_PHY_ENABLE; + pr_info(SYS "store_phy %s\n", buf); + if (strncmp(buf, "0", 1) == 0) cmd = TMDS_PHY_DISABLE; else if (strncmp(buf, "1", 1) == 0) cmd = TMDS_PHY_ENABLE; else - pr_info("hdmitx: set phy wrong: %s\n", buf); + pr_info(SYS "set phy wrong: %s\n", buf); hdmitx_device.HWOp.CntlMisc(&hdmitx_device, MISC_TMDS_PHY_OP, cmd); return count; @@ -1970,11 +1915,11 @@ static ssize_t store_rxsense_policy(struct device *dev, if (isdigit(buf[0])) { val = buf[0] - '0'; - pr_info("hdmitx: set rxsense_policy as %d\n", val); + pr_info(SYS "hdmitx: set rxsense_policy as %d\n", val); if ((val == 0) || (val == 1)) hdmitx_device.rxsense_policy = val; else - pr_info("only accept as 0 or 1\n"); + pr_info(SYS "only accept as 0 or 1\n"); } if (hdmitx_device.rxsense_policy) queue_delayed_work(hdmitx_device.rxsense_wq, @@ -1997,6 +1942,34 @@ static ssize_t show_rxsense_policy(struct device *dev, return pos; } +static ssize_t store_sspll(struct device *dev, + struct device_attribute *attr, const char *buf, size_t count) +{ + int val = 0; + + if (isdigit(buf[0])) { + val = buf[0] - '0'; + pr_info(SYS "set sspll : %d\n", val); + if ((val == 0) || (val == 1)) + hdmitx_device.sspll = val; + else + pr_info(SYS "sspll only accept as 0 or 1\n"); + } + + return count; +} + +static ssize_t show_sspll(struct device *dev, + struct device_attribute *attr, char *buf) +{ + int pos = 0; + + pos += snprintf(buf + pos, PAGE_SIZE, "%d\n", + hdmitx_device.sspll); + + return pos; +} + static ssize_t store_frac_rate(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { @@ -2004,11 +1977,11 @@ static ssize_t store_frac_rate(struct device *dev, if (isdigit(buf[0])) { val = buf[0] - '0'; - pr_info("hdmitx: set frac_rate_policy as %d\n", val); + pr_info(SYS "set frac_rate_policy as %d\n", val); if ((val == 0) || (val == 1)) hdmitx_device.frac_rate_policy = val; else - pr_info("only accept as 0 or 1\n"); + pr_info(SYS "only accept as 0 or 1\n"); } return count; @@ -2043,8 +2016,8 @@ static ssize_t store_hdcp_pwr(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { if (buf[0] == '1') { - hdcp_tst_sig = 1; - pr_info("set hdcp_pwr 1\n"); + hdmitx_device.hdcp_tst_sig = 1; + pr_info(SYS "set hdcp_pwr 1\n"); } return count; @@ -2055,10 +2028,11 @@ static ssize_t show_hdcp_pwr(struct device *dev, { int pos = 0; - if (hdcp_tst_sig == 1) { - pos += snprintf(buf + pos, PAGE_SIZE, "%d\n", hdcp_tst_sig); - hdcp_tst_sig = 0; - pr_info("restore hdcp_pwr 0\n"); + if (hdmitx_device.hdcp_tst_sig == 1) { + pos += snprintf(buf + pos, PAGE_SIZE, "%d\n", + hdmitx_device.hdcp_tst_sig); + hdmitx_device.hdcp_tst_sig = 0; + pr_info(SYS "restore hdcp_pwr 0\n"); } return pos; @@ -2067,32 +2041,33 @@ static ssize_t show_hdcp_pwr(struct device *dev, static ssize_t store_hdcp_byp(struct device *dev, struct device_attribute *attr, const char *buf, size_t count) { + pr_info(SYS "store_hdcp_byp\n"); + hdmitx_device.HWOp.CntlMisc(&hdmitx_device, MISC_HDCP_CLKDIS, buf[0] == '1' ? 1 : 0); return count; } -static int lstore; static ssize_t show_hdcp_lstore(struct device *dev, struct device_attribute *attr, char *buf) { int pos = 0; - if (lstore < 0x10) { - lstore = 0; + if (hdmitx_device.lstore < 0x10) { + hdmitx_device.lstore = 0; if (hdmitx_device.HWOp.CntlDDC(&hdmitx_device, DDC_HDCP_14_LSTORE, 0)) - lstore += 1; + hdmitx_device.lstore += 1; if (hdmitx_device.HWOp.CntlDDC(&hdmitx_device, DDC_HDCP_22_LSTORE, 0)) - lstore += 2; + hdmitx_device.lstore += 2; } - if (lstore & 0x1) + if (hdmitx_device.lstore & 0x1) pos += snprintf(buf + pos, PAGE_SIZE, "14\n"); - if (lstore & 0x2) + if (hdmitx_device.lstore & 0x2) pos += snprintf(buf + pos, PAGE_SIZE, "22\n"); - if ((lstore & 0xf) == 0) + if ((hdmitx_device.lstore & 0xf) == 0) pos += snprintf(buf + pos, PAGE_SIZE, "00\n"); return pos; } @@ -2102,25 +2077,23 @@ static ssize_t store_hdcp_lstore(struct device *dev, { pr_info("hdcp: set lstore as %s\n", buf); if (strncmp(buf, "0", 1) == 0) - lstore = 0x10; + hdmitx_device.lstore = 0x10; if (strncmp(buf, "11", 2) == 0) - lstore = 0x11; + hdmitx_device.lstore = 0x11; if (strncmp(buf, "12", 2) == 0) - lstore = 0x12; + hdmitx_device.lstore = 0x12; if (strncmp(buf, "13", 2) == 0) - lstore = 0x13; + hdmitx_device.lstore = 0x13; return count; } -static unsigned int div40 = -1; static ssize_t show_div40(struct device *dev, struct device_attribute *attr, char *buf) { int pos = 0; - if (div40 != -1) - pos += snprintf(buf + pos, PAGE_SIZE, "%d\n", div40); + pos += snprintf(buf + pos, PAGE_SIZE, "%d\n", hdmitx_device.div40); return pos; } @@ -2131,7 +2104,7 @@ static ssize_t store_div40(struct device *dev, struct hdmitx_dev *hdev = &hdmitx_device; hdev->HWOp.CntlDDC(hdev, DDC_SCDC_DIV40_SCRAMB, buf[0] == '1'); - div40 = (buf[0] == '1'); + hdmitx_device.div40 = (buf[0] == '1'); return count; } @@ -2169,7 +2142,7 @@ static ssize_t store_hdcp_mode(struct device *dev, hdmitx_device.HWOp.CntlDDC(&hdmitx_device, DDC_PIN_MUX_OP, PIN_MUX); #endif - pr_info("hdcp: set mode as %s\n", buf); + pr_info(SYS "hdcp: set mode as %s\n", buf); hdmitx_device.HWOp.CntlDDC(&hdmitx_device, DDC_HDCP_MUX_INIT, 1); if (strncmp(buf, "0", 1) == 0) { hdmitx_device.hdcp_mode = 0; @@ -2316,7 +2289,7 @@ static ssize_t show_hdmi_init(struct device *dev, { int pos = 0; - pos += snprintf(buf+pos, PAGE_SIZE, "%d\n\r", hdmi_init); + pos += snprintf(buf+pos, PAGE_SIZE, "%d\n\r", hdmitx_device.hdmi_init); return pos; } @@ -2350,20 +2323,6 @@ static ssize_t show_support_3d(struct device *dev, return pos; } -void hdmi_print(int dbg_lvl, const char *fmt, ...) -{ - va_list args; -#if 0 - if (dbg_lvl == OFF) - return; -#endif - if (dbg_lvl <= debug_level) { - va_start(args, fmt); - vprintk(fmt, args); - va_end(args); - } -} - static DEVICE_ATTR(disp_mode, 0664, show_disp_mode, store_disp_mode); static DEVICE_ATTR(attr, 0664, show_attr, store_attr); static DEVICE_ATTR(aud_mode, 0644, show_aud_mode, store_aud_mode); @@ -2388,6 +2347,7 @@ static DEVICE_ATTR(aud_output_chs, 0664, show_aud_output_chs, static DEVICE_ATTR(avmute, 0664, show_avmute, store_avmute); static DEVICE_ATTR(vic, 0664, show_vic, store_vic); static DEVICE_ATTR(phy, 0664, show_phy, store_phy); +static DEVICE_ATTR(sspll, 0664, show_sspll, store_sspll); static DEVICE_ATTR(frac_rate_policy, 0664, show_frac_rate, store_frac_rate); static DEVICE_ATTR(rxsense_policy, 0644, show_rxsense_policy, store_rxsense_policy); @@ -2410,10 +2370,10 @@ static DEVICE_ATTR(hdmi_init, 0444, show_hdmi_init, NULL); static DEVICE_ATTR(ready, 0664, show_ready, store_ready); static DEVICE_ATTR(support_3d, 0444, show_support_3d, NULL); -struct vinfo_s *hdmi_info; -static struct vinfo_s *hdmitx_get_current_info(void) +static struct vinfo_s *hdmitx_vinfo; +static struct vinfo_s *hdmitx_get_current_vinfo(void) { - return hdmi_info; + return hdmitx_vinfo; } static int hdmitx_set_current_vmode(enum vmode_e mode) @@ -2422,7 +2382,7 @@ static int hdmitx_set_current_vmode(enum vmode_e mode) if (!(mode & VMODE_INIT_BIT_MASK)) set_disp_mode_auto(); else - pr_info("hdmitx: alread display in uboot\n"); + pr_info("alread display in uboot\n"); return 0; } @@ -2432,8 +2392,8 @@ static enum vmode_e hdmitx_validate_vmode(char *mode) struct vinfo_s *info = hdmi_get_valid_vinfo(mode); if (info) { - hdmi_info = info; - hdmi_info->vout_device = &hdmitx_vdev; + hdmitx_vinfo = info; + hdmitx_vinfo->vout_device = &hdmitx_vdev; return VMODE_HDMI; } return VMODE_MAX; @@ -2448,15 +2408,21 @@ static int hdmitx_vmode_is_supported(enum vmode_e mode) } static int hdmitx_module_disable(enum vmode_e cur_vmod) -{ /* TODO */ +{ + struct hdmitx_dev *hdev = &hdmitx_device; + + hdev->HWOp.CntlConfig(hdev, CONF_CLR_AVI_PACKET, 0); + hdev->HWOp.CntlConfig(hdev, CONF_CLR_VSDB_PACKET, 0); + hdev->HWOp.CntlMisc(hdev, MISC_TMDS_PHY_OP, TMDS_PHY_DISABLE); + hdev->para = hdmi_get_fmt_name("invalid", hdev->fmt_attr); + return 0; } - static struct vout_server_s hdmitx_server = { .name = "vout_hdmitx_server", .op = { - .get_vinfo = hdmitx_get_current_info, + .get_vinfo = hdmitx_get_current_vinfo, .set_vmode = hdmitx_set_current_vmode, .validate_vmode = hdmitx_validate_vmode, .vmode_is_supported = hdmitx_vmode_is_supported, @@ -2492,12 +2458,12 @@ static enum hdmi_audio_fs aud_samp_rate_map(unsigned int rate) for (i = 0; i < ARRAY_SIZE(map_fs); i++) { if (map_fs[i].rate == rate) { - hdmi_print(IMP, AUD "aout notify rate %d\n", + pr_info(AUD "aout notify rate %d\n", rate); return map_fs[i].fs; } } - hdmi_print(IMP, AUD "get FS_MAX\n"); + pr_info(AUD "get FS_MAX\n"); return FS_MAX; } @@ -2534,12 +2500,12 @@ static enum hdmi_audio_sampsize aud_size_map(unsigned int bits) for (i = 0; i < ARRAY_SIZE(aud_size_map_ss); i++) { if (bits == aud_size_map_ss[i].sample_bits) { - hdmi_print(IMP, AUD "aout notify size %d\n", + pr_info(AUD "aout notify size %d\n", bits); return aud_size_map_ss[i].ss; } } - hdmi_print(IMP, AUD "get SS_MAX\n"); + pr_info(AUD "get SS_MAX\n"); return SS_MAX; } @@ -2571,7 +2537,7 @@ static int hdmitx_notify_callback_a(struct notifier_block *block, if (audio_param->type != cmd) { audio_param->type = cmd; - hdmi_print(INF, AUD "aout notify format %s\n", + pr_info(AUD "aout notify format %s\n", aud_type_string[audio_param->type & 0xff]); hdmitx_device.audio_param_update_flag = 1; } @@ -2588,7 +2554,7 @@ static int hdmitx_notify_callback_a(struct notifier_block *block, hdmitx_device.audio_param_update_flag = 1; } if (hdmitx_device.tx_aud_cfg == 2) { - hdmi_print(INF, AUD "auto mode\n"); + pr_info(AUD "auto mode\n"); /* Detect whether Rx is support current audio format */ for (i = 0; i < pRXCap->AUD_count; i++) { if (pRXCap->RxAudioCap[i].audio_format_code == cmd) @@ -2604,33 +2570,30 @@ static int hdmitx_notify_callback_a(struct notifier_block *block, } } if (hdmitx_device.audio_param_update_flag == 0) - hdmi_print(INF, AUD "no update\n"); + pr_info(AUD "no update\n"); else hdmitx_device.audio_notify_flag = 1; - if ((!hdmi_audio_off_flag) && + if ((!(hdmitx_device.hdmi_audio_off_flag)) && (hdmitx_device.audio_param_update_flag)) { /* plug-in & update audio param */ if (hdmitx_device.hpd_state == 1) { hdmitx_set_audio(&hdmitx_device, - &(hdmitx_device.cur_audio_param), hdmi_ch); + &(hdmitx_device.cur_audio_param)); if ((hdmitx_device.audio_notify_flag == 1) || (hdmitx_device.audio_step == 1)) { hdmitx_device.audio_notify_flag = 0; hdmitx_device.audio_step = 0; } hdmitx_device.audio_param_update_flag = 0; - hdmi_print(INF, AUD "set audio param\n"); + pr_info(AUD "set audio param\n"); } } - return 0; } -struct i2c_client *i2c_edid_client; - static void hdmitx_get_edid(struct hdmitx_dev *hdev) { mutex_lock(&getedid_mutex); @@ -2653,20 +2616,6 @@ static void hdmitx_get_edid(struct hdmitx_dev *hdev) mutex_unlock(&getedid_mutex); } -static int get_downstream_hdcp_ver(void) -{ - /* if TX don't have HDCP22 key, skip RX hdcp22 ver */ - if (hdmitx_device.HWOp.CntlDDC(&hdmitx_device, - DDC_HDCP_22_LSTORE, 0) == 0) - goto next; - if (hdcp_rd_hdcp22_ver()) - return 22; -next: - /* if (hdcp_rd_hdcp14_ver()) */ - return 14; -} - - static void hdmitx_rxsense_process(struct work_struct *work) { int sense; @@ -2674,7 +2623,7 @@ static void hdmitx_rxsense_process(struct work_struct *work) struct hdmitx_dev, work_rxsense); sense = hdev->HWOp.CntlMisc(hdev, MISC_TMDS_RXSENSE, 0); - extcon_set_state_sync(hdmitx_excton_rxsense, EXTCON_DISP_HDMI, sense); + extcon_set_state_sync(hdmitx_extcon_rxsense, EXTCON_DISP_HDMI, sense); queue_delayed_work(hdev->rxsense_wq, &hdev->work_rxsense, HZ); } @@ -2689,11 +2638,11 @@ static void hdmitx_hpd_plugin_handler(struct work_struct *work) if (hdev->rxsense_policy) { cancel_delayed_work(&hdev->work_rxsense); queue_delayed_work(hdev->rxsense_wq, &hdev->work_rxsense, 0); - while (!(hdmitx_excton_rxsense->state)) + while (!(hdmitx_extcon_rxsense->state)) msleep_interruptible(1000); } mutex_lock(&setclk_mutex); - pr_info("hdmitx: plugin\n"); + pr_info(SYS "plugin\n"); hdev->hdmitx_event &= ~HDMI_TX_HPD_PLUGIN; /* start reading E-EDID */ if (hdev->repeater_tx) @@ -2708,32 +2657,32 @@ static void hdmitx_hpd_plugin_handler(struct work_struct *work) rx_set_repeater_support(0); else rx_set_repeater_support(1); - rx_repeat_hdcp_ver(get_downstream_hdcp_ver()); + rx_repeat_hdcp_ver(hdcp_get_downstream_ver()); hdev->HWOp.CntlDDC(hdev, DDC_HDCP_GET_BKSV, (unsigned long int)bksv_buf); rx_set_receive_hdcp(bksv_buf, 1, 1, 0, 0); } set_disp_mode_auto(); - hdmitx_set_audio(hdev, &(hdev->cur_audio_param), hdmi_ch); + hdmitx_set_audio(hdev, &(hdev->cur_audio_param)); hdev->hpd_state = 1; hdmitx_notify_hpd(hdev->hpd_state); extcon_set_state_sync(hdmitx_extcon_hdmi, EXTCON_DISP_HDMI, 1); - extcon_set_state_sync(hdmitx_excton_audio, EXTCON_DISP_HDMI, 1); + extcon_set_state_sync(hdmitx_extcon_audio, EXTCON_DISP_HDMI, 1); mutex_unlock(&setclk_mutex); } static void clear_hdr_info(struct hdmitx_dev *hdev) { - struct vinfo_s *info = get_current_vinfo(); + struct vinfo_s *info = hdmitx_get_current_vinfo(); if (info) { info->hdr_info.hdr_support = 0; info->hdr_info.lumi_max = 0; info->hdr_info.lumi_avg = 0; info->hdr_info.lumi_min = 0; - pr_info("hdmitx: clear RX hdr info\n"); + pr_info(SYS "clear RX hdr info\n"); } } @@ -2746,12 +2695,11 @@ static void hdmitx_hpd_plugout_handler(struct work_struct *work) return; hdev->hdcp_mode = 0; hdev->hdcp_bcaps_repeater = 0; - hdev->HWOp.CntlDDC(hdev, DDC_HDCP_MUX_INIT, 1); - hdev->HWOp.CntlDDC(hdev, DDC_HDCP_OP, HDCP14_OFF); + mutex_lock(&setclk_mutex); - pr_info("hdmitx: plugout\n"); + pr_info(SYS "plugout\n"); if (!!(hdev->HWOp.CntlMisc(hdev, MISC_HPD_GPI_ST, 0))) { - pr_info("hdmitx: hpd gpi high\n"); + pr_info(SYS "hpd gpio high\n"); hdev->hdmitx_event &= ~HDMI_TX_HPD_PLUGOUT; mutex_unlock(&setclk_mutex); return; @@ -2772,7 +2720,7 @@ static void hdmitx_hpd_plugout_handler(struct work_struct *work) hdmitx_notify_hpd(hdev->hpd_state); extcon_set_state_sync(hdmitx_extcon_hdmi, EXTCON_DISP_HDMI, 0); - extcon_set_state_sync(hdmitx_excton_audio, EXTCON_DISP_HDMI, 0); + extcon_set_state_sync(hdmitx_extcon_audio, EXTCON_DISP_HDMI, 0); mutex_unlock(&setclk_mutex); } @@ -2818,7 +2766,7 @@ static int hdmi_task_handle(void *data) hdmitx_device, MISC_HPD_GPI_ST, 0)); hdmitx_device->hpd_state = hdmitx_extcon_hdmi->state; hdmitx_notify_hpd(hdmitx_device->hpd_state); - extcon_set_state_sync(hdmitx_excton_power, EXTCON_DISP_HDMI, + extcon_set_state_sync(hdmitx_extcon_power, EXTCON_DISP_HDMI, hdmitx_device->hpd_state); INIT_WORK(&hdmitx_device->work_hdr, hdr_work_func); @@ -2835,7 +2783,7 @@ static int hdmi_task_handle(void *data) hdmitx_internal_intr_handler); /* for rx sense feature */ - hdmitx_device->rxsense_wq = alloc_workqueue(hdmitx_excton_rxsense->name, + hdmitx_device->rxsense_wq = alloc_workqueue(hdmitx_extcon_rxsense->name, WQ_SYSFS | WQ_FREEZABLE, 0); INIT_DELAYED_WORK(&hdmitx_device->work_rxsense, hdmitx_rxsense_process); @@ -2843,12 +2791,12 @@ static int hdmi_task_handle(void *data) hdmitx_device->HWOp.SetupIRQ(hdmitx_device); - /* Trigger */ + /* Trigger HDMITX IRQ*/ hdmitx_device->HWOp.CntlMisc(hdmitx_device, MISC_HPD_MUX_OP, PIN_UNMUX); mdelay(20); hdmitx_device->HWOp.CntlMisc(hdmitx_device, MISC_HPD_MUX_OP, PIN_MUX); - hdmi_init = 1; + hdmitx_device->hdmi_init = 1; return 0; } @@ -2872,12 +2820,6 @@ static int amhdmitx_open(struct inode *node, struct file *file) static int amhdmitx_release(struct inode *node, struct file *file) { - /* struct hdmitx_dev *hdmitx_in_devp = file->private_data; */ - - /* Reset file pointer */ - - /* Release some other fields */ - /* ... */ return 0; } @@ -2885,7 +2827,6 @@ static const struct file_operations amhdmitx_fops = { .owner = THIS_MODULE, .open = amhdmitx_open, .release = amhdmitx_release, -/* .ioctl = amhdmitx_ioctl, */ }; struct hdmitx_dev *get_hdmitx_device(void) @@ -2902,73 +2843,60 @@ static int get_dt_vend_init_data(struct device_node *np, ret = of_property_read_string(np, "vendor_name", (const char **)&(vend->vendor_name)); if (ret) - hdmi_print(INF, SYS "not find vendor name\n"); + pr_info(SYS "not find vendor name\n"); ret = of_property_read_u32(np, "vendor_id", &(vend->vendor_id)); if (ret) - hdmi_print(INF, SYS "not find vendor id\n"); + pr_info(SYS "not find vendor id\n"); ret = of_property_read_string(np, "product_desc", (const char **)&(vend->product_desc)); if (ret) - hdmi_print(INF, SYS "not find product desc\n"); + pr_info(SYS "not find product desc\n"); return 0; } -static void hdmitx_init_fmt_attr(struct hdmitx_dev *hdev, char *attr) +static void hdmitx_init_fmt_attr(struct hdmitx_dev *hdev) { - memset(attr, 0, sizeof(fmt_attr)); + memset(hdev->fmt_attr, 0, sizeof(hdev->fmt_attr)); if ((hdev->para->cd == COLORDEPTH_RESERVED) && (hdev->para->cs == COLORSPACE_RESERVED)) { - strcpy(fmt_attr, "default"); + strcpy(hdev->fmt_attr, "default"); } else { switch (hdev->para->cs) { case COLORSPACE_RGB444: - memcpy(fmt_attr, "rgb,", 4); + memcpy(hdev->fmt_attr, "rgb,", 4); break; case COLORSPACE_YUV422: - memcpy(fmt_attr, "422,", 4); + memcpy(hdev->fmt_attr, "422,", 4); break; case COLORSPACE_YUV444: - memcpy(fmt_attr, "444,", 4); + memcpy(hdev->fmt_attr, "444,", 4); break; case COLORSPACE_YUV420: - memcpy(fmt_attr, "420,", 4); + memcpy(hdev->fmt_attr, "420,", 4); break; default: break; } switch (hdev->para->cd) { case COLORDEPTH_24B: - strcat(fmt_attr, "8bit"); + strcat(hdev->fmt_attr, "8bit"); break; case COLORDEPTH_30B: - strcat(fmt_attr, "10bit"); + strcat(hdev->fmt_attr, "10bit"); break; case COLORDEPTH_36B: - strcat(fmt_attr, "12bit"); + strcat(hdev->fmt_attr, "12bit"); break; case COLORDEPTH_48B: - strcat(fmt_attr, "16bit"); + strcat(hdev->fmt_attr, "16bit"); break; default: break; } } -} - -static void hdmi_init_chip_type(void) -{ - /* auto detect chip_type for registers ioremap */ - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_TXLX: - hdmitx_device.chip_type = 1; - break; - default: - break; - } - - pr_info("hdmitx: %s: %d\n", __func__, hdmitx_device.chip_type); + pr_info(SYS "fmt_attr %s\n", hdev->fmt_attr); } /* for notify to cec */ @@ -3007,7 +2935,7 @@ void hdmitx_event_notify(unsigned long state, void *arg) void hdmitx_hdcp_status(int hdmi_authenticated) { - extcon_set_state_sync(hdmitx_excton_hdcp, EXTCON_DISP_HDMI, + extcon_set_state_sync(hdmitx_extcon_hdcp, EXTCON_DISP_HDMI, hdmi_authenticated); } @@ -3019,7 +2947,7 @@ void hdmitx_extcon_register(struct platform_device *pdev, struct device *dev) /*hdmitx extcon hdmi*/ edev = extcon_dev_allocate(hdmi_cable); if (IS_ERR(edev)) { - hdmi_print(IMP, SYS "failed to allocate hdmitx extcon hdmi\n"); + pr_info(SYS "failed to allocate hdmitx extcon hdmi\n"); return; } edev->dev.parent = dev; @@ -3027,7 +2955,7 @@ void hdmitx_extcon_register(struct platform_device *pdev, struct device *dev) dev_set_name(&edev->dev, "hdmi"); ret = extcon_dev_register(edev); if (ret < 0) { - hdmi_print(IMP, SYS "failed to register hdmitx extcon hdmi\n"); + pr_info(SYS "failed to register hdmitx extcon hdmi\n"); return; } hdmitx_extcon_hdmi = edev; @@ -3035,87 +2963,106 @@ void hdmitx_extcon_register(struct platform_device *pdev, struct device *dev) /*hdmitx extcon audio*/ edev = extcon_dev_allocate(hdmi_cable); if (IS_ERR(edev)) { - hdmi_print(IMP, SYS "failed to allocate hdmitx extcon audio\n"); + pr_info(SYS "failed to allocate hdmitx extcon audio\n"); return; } edev->dev.parent = dev; - edev->name = "hdmitx_excton_audio"; + edev->name = "hdmitx_extcon_audio"; dev_set_name(&edev->dev, "hdmi_audio"); ret = extcon_dev_register(edev); if (ret < 0) { - hdmi_print(IMP, SYS "failed to register hdmitx extcon audio\n"); + pr_info(SYS "failed to register hdmitx extcon audio\n"); return; } - hdmitx_excton_audio = edev; + hdmitx_extcon_audio = edev; /*hdmitx extcon power*/ edev = extcon_dev_allocate(hdmi_cable); if (IS_ERR(edev)) { - hdmi_print(IMP, SYS "failed to allocate hdmitx extcon power\n"); + pr_info(SYS "failed to allocate hdmitx extcon power\n"); return; } edev->dev.parent = dev; - edev->name = "hdmitx_excton_power"; + edev->name = "hdmitx_extcon_power"; dev_set_name(&edev->dev, "hdmi_power"); ret = extcon_dev_register(edev); if (ret < 0) { - hdmi_print(IMP, SYS "failed to register extcon power\n"); + pr_info(SYS "failed to register extcon power\n"); return; } - hdmitx_excton_power = edev; + hdmitx_extcon_power = edev; /*hdmitx extcon hdr*/ edev = extcon_dev_allocate(hdmi_cable); if (IS_ERR(edev)) { - hdmi_print(IMP, SYS "failed to allocate hdmitx extcon hdr\n"); + pr_info(SYS "failed to allocate hdmitx extcon hdr\n"); return; } edev->dev.parent = dev; - edev->name = "hdmitx_excton_hdr"; + edev->name = "hdmitx_extcon_hdr"; dev_set_name(&edev->dev, "hdmi_hdr"); ret = extcon_dev_register(edev); if (ret < 0) { - hdmi_print(IMP, SYS "failed to register hdmitx extcon hdr\n"); + pr_info(SYS "failed to register hdmitx extcon hdr\n"); return; } - hdmitx_excton_hdr = edev; + hdmitx_extcon_hdr = edev; /*hdmitx extcon rxsense*/ edev = extcon_dev_allocate(hdmi_cable); if (IS_ERR(edev)) { - hdmi_print(IMP, SYS "failed to allocate extcon rxsense\n"); + pr_info(SYS "failed to allocate extcon rxsense\n"); return; } edev->dev.parent = dev; - edev->name = "hdmitx_excton_rxsense"; + edev->name = "hdmitx_extcon_rxsense"; dev_set_name(&edev->dev, "hdmi_rxsense"); ret = extcon_dev_register(edev); if (ret < 0) { - hdmi_print(IMP, SYS "failed to register extcon rxsense\n"); + pr_info(SYS "failed to register extcon rxsense\n"); return; } - hdmitx_excton_rxsense = edev; + hdmitx_extcon_rxsense = edev; /*hdmitx extcon hdcp*/ edev = extcon_dev_allocate(hdmi_cable); if (IS_ERR(edev)) { - hdmi_print(IMP, SYS "failed to allocate extcon hdcp\n"); + pr_info(SYS "failed to allocate extcon hdcp\n"); return; } edev->dev.parent = dev; - edev->name = "hdmitx_excton_hdcp"; + edev->name = "hdmitx_extcon_hdcp"; dev_set_name(&edev->dev, "hdcp"); ret = extcon_dev_register(edev); if (ret < 0) { - hdmi_print(IMP, SYS "failed to register extcon hdcp\n"); + pr_info(SYS "failed to register extcon hdcp\n"); return; } - hdmitx_excton_hdcp = edev; + hdmitx_extcon_hdcp = edev; + +} + +static void hdmitx_init_parameters(struct hdmitx_info *info) +{ + memset(info, 0, sizeof(struct hdmitx_info)); + + info->video_out_changing_flag = 1; + + info->audio_flag = 1; + info->audio_info.type = CT_REFER_TO_STREAM; + info->audio_info.format = AF_I2S; + info->audio_info.fs = FS_44K1; + info->audio_info.ss = SS_16BITS; + info->audio_info.channels = CC_2CH; + info->audio_out_changing_flag = 1; + + info->auto_hdcp_ri_flag = 1; + info->hw_sha_calculator_flag = 1; } static int amhdmitx_device_init(struct hdmitx_dev *hdmi_dev) @@ -3123,43 +3070,14 @@ static int amhdmitx_device_init(struct hdmitx_dev *hdmi_dev) if (hdmi_dev == NULL) return 1; + pr_info(SYS "Ver: %s\n", HDMITX_VER); + hdmi_dev->hdtx_dev = NULL; - return 0; -} - -static int amhdmitx_probe(struct platform_device *pdev) -{ - int r, ret = 0; - struct pinctrl *p; - struct device *dev; - -#ifdef CONFIG_OF - int val; - phandle phandle; - struct device_node *init_data; -#endif - - hdmi_print(IMP, SYS "amhdmitx_init\n"); - hdmi_print(IMP, SYS "Ver: %s\n", HDMITX_VER); - - amhdmitx_device_init(&hdmitx_device); - - hdmitx_device.hdtx_dev = &pdev->dev; hdmitx_device.physical_addr = 0xffff; /* init para for NULL protection */ - hdmitx_device.para = hdmi_get_fmt_name("invalid", fmt_attr); - hdmi_print(IMP, SYS "amhdmitx_probe\n"); - - r = alloc_chrdev_region(&hdmitx_id, 0, HDMI_TX_COUNT, - DEVICE_NAME); - - hdmitx_class = class_create(THIS_MODULE, DEVICE_NAME); - if (IS_ERR(hdmitx_class)) { - unregister_chrdev_region(hdmitx_id, HDMI_TX_COUNT); - return -1; - /* return PTR_ERR(aoe_class); */ - } + hdmitx_device.para = hdmi_get_fmt_name("invalid", + hdmitx_device.fmt_attr); hdmitx_device.unplug_powerdown = 0; hdmitx_device.vic_count = 0; @@ -3170,26 +3088,182 @@ static int amhdmitx_probe(struct platform_device *pdev) /* no 1.000/1.001 modes by default */ hdmitx_device.frac_rate_policy = 0; hdmitx_device.rxsense_policy = 0; /* no RxSense by default */ + /* enable or disable HDMITX SSPLL, enable by default */ + hdmitx_device.sspll = 1; + /* + * 0, do not unmux hpd when off or unplug ; + * 1, unmux hpd when unplug; + * 2, unmux hpd when unplug or off; + */ + hdmitx_device.hpdmode = 1; -#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND - register_early_suspend(&hdmitx_early_suspend_handler); -#endif - hdmitx_device.nb.notifier_call = hdmitx_reboot_notifier; - register_reboot_notifier(&hdmitx_device.nb); - if ((init_flag&INIT_FLAG_POWERDOWN) && (hpdmode == 2)) + if ((init_flag&INIT_FLAG_POWERDOWN) && (hdmitx_device.hpdmode == 2)) hdmitx_device.mux_hpd_if_pin_high_flag = 0; else hdmitx_device.mux_hpd_if_pin_high_flag = 1; + hdmitx_device.audio_param_update_flag = 0; + /* 1: 2ch */ + hdmitx_device.hdmi_ch = 1; + hdmitx_init_parameters(&hdmitx_device.hdmi_info); + + return 0; +} + +static int amhdmitx_get_dt_info(struct platform_device *pdev) +{ + int ret = 0; + +#ifdef CONFIG_OF + int val; + phandle phandle; + struct device_node *init_data; +#endif + + /* HDMITX pinctrl config for hdp and ddc*/ + if (pdev->dev.pins) { + hdmitx_device.pdev = &pdev->dev; + + hdmitx_device.pinctrl_default = + pinctrl_lookup_state(pdev->dev.pins->p, "default"); + if (IS_ERR(hdmitx_device.pinctrl_default)) + pr_info(SYS "no default of pinctrl state\n"); + + hdmitx_device.pinctrl_i2c = + pinctrl_lookup_state(pdev->dev.pins->p, "hdmitx_i2c"); + if (IS_ERR(hdmitx_device.pinctrl_i2c)) + pr_info(SYS "no hdmitx_i2c of pinctrl state\n"); + + pinctrl_select_state(pdev->dev.pins->p, + hdmitx_device.pinctrl_default); + } + +#ifdef CONFIG_OF + if (pdev->dev.of_node) { + memset(&hdmitx_device.config_data, 0, + sizeof(struct hdmi_config_platform_data)); + /* Get ic type information */ + ret = of_property_read_u32(pdev->dev.of_node, "ic_type", + &(hdmitx_device.chip_type)); + if (ret) + pr_info(SYS "not find ic_type\n"); + else + pr_info(SYS "hdmitx_device.chip_type : %d\n", + hdmitx_device.chip_type); + + /* Get vendor information */ + ret = of_property_read_u32(pdev->dev.of_node, + "vend-data", &val); + if (ret) + pr_info(SYS "not find match init-data\n"); + if (ret == 0) { + phandle = val; + init_data = of_find_node_by_phandle(phandle); + if (!init_data) + pr_info(SYS "not find device node\n"); + hdmitx_device.config_data.vend_data = kzalloc( + sizeof(struct vendor_info_data), GFP_KERNEL); + if (!hdmitx_device.config_data.vend_data) + ret = -ENOMEM; + ret = get_dt_vend_init_data(init_data, + hdmitx_device.config_data.vend_data); + if (ret) + pr_info(SYS "not find vend_init_data\n"); + } + /* Get power control */ + ret = of_property_read_u32(pdev->dev.of_node, + "pwr-ctrl", &val); + if (ret) + pr_info(SYS "not find match pwr-ctl\n"); + if (ret == 0) { + phandle = val; + init_data = of_find_node_by_phandle(phandle); + if (!init_data) + pr_info(SYS "not find device node\n"); + hdmitx_device.config_data.pwr_ctl = kzalloc((sizeof( + struct hdmi_pwr_ctl)) * HDMI_TX_PWR_CTRL_NUM, + GFP_KERNEL); + if (!hdmitx_device.config_data.pwr_ctl) + pr_info(SYS"can not get pwr_ctl mem\n"); + memset(hdmitx_device.config_data.pwr_ctl, 0, + sizeof(struct hdmi_pwr_ctl)); + if (ret) + pr_info(SYS "not find pwr_ctl\n"); + } + } + +#else + hdmi_pdata = pdev->dev.platform_data; + if (!hdmi_pdata) { + pr_info(SYS "not get platform data\n"); + r = -ENOENT; + } else { + pr_info(SYS "get hdmi platform data\n"); + } +#endif + hdmitx_device.irq_hpd = platform_get_irq_byname(pdev, "hdmitx_hpd"); + if (hdmitx_device.irq_hpd == -ENXIO) { + pr_err("%s: ERROR: hdmitx hpd irq No not found\n", + __func__); + return -ENXIO; + } + pr_info(SYS "hpd irq = %d\n", hdmitx_device.irq_hpd); + + return ret; +} + +/* + * amhdmitx_clktree_probe + * get clktree info from dts + */ +static void amhdmitx_clktree_probe(struct device *hdmitx_dev) +{ + struct clk *hdcp22_tx_skp, *hdcp22_tx_esm; + + hdcp22_tx_skp = devm_clk_get(hdmitx_dev, "hdcp22_tx_skp"); + if (IS_ERR(hdcp22_tx_skp)) + pr_err(SYS "hdcp22_tx_skp failed to probe\n"); + else + hdmitx_device.hdmitx_clk_tree.hdcp22_tx_skp = hdcp22_tx_skp; + + hdcp22_tx_esm = devm_clk_get(hdmitx_dev, "hdcp22_tx_esm"); + if (IS_ERR(hdcp22_tx_esm)) + pr_err(SYS "hdcp22_tx_esm failed to probe\n"); + else + hdmitx_device.hdmitx_clk_tree.hdcp22_tx_esm = hdcp22_tx_esm; +} + +static int amhdmitx_probe(struct platform_device *pdev) +{ + int r, ret = 0; + struct device *dev; + + pr_info(SYS "amhdmitx_probe start\n"); + + amhdmitx_device_init(&hdmitx_device); + + ret = amhdmitx_get_dt_info(pdev); + + amhdmitx_clktree_probe(&(pdev->dev)); + + r = alloc_chrdev_region(&(hdmitx_device.hdmitx_id), 0, HDMI_TX_COUNT, + DEVICE_NAME); cdev_init(&(hdmitx_device.cdev), &amhdmitx_fops); hdmitx_device.cdev.owner = THIS_MODULE; - cdev_add(&(hdmitx_device.cdev), hdmitx_id, HDMI_TX_COUNT); + cdev_add(&(hdmitx_device.cdev), hdmitx_device.hdmitx_id, HDMI_TX_COUNT); - dev = device_create(hdmitx_class, NULL, hdmitx_id, NULL, + hdmitx_class = class_create(THIS_MODULE, DEVICE_NAME); + if (IS_ERR(hdmitx_class)) { + unregister_chrdev_region(hdmitx_device.hdmitx_id, + HDMI_TX_COUNT); + return -1; + } + + dev = device_create(hdmitx_class, NULL, hdmitx_device.hdmitx_id, NULL, "amhdmitx%d", 0); /* kernel>=2.6.27 */ if (dev == NULL) { - hdmi_print(ERR, SYS "device_create create error\n"); + pr_info(SYS "device_create create error\n"); class_destroy(hdmitx_class); r = -EEXIST; return r; @@ -3218,6 +3292,7 @@ static int amhdmitx_probe(struct platform_device *pdev) ret = device_create_file(dev, &dev_attr_vic); ret = device_create_file(dev, &dev_attr_phy); ret = device_create_file(dev, &dev_attr_frac_rate_policy); + ret = device_create_file(dev, &dev_attr_sspll); ret = device_create_file(dev, &dev_attr_rxsense_policy); ret = device_create_file(dev, &dev_attr_hdcp_clkdis); ret = device_create_file(dev, &dev_attr_hdcp_pwr); @@ -3238,6 +3313,12 @@ static int amhdmitx_probe(struct platform_device *pdev) ret = device_create_file(dev, &dev_attr_dc_cap); ret = device_create_file(dev, &dev_attr_valid_mode); +#ifdef CONFIG_AMLOGIC_LEGACY_EARLY_SUSPEND + register_early_suspend(&hdmitx_early_suspend_handler); +#endif + hdmitx_device.nb.notifier_call = hdmitx_reboot_notifier; + register_reboot_notifier(&hdmitx_device.nb); + vout_register_server(&hdmitx_server); #ifdef CONFIG_AMLOGIC_SND_SOC aout_register_client(&hdmitx_notifier_nb_a); @@ -3246,95 +3327,18 @@ static int amhdmitx_probe(struct platform_device *pdev) (long int)&hdmitx_notifier_nb_a; #endif - hdmi_init_chip_type(); -#ifdef CONFIG_OF - if (pdev->dev.of_node) { - memset(&hdmitx_device.config_data, 0, - sizeof(struct hdmi_config_platform_data)); -/* HPD pinctrl */ - if (of_get_property(pdev->dev.of_node, "pinctrl-names", NULL)) { - ret = of_property_read_string_index(pdev->dev.of_node, - "pinctrl-names", 0, &hdmitx_device.hpd_pin); - if (!ret) - p = devm_pinctrl_get_select(&pdev->dev, - hdmitx_device.hpd_pin); - } -/* DDC pinctrl */ - if (of_get_property(pdev->dev.of_node, "pinctrl-names", NULL)) { - ret = of_property_read_string_index(pdev->dev.of_node, - "pinctrl-names", 1, &hdmitx_device.ddc_pin); - if (!ret) - p = devm_pinctrl_get_select(&pdev->dev, - hdmitx_device.ddc_pin); - } - -/* Get vendor information */ - ret = of_property_read_u32(pdev->dev.of_node, - "vend-data", &val); - if (ret) - hdmi_print(INF, SYS "not find match init-data\n"); - if (ret == 0) { - phandle = val; - init_data = of_find_node_by_phandle(phandle); - if (!init_data) - hdmi_print(INF, SYS "not find device node\n"); - hdmitx_device.config_data.vend_data = kzalloc( - sizeof(struct vendor_info_data), GFP_KERNEL); - if (!hdmitx_device.config_data.vend_data) - hdmi_print(INF, SYS - "can not get vend_data dat\n"); - ret = get_dt_vend_init_data(init_data, - hdmitx_device.config_data.vend_data); - if (ret) - hdmi_print(INF, SYS "not find vend_init_data\n"); - } -/* Get power control */ - ret = of_property_read_u32(pdev->dev.of_node, - "pwr-ctrl", &val); - if (ret) - hdmi_print(INF, SYS "not find match pwr-ctl\n"); - if (ret == 0) { - phandle = val; - init_data = of_find_node_by_phandle(phandle); - if (!init_data) - hdmi_print(INF, SYS "not find device node\n"); - hdmitx_device.config_data.pwr_ctl = kzalloc((sizeof( - struct hdmi_pwr_ctl)) * HDMI_TX_PWR_CTRL_NUM, - GFP_KERNEL); - if (!hdmitx_device.config_data.pwr_ctl) - hdmi_print(INF, SYS"can not get pwr_ctl mem\n"); - memset(hdmitx_device.config_data.pwr_ctl, 0, - sizeof(struct hdmi_pwr_ctl)); - if (ret) - hdmi_print(INF, SYS "not find pwr_ctl\n"); - } - } - -#else - hdmi_pdata = pdev->dev.platform_data; - if (!hdmi_pdata) { - hdmi_print(INF, SYS "not get platform data\n"); - r = -ENOENT; - } else { - hdmi_print(INF, SYS "get hdmi platform data\n"); - } -#endif - hdmitx_device.irq_hpd = platform_get_irq_byname(pdev, "hdmitx_hpd"); - if (hdmitx_device.irq_hpd == -ENXIO) { - pr_err("%s: ERROR: hdmitx hpd irq No not found\n", - __func__); - return -ENXIO; - } - pr_info("hdmitx hpd irq = %d\n", hdmitx_device.irq_hpd); - hdmitx_extcon_register(pdev, dev); - hdmitx_init_parameters(&hdmitx_device.hdmi_info); HDMITX_Meson_Init(&hdmitx_device); - hdmitx_init_fmt_attr(&hdmitx_device, fmt_attr); - pr_info("hdmitx: attr %s\n", fmt_attr); + + /* update fmt_attr */ + hdmitx_init_fmt_attr(&hdmitx_device); + hdmitx_device.task = kthread_run(hdmi_task_handle, &hdmitx_device, "kthread_hdmi"); + + pr_info(SYS "amhdmitx_probe end\n"); + return r; } @@ -3379,6 +3383,7 @@ static int amhdmitx_remove(struct platform_device *pdev) device_remove_file(dev, &dev_attr_avmute); device_remove_file(dev, &dev_attr_vic); device_remove_file(dev, &dev_attr_frac_rate_policy); + device_remove_file(dev, &dev_attr_sspll); device_remove_file(dev, &dev_attr_rxsense_policy); device_remove_file(dev, &dev_attr_hdcp_pwr); device_remove_file(dev, &dev_attr_aud_output_chs); @@ -3389,15 +3394,11 @@ static int amhdmitx_remove(struct platform_device *pdev) cdev_del(&hdmitx_device.cdev); - device_destroy(hdmitx_class, hdmitx_id); + device_destroy(hdmitx_class, hdmitx_device.hdmitx_id); class_destroy(hdmitx_class); -/* TODO */ -/* kfree(hdmi_pdata->phy_data); */ -/* kfree(hdmi_pdata); */ - - unregister_chrdev_region(hdmitx_id, HDMI_TX_COUNT); + unregister_chrdev_region(hdmitx_device.hdmitx_id, HDMI_TX_COUNT); return 0; } @@ -3418,96 +3419,6 @@ static int amhdmitx_resume(struct platform_device *pdev) } #endif -#ifdef CONFIG_INSTABOOT -static unsigned char __nosavedata EDID_buf_save[EDID_MAX_BLOCK * 128]; -static unsigned char __nosavedata EDID_buf1_save[EDID_MAX_BLOCK * 128]; -static unsigned char __nosavedata EDID_hash_save[20]; -static struct rx_cap __nosavedata RXCap_save; -static struct hdmitx_info __nosavedata hdmi_info_save; - -static void save_device_param(void) -{ - memcpy(EDID_buf_save, hdmitx_device.EDID_buf, EDID_MAX_BLOCK * 128); - memcpy(EDID_buf1_save, hdmitx_device.EDID_buf1, EDID_MAX_BLOCK * 128); - memcpy(EDID_hash_save, hdmitx_device.EDID_hash, 20); - memcpy(&RXCap_save, &hdmitx_device.RXCap, sizeof(struct rx_cap)); - memcpy(&hdmi_info_save, &hdmitx_device.hdmi_info, - sizeof(struct hdmitx_info)); -} - -static void restore_device_param(void) -{ - memcpy(hdmitx_device.EDID_buf, EDID_buf_save, EDID_MAX_BLOCK * 128); - memcpy(hdmitx_device.EDID_buf1, EDID_buf1_save, EDID_MAX_BLOCK * 128); - memcpy(hdmitx_device.EDID_hash, EDID_hash_save, 20); - memcpy(&hdmitx_device.RXCap, &RXCap_save, sizeof(struct rx_cap)); - memcpy(&hdmitx_device.hdmi_info, &hdmi_info_save, - sizeof(struct hdmitx_info)); -} - -static int amhdmitx_realdata_save(void) -{ - save_device_param(); - return 0; -} - -static void amhdmitx_realdata_restore(void) -{ - restore_device_param(); -} - -static struct instaboot_realdata_ops amhdmitx_realdata_ops = { - .save = amhdmitx_realdata_save, - .restore = amhdmitx_realdata_restore, -}; - -static int amhdmitx_restore(struct device *dev) -{ - int current_hdmi_state = !!(hdmitx_device.HWOp.CntlMisc(&hdmitx_device, - MISC_HPD_GPI_ST, 0)); - char *vout_mode = get_vout_mode_internal(); - - if (strstr(vout_mode, "cvbs") && current_hdmi_state == 1) { - mutex_lock(&setclk_mutex); - hdmitx_extcon_hdmi->state = 0; - hdmitx_device.hpd_state = hdmitx_extcon_hdmi->state; - hdmitx_notify_hpd(hdmitx_device.hpd_state); - mutex_unlock(&setclk_mutex); - pr_info("resend hdmi plug in event\n"); - hdmitx_device.hdmitx_event |= HDMI_TX_HPD_PLUGIN; - hdmitx_device.hdmitx_event &= ~HDMI_TX_HPD_PLUGOUT; - PREPARE_DELAYED_WORK(&hdmitx_device.work_hpd_plugin, - hdmitx_hpd_plugin_handler); - queue_delayed_work(hdmitx_device.hdmi_wq, - &hdmitx_device.work_hpd_plugin, 2 * HZ); - } else { - mutex_lock(&setclk_mutex); - hdmitx_extcon_hdmi->state = current_hdmi_state; - hdmitx_device.hpd_state = hdmitx_extcon_hdmi->state; - hdmitx_notify_hpd(hdmitx_device.hpd_state); - mutex_unlock(&setclk_mutex); - } - return 0; -} -static int amhdmitx_pm_suspend(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - - return amhdmitx_suspend(pdev, PMSG_SUSPEND); -} -static int amhdmitx_pm_resume(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - - return amhdmitx_resume(pdev); -} -static const struct dev_pm_ops amhdmitx_pm = { - .restore = amhdmitx_restore, - .suspend = amhdmitx_pm_suspend, - .resume = amhdmitx_pm_resume, -}; -#endif - #ifdef CONFIG_OF static const struct of_device_id meson_amhdmitx_dt_match[] = { { @@ -3541,36 +3452,21 @@ static int __init amhdmitx_init(void) return 0; if (platform_driver_register(&amhdmitx_driver)) { - hdmi_print(ERR, SYS + pr_info(SYS "failed to register amhdmitx module\n"); -#if 0 - platform_device_del(amhdmi_tx_device); - platform_device_put(amhdmi_tx_device); -#endif - return -ENODEV; + + return -ENODEV; } -#ifdef CONFIG_INSTABOOT - INIT_LIST_HEAD(&amhdmitx_realdata_ops.node); - register_instaboot_realdata_ops(&amhdmitx_realdata_ops); -#endif + return 0; } - - - static void __exit amhdmitx_exit(void) { - hdmi_print(INF, SYS "amhdmitx_exit\n"); + pr_info(SYS "amhdmitx_exit\n"); platform_driver_unregister(&amhdmitx_driver); -/* \\ platform_device_unregister(amhdmi_tx_device); */ -/* \\ amhdmi_tx_device = NULL; */ -#ifdef CONFIG_INSTABOOT - unregister_instaboot_realdata_ops(&amhdmitx_realdata_ops); -#endif } -/* module_init(amhdmitx_init); */ subsys_initcall(amhdmitx_init); module_exit(amhdmitx_exit); @@ -3653,12 +3549,3 @@ static int __init hdmitx_boot_para_setup(char *s) } __setup("hdmitx=", hdmitx_boot_para_setup); - -MODULE_PARM_DESC(hdmi_detect_when_booting, "\n hdmi_detect_when_booting\n"); -module_param(hdmi_detect_when_booting, int, 0664); - -MODULE_PARM_DESC(hdmi_prbs_mode, "\n hdmi_prbs_mode\n"); -module_param(hdmi_prbs_mode, int, 0664); - -MODULE_PARM_DESC(debug_level, "\n debug_level\n"); -module_param(debug_level, int, 0664); diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_scdc.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_scdc.c index 3bbf2cacf78a..1b5dd5ad5a78 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_scdc.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_scdc.c @@ -18,6 +18,7 @@ #include #include #include +#include "hw/common.h" static struct timer_list scdc_tmds_cfg_timer; diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_video.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_video.c index b58fbd177538..d7d98da41891 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_video.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hdmi_tx_video.c @@ -32,8 +32,8 @@ #include #include #include +#include "hw/common.h" -static unsigned char hdmi_output_rgb; static void hdmitx_set_spd_info(struct hdmitx_dev *hdmitx_device); static void hdmi_set_vend_spec_infofram(struct hdmitx_dev *hdmitx_device, enum hdmi_vic VideoCode); @@ -551,25 +551,6 @@ static void hdmi_tx_construct_avi_packet( * hdmitx protocol level interface *************************************/ -void hdmitx_init_parameters(struct hdmitx_info *info) -{ - memset(info, 0, sizeof(struct hdmitx_info)); - - info->video_out_changing_flag = 1; - - info->audio_flag = 1; - info->audio_info.type = CT_REFER_TO_STREAM; - info->audio_info.format = AF_I2S; - info->audio_info.fs = FS_44K1; - info->audio_info.ss = SS_16BITS; - info->audio_info.channels = CC_2CH; - info->audio_out_changing_flag = 1; - - info->auto_hdcp_ri_flag = 1; - info->hw_sha_calculator_flag = 1; - -} - /* * HDMI Identifier = 0x000c03 * If not, treated as a DVI Device @@ -582,11 +563,6 @@ static int is_dvi_device(struct rx_cap *pRXCap) return 0; } -void hdmitx_output_rgb(void) -{ - hdmi_output_rgb = 1; -} - int hdmitx_set_display(struct hdmitx_dev *hdev, enum hdmi_vic VideoCode) { struct hdmitx_vidpara *param = NULL; @@ -602,51 +578,46 @@ int hdmitx_set_display(struct hdmitx_dev *hdev, enum hdmi_vic VideoCode) AVI_DB[i] = 0; vic = hdev->HWOp.GetState(hdev, STAT_VIDEO_VIC, 0); - hdmi_print(IMP, SYS "already init VIC = %d Now VIC = %d\n", + pr_info(VID "already init VIC = %d Now VIC = %d\n", vic, VideoCode); - if ((vic != HDMI_Unknown) && (vic == VideoCode)) { + if ((vic != HDMI_Unknown) && (vic == VideoCode)) hdev->cur_VIC = vic; - /* return 1; */ - } param = hdmi_get_video_param(VideoCode); hdev->cur_video_param = param; if (param) { param->color = param->color_prefer; - if (hdmi_output_rgb) { + /* HDMI CT 7-24 Pixel Encoding + * YCbCr to YCbCr Sink + */ + switch (hdev->RXCap.native_Mode & 0x30) { + case 0x20:/*bit5==1, then support YCBCR444 + RGB*/ + case 0x30: + param->color = COLORSPACE_YUV444; + break; + case 0x10:/*bit4==1, then support YCBCR422 + RGB*/ + param->color = COLORSPACE_YUV422; + break; + default: param->color = COLORSPACE_RGB444; - } else { - /* HDMI CT 7-24 Pixel Encoding - * YCbCr to YCbCr Sink - */ - switch (hdev->RXCap.native_Mode & 0x30) { - case 0x20:/*bit5==1, then support YCBCR444 + RGB*/ - case 0x30: - param->color = COLORSPACE_YUV444; - break; - case 0x10:/*bit4==1, then support YCBCR422 + RGB*/ - param->color = COLORSPACE_YUV422; - break; - default: - param->color = COLORSPACE_RGB444; - } - /* For Y420 modes */ - switch (VideoCode) { - case HDMI_3840x2160p50_16x9_Y420: - case HDMI_3840x2160p60_16x9_Y420: - case HDMI_4096x2160p50_256x135_Y420: - case HDMI_4096x2160p60_256x135_Y420: - param->color = COLORSPACE_YUV420; - break; - default: - break; - } - if (param->color == COLORSPACE_RGB444) { - hdev->para->cs = hdev->cur_video_param->color; - pr_info("hdmitx: rx edid only support RGB format\n"); - } - } + /* For Y420 modes */ + switch (VideoCode) { + case HDMI_3840x2160p50_16x9_Y420: + case HDMI_3840x2160p60_16x9_Y420: + case HDMI_4096x2160p50_256x135_Y420: + case HDMI_4096x2160p60_256x135_Y420: + param->color = COLORSPACE_YUV420; + break; + default: + break; + } + + if (param->color == COLORSPACE_RGB444) { + hdev->para->cs = hdev->cur_video_param->color; + pr_info(VID "rx edid only support RGB format\n"); + } + if (hdev->HWOp.SetDispMode(hdev) >= 0) { /* HDMI CT 7-33 DVI Sink, no HDMI VSDB nor any * other VSDB, No GB or DI expected @@ -654,11 +625,11 @@ int hdmitx_set_display(struct hdmitx_dev *hdev, enum hdmi_vic VideoCode) * 0: DVI Mode 1: HDMI Mode */ if (is_dvi_device(&hdev->RXCap)) { - hdmi_print(1, "Sink is DVI device\n"); + pr_info(VID "Sink is DVI device\n"); hdev->HWOp.CntlConfig(hdev, CONF_HDMI_DVI_MODE, DVI_MODE); } else { - hdmi_print(1, "Sink is HDMI device\n"); + pr_info(VID "Sink is HDMI device\n"); hdev->HWOp.CntlConfig(hdev, CONF_HDMI_DVI_MODE, HDMI_MODE); } @@ -678,9 +649,7 @@ int hdmitx_set_display(struct hdmitx_dev *hdev, enum hdmi_vic VideoCode) } } hdmitx_set_spd_info(hdev); -#if 0 - hdmitx_special_handler_video(hdev); -#endif + return ret; } @@ -756,7 +725,7 @@ static void hdmitx_set_spd_info(struct hdmitx_dev *hdev) if (hdev->config_data.vend_data) vend_data = hdev->config_data.vend_data; else { - hdmi_print(INF, SYS "packet: can\'t get vendor data\n"); + pr_info(VID "packet: can\'t get vendor data\n"); return; } if (vend_data->vendor_name) { diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/common.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/common.h index b664bc8c8d24..23b528039968 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/common.h +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/common.h @@ -20,8 +20,27 @@ #include #include -#include "mach_reg.h" #include "hdmi_tx_reg.h" + +/*********************************************************************** + * hdmi debug printk + * pr_info(EDID "edid bad\"); + * pr_debug(AUD "set audio format: AC-3\n"); + * pr_err(REG "write reg\n") + **********************************************************************/ +#undef pr_fmt +#define pr_fmt(fmt) "hdmitx: " fmt + +#define VID "video: " +#define AUD "audio: " +#define CEC "cec: " +#define EDID "edid: " +#define HDCP "hdcp: " +#define SYS "system: " +#define HPD "hpd: " +#define HW "hw: " +#define REG "reg: " + /* * HDMITX HPD HW related operations */ @@ -54,5 +73,7 @@ void set_hpll_od3_gxl(unsigned int div); int hdmitx_hpd_hw_op_txlx(enum hpd_op cmd); int read_hpd_gpio_txlx(void); int hdmitx_ddc_hw_op_txlx(enum ddc_op cmd); +extern unsigned int hdmitx_get_format_txlx(void); +extern void hdmitx_sys_reset_txlx(void); #endif diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c index b931b413f8eb..51d82e8f8d3c 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/enc_cfg_hw.c @@ -37,6 +37,7 @@ #include #include #include +#include "common.h" #include "mach_reg.h" #define MREG_END_MARKER 0xFFFF @@ -744,37 +745,6 @@ static struct vic_tvregs_set tvregsTab[] = { {HDMI_3840x2160p50_16x9_Y420, tvregs_4k2k_25hz}, }; -static inline void setreg(const struct reg_s *r) -{ - hd_write_reg(r->reg, r->val); - /* printk("[0x%x] = 0x%x\n", r->reg, r->val); */ -} - -static const struct reg_s *tvregs_setting_mode(enum hdmi_vic vic) -{ - int i = 0; - - for (i = 0; i < ARRAY_SIZE(tvregsTab); i++) { - if (vic == tvregsTab[i].vic) - return tvregsTab[i].reg_setting; - } - return NULL; -} - -void set_vmode_enc_hw(enum hdmi_vic vic) -{ - const struct reg_s *s = tvregs_setting_mode(vic); - /* Turn off VDAC, no need any more for HDMITX */ - hd_set_reg_bits(P_VENC_VDAC_SETTING, 0x1f, 0, 5); - - if (s) { - pr_info("hdmitx: set enc for VIC: %d\n", vic); - while (s->reg != MREG_END_MARKER) - setreg(s++); - } else - pr_info("hdmitx: not find VIC: %d\n", vic); -} - /* * For 3D FramePacket Setting */ @@ -989,25 +959,44 @@ static struct vic_tvregs_set tvregsTab_3dfp[] = { {HDMI_1280x720p50_16x9, tvregs_3dfp_720p50}, }; -static const struct reg_s *tvregs_3dfp_setting_mode(enum hdmi_vic vic) +static inline void setreg(const struct reg_s *r) +{ + hd_write_reg(r->reg, r->val); +} + +static const struct reg_s *tvregs_setting_mode(struct hdmitx_dev *hdev) { int i = 0; + enum hdmi_vic vic = hdev->cur_video_param->VIC; - for (i = 0; i < ARRAY_SIZE(tvregsTab_3dfp); i++) { - if (vic == tvregsTab_3dfp[i].vic) - return tvregsTab_3dfp[i].reg_setting; + if (hdev->flag_3dfp) { + for (i = 0; i < ARRAY_SIZE(tvregsTab_3dfp); i++) { + if (vic == tvregsTab_3dfp[i].vic) + return tvregsTab_3dfp[i].reg_setting; + } + } else { + for (i = 0; i < ARRAY_SIZE(tvregsTab); i++) { + if (vic == tvregsTab[i].vic) + return tvregsTab[i].reg_setting; + } } + return NULL; } -void set_vmode_3dfp_enc_hw(enum hdmi_vic vic) +void set_vmode_enc_hw(struct hdmitx_dev *hdev) { - const struct reg_s *s = tvregs_3dfp_setting_mode(vic); + const struct reg_s *s = tvregs_setting_mode(hdev); + /* Turn off VDAC, no need any more for HDMITX */ + hd_set_reg_bits(P_VENC_VDAC_SETTING, 0x1f, 0, 5); if (s) { - pr_info("hdmitx: set 3dfp enc for VIC: %d\n", vic); + pr_info("set enc for VIC: %d\n", + hdev->cur_video_param->VIC); while (s->reg != MREG_END_MARKER) setreg(s++); } else - pr_info("hdmitx: not find VIC: %d\n", vic); + pr_info("set enc not find VIC: %d\n", + hdev->cur_video_param->VIC); } + diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_ddc.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_ddc.c index eb5eeaa68461..858cc79c845d 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_ddc.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_ddc.c @@ -37,7 +37,7 @@ #include #include #include - +#include "common.h" #include "hdmi_tx_reg.h" static DEFINE_MUTEX(ddc_mutex); @@ -54,7 +54,7 @@ static uint32_t ddc_write_1byte(uint8_t slave, uint8_t offset_addr, mdelay(2); if (hdmitx_rd_reg(HDMITX_DWC_IH_I2CM_STAT0) & (1 << 0)) { st = 0; - pr_info("hdmitx: ddc w1b error 0x%02x 0x%02x 0x%02x\n", + pr_info("ddc w1b error 0x%02x 0x%02x 0x%02x\n", slave, offset_addr, data); } else st = 1; @@ -157,7 +157,7 @@ static uint32_t ddc_read_1byte(uint8_t slave, uint8_t offset_addr, mdelay(2); if (hdmitx_rd_reg(HDMITX_DWC_IH_I2CM_STAT0) & (1 << 0)) { st = 0; - pr_info("hdmitx: ddc rd8b error 0x%02x 0x%02x\n", + pr_info("ddc rd8b error 0x%02x 0x%02x\n", slave, offset_addr); } else st = 1; diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c index a39b26ae0a36..9ffbcdc97cea 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_hw.c @@ -30,36 +30,23 @@ #include #include #include -/* #include */ #include #include #include -#include #include #include #include #include #include -#include #include #include #include "mach_reg.h" #include "hdmi_tx_reg.h" - -#if 0 /* todo */ -#include "../hdmi_tx_hdcp.h" -#include "../hdmi_tx_compliance.h" -#endif #include "tvenc_conf.h" #include "common.h" #include "hdcpVerify.h" #include "hw_clk.h" -#define EDID_RAM_ADDR_SIZE (8) - -static void hdmi_audio_init(unsigned int spdif_flag); -static void hdmitx_dump_tvenc_reg(int cur_VIC, int pr_info_flag); - static void mode420_half_horizontal_para(void); static void hdmi_phy_suspend(void); static void hdmi_phy_wakeup(struct hdmitx_dev *hdev); @@ -71,54 +58,6 @@ static void hdmitx_csc_config(unsigned char input_color_format, static int hdmitx_hdmi_dvi_config(struct hdmitx_dev *hdev, unsigned int dvi_mode); static void hdmitx_set_avi_colorimetry(struct hdmi_format_para *para); - -unsigned char hdmi_pll_mode; /* 1, use external clk as hdmi pll source */ - -/* HSYNC polarity: active high */ -#define HSYNC_POLARITY 1 -/* VSYNC polarity: active high */ -#define VSYNC_POLARITY 1 -/* Pixel format: 0=RGB444; 1=YCbCr444; 2=Rsrv; 3=YCbCr422. */ -#define TX_INPUT_COLOR_FORMAT COLORSPACE_YUV444 -/* Pixel range: 0=16-235/240; 1=16-240; 2=1-254; 3=0-255. */ -#define TX_INPUT_COLOR_RANGE 0 -/* Pixel bit width: 4=24-bit; 5=30-bit; 6=36-bit; 7=48-bit. */ -#define TX_COLOR_DEPTH COLORDEPTH_24B -/* Pixel format: 0=RGB444; 1=YCbCr422; 2=YCbCr444; 3=YCbCr420. */ -#define TX_OUTPUT_COLOR_FORMAT COLORSPACE_YUV444 -#define TX_OUTPUT_COLOR_RANGE 0 - -#if 1 -/* 0=I2S 2-channel; 1=I2S 4 x 2-channel. */ -#define TX_I2S_8_CHANNEL 0 -#endif - -static unsigned int tx_aud_src; /* 0: SPDIF 1: I2S */ - -/* store downstream ksv lists */ -static char *rptx_ksvs; -static char rptx_ksv_prbuf[1271]; /* 127 * 5 * 2 + 1 */ -MODULE_PARM_DESC(rptx_ksvs, "\n downstream ksvs\n"); -module_param(rptx_ksvs, charp, 0444); -static int rptx_ksv_no; -static int rptx_ksvlist_retry; -static char rptx_ksv_buf[635]; - -/* static struct tasklet_struct EDID_tasklet; */ -static unsigned int delay_flag; -static unsigned long serial_reg_val = 0x1; -static unsigned char i2s_to_spdif_flag = 1; -static unsigned long color_depth_f; -static unsigned long COLORSPACE_f; -static unsigned char new_reset_sequence_flag = 1; -static unsigned char power_mode = 1; -static unsigned char power_off_vdac_flag; -/* 0, do not use fixed tvenc val for all mode; - * 1, use fixed tvenc val mode for 480i; - * 2, use fixed tvenc val mode for all modes - */ -static unsigned char use_tvenc_conf_flag = 1; - static void hdmitx_set_packet(int type, unsigned char *DB, unsigned char *HB); static void hdmitx_setaudioinfoframe(unsigned char *AUD_DB, unsigned char *CHAN_STAT_BUF); @@ -138,20 +77,42 @@ static int hdmitx_cntl_config(struct hdmitx_dev *hdev, unsigned int cmd, unsigned int argv); static int hdmitx_cntl_misc(struct hdmitx_dev *hdev, unsigned int cmd, unsigned int argv); -static void digital_clk_on(unsigned char flag); -static void digital_clk_off(unsigned char flag); + +#define EDID_RAM_ADDR_SIZE (8) + +/* HSYNC polarity: active high */ +#define HSYNC_POLARITY 1 +/* VSYNC polarity: active high */ +#define VSYNC_POLARITY 1 +/* Pixel format: 0=RGB444; 1=YCbCr444; 2=Rsrv; 3=YCbCr422. */ +#define TX_INPUT_COLOR_FORMAT COLORSPACE_YUV444 +/* Pixel range: 0=16-235/240; 1=16-240; 2=1-254; 3=0-255. */ +#define TX_INPUT_COLOR_RANGE 0 +/* Pixel bit width: 4=24-bit; 5=30-bit; 6=36-bit; 7=48-bit. */ +#define TX_COLOR_DEPTH COLORDEPTH_24B + +/* store downstream ksv lists */ +static char *rptx_ksvs; +static char rptx_ksv_prbuf[1271]; /* 127 * 5 * 2 + 1 */ +MODULE_PARM_DESC(rptx_ksvs, "\n downstream ksvs\n"); +module_param(rptx_ksvs, charp, 0444); +static int rptx_ksv_no; +static int rptx_ksvlist_retry; +static char rptx_ksv_buf[635]; static int hdmitx_hpd_hw_op(enum hpd_op cmd) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: return hdmitx_hpd_hw_op_gxbb(cmd); - case MESON_CPU_MAJOR_ID_GXTVBB: + case MESON_CPU_ID_GXTVBB: return hdmitx_hpd_hw_op_gxtvbb(cmd); - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: return hdmitx_hpd_hw_op_gxl(cmd); - case MESON_CPU_MAJOR_ID_TXLX: + case MESON_CPU_ID_TXLX: return hdmitx_hpd_hw_op_txlx(cmd); default: break; @@ -161,15 +122,17 @@ static int hdmitx_hpd_hw_op(enum hpd_op cmd) int read_hpd_gpio(void) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: return read_hpd_gpio_gxbb(); - case MESON_CPU_MAJOR_ID_GXTVBB: + case MESON_CPU_ID_GXTVBB: return read_hpd_gpio_gxtvbb(); - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: return read_hpd_gpio_gxl(); - case MESON_CPU_MAJOR_ID_TXLX: + case MESON_CPU_ID_TXLX: return read_hpd_gpio_txlx(); default: break; @@ -180,15 +143,17 @@ EXPORT_SYMBOL(read_hpd_gpio); int hdmitx_ddc_hw_op(enum ddc_op cmd) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: return hdmitx_ddc_hw_op_gxbb(cmd); - case MESON_CPU_MAJOR_ID_GXTVBB: + case MESON_CPU_ID_GXTVBB: return hdmitx_ddc_hw_op_gxtvbb(cmd); - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: return hdmitx_ddc_hw_op_gxl(cmd); - case MESON_CPU_MAJOR_ID_TXLX: + case MESON_CPU_ID_TXLX: return hdmitx_ddc_hw_op_txlx(cmd); default: break; @@ -296,7 +261,7 @@ int hdmitx_hdcp_opr(unsigned int val) static void config_avmute(unsigned int val) { - pr_info("avmute set to %d\n", val); + pr_info(HW "avmute set to %d\n", val); switch (val) { case SET_AVMUTE: hdmitx_set_reg_bits(HDMITX_DWC_FC_GCP, 1, 1, 1); @@ -319,7 +284,7 @@ static void config_video_mapping(enum hdmi_color_space cs, { unsigned int val = 0; - pr_info("hdmitx: config: cs = %d cd = %d\n", cs, cd); + pr_info("config: cs = %d cd = %d\n", cs, cd); switch (cs) { case COLORSPACE_RGB444: switch (cd) { @@ -370,7 +335,7 @@ static void config_video_mapping(enum hdmi_color_space cs, val = 0x12; break; case COLORDEPTH_48B: - pr_info("hdmitx: y422 no 48bits mode\n"); + pr_info("y422 no 48bits mode\n"); break; default: break; @@ -422,21 +387,69 @@ static void config_video_mapping(enum hdmi_color_space cs, * bit[10:8]: HDMI VIC * bit[7:0]: CEA VIC */ -static unsigned int get_hdmitx_format(void) +static unsigned int hdmitx_get_format(void) { - return hd_read_reg(P_ISA_DEBUG_REG0); + unsigned int ret = 0; + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_TXLX: + ret = hdmitx_get_format_txlx(); + break; + case MESON_CPU_ID_GXBB: + case MESON_CPU_ID_GXTVBB: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + default: + ret = hd_read_reg(P_ISA_DEBUG_REG0); + break; + } + + return ret; } static int hdmitx_uboot_already_display(void) { + int ret = 0; + if ((hd_read_reg(P_HHI_HDMI_CLK_CNTL) & (1 << 8)) && (hd_read_reg(P_HHI_HDMI_PLL_CNTL) & (1 << 31)) - && (get_hdmitx_format())) { - pr_info("hdmitx: alread display in uboot 0x%x\n", - get_hdmitx_format()); - return 1; - } else - return 0; + && (hdmitx_get_format())) { + pr_info(HW "alread display in uboot 0x%x\n", + hdmitx_get_format()); + ret = 1; + } else { + pr_info(HW "hdmitx_get_format:0x%x\n", + hdmitx_get_format()); + pr_info(HW "P_HHI_HDMI_CLK_CNTL :0x%x\n", + hd_read_reg(P_HHI_HDMI_CLK_CNTL)); + pr_info(HW "P_HHI_HDMI_PLL_CNTL :0x%x\n", + hd_read_reg(P_HHI_HDMI_PLL_CNTL)); + ret = 0; + } + + return ret; +} + +/* reset HDMITX APB & TX */ +void hdmitx_sys_reset(void) +{ + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_TXLX: + hdmitx_sys_reset_txlx(); + break; + case MESON_CPU_ID_GXBB: + case MESON_CPU_ID_GXTVBB: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + default: + hd_set_reg_bits(P_RESET0_REGISTER, 1, 19, 1); + hd_set_reg_bits(P_RESET2_REGISTER, 1, 15, 1); + hd_set_reg_bits(P_RESET2_REGISTER, 1, 2, 1); + break; + } } /* for 30bits colordepth */ @@ -447,27 +460,15 @@ static void set_vmode_clk(struct hdmitx_dev *hdev) static void hdmi_hwp_init(struct hdmitx_dev *hdev) { - /* Enable clocks and bring out of reset */ + hdmitx_set_sys_clk(hdev, 0xff); - /* Enable hdmitx_sys_clk */ - /* .clk0 ( cts_oscin_clk ), */ - /* .clk1 ( fclk_div4 ), */ - /* .clk2 ( fclk_div3 ), */ - /* .clk3 ( fclk_div5 ), */ -/* [10: 9] clk_sel. select cts_oscin_clk=24MHz */ -/* [ 8] clk_en. Enable gated clock */ -/* [ 6: 0] clk_div. Divide by 1. = 24/1 = 24 MHz */ - hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 0x100, 0, 16); + hdmitx_set_cts_hdcp22_clk(hdev); + hdmitx_set_hdcp_pclk(hdev); - hd_write_reg(P_HHI_HDCP22_CLK_CNTL, 0x01000100); - hd_set_reg_bits(P_HHI_GCLK_MPEG2, 1, 3, 1); - -/* Enable clk81_hdmitx_pclk */ - hd_set_reg_bits(P_HHI_GCLK_MPEG2, 1, 4, 1); /* wire wr_enable = control[3]; */ /* wire fifo_enable = control[2]; */ /* assign phy_clk_en = control[1]; */ -/* Bring HDMITX MEM output of power down */ + /* Bring HDMITX MEM output of power down */ hd_set_reg_bits(P_HHI_MEM_PD_REG0, 0, 8, 8); if (hdmitx_uboot_already_display()) { /* Get uboot output color space from AVI */ @@ -521,25 +522,22 @@ static void hdmi_hwp_init(struct hdmitx_dev *hdev) break; } } - return; + } else { + hdev->para->cd = COLORDEPTH_RESERVED; + hdev->para->cs = COLORSPACE_RESERVED; + /* reset HDMITX APB & TX & PHY */ + hdmitx_sys_reset(); + /* Enable APB3 fail on error */ + hd_set_reg_bits(P_HDMITX_CTRL_PORT, 1, 15, 1); + hd_set_reg_bits((P_HDMITX_CTRL_PORT + 0x10), 1, 15, 1); + /* Bring out of reset */ + hdmitx_wr_reg(HDMITX_TOP_SW_RESET, 0); + udelay(200); + hdmitx_set_reg_bits(HDMITX_TOP_CLK_CNTL, 3, 0, 2); + hdmitx_set_reg_bits(HDMITX_TOP_CLK_CNTL, 3, 4, 2); + hdmitx_wr_reg(HDMITX_DWC_MC_LOCKONCLOCK, 0xff); + hdmitx_wr_reg(HDMITX_TOP_INTR_MASKN, 0x1f); } - - hdev->para->cd = COLORDEPTH_RESERVED; - hdev->para->cs = COLORSPACE_RESERVED; - /* reset HDMITX APB & TX & PHY */ - hd_set_reg_bits(P_RESET0_REGISTER, 1, 19, 1); - hd_set_reg_bits(P_RESET2_REGISTER, 1, 15, 1); - hd_set_reg_bits(P_RESET2_REGISTER, 1, 2, 1); - /* Enable APB3 fail on error */ - hd_set_reg_bits(P_HDMITX_CTRL_PORT, 1, 15, 1); - hd_set_reg_bits((P_HDMITX_CTRL_PORT + 0x10), 1, 15, 1); - /* Bring out of reset */ - hdmitx_wr_reg(HDMITX_TOP_SW_RESET, 0); - udelay(200); - hdmitx_set_reg_bits(HDMITX_TOP_CLK_CNTL, 3, 0, 2); - hdmitx_set_reg_bits(HDMITX_TOP_CLK_CNTL, 3, 4, 2); - hdmitx_wr_reg(HDMITX_DWC_MC_LOCKONCLOCK, 0xff); - hdmitx_wr_reg(HDMITX_TOP_INTR_MASKN, 0x1f); } static void hdmi_hwi_init(struct hdmitx_dev *hdev) @@ -617,11 +615,9 @@ void HDMITX_Meson_Init(struct hdmitx_dev *hdev) hdev->HWOp.CntlConfig = hdmitx_cntl_config; hdev->HWOp.CntlMisc = hdmitx_cntl_misc; init_reg_map(hdev->chip_type); - digital_clk_on(0xff); hdmi_hwp_init(hdev); hdmi_hwi_init(hdev); - config_avmute(CLR_AVMUTE); - hdmitx_set_audmode(NULL, NULL); + hdev->HWOp.CntlMisc(hdev, MISC_AVMUTE_OP, CLR_AVMUTE); rptx_ksvs = &rptx_ksv_prbuf[0]; } @@ -631,10 +627,10 @@ static irqreturn_t intr_handler(int irq, void *dev) struct hdmitx_dev *hdev = (struct hdmitx_dev *)dev; /* get interrupt status */ data32 = hdmitx_rd_reg(HDMITX_TOP_INTR_STAT); - hdmi_print(IMP, SYS "irq %x\n", data32); + pr_info(HW "irq %x\n", data32); if (hdev->hpd_lock == 1) { hdmitx_wr_reg(HDMITX_TOP_INTR_STAT_CLR, 0xf); - hdmi_print(IMP, HPD "HDMI hpd locked\n"); + pr_info(HW "HDMI hpd locked\n"); goto next; } /* check HPD status */ @@ -656,7 +652,7 @@ static irqreturn_t intr_handler(int irq, void *dev) hdev->hdmitx_event |= HDMI_TX_HPD_PLUGOUT; hdev->hdmitx_event &= ~HDMI_TX_HPD_PLUGIN; queue_delayed_work(hdev->hdmi_wq, - &hdev->work_hpd_plugout, 0); + &hdev->work_hpd_plugout, HZ / 50); } next: /* internal interrupt */ @@ -667,7 +663,7 @@ next: if (data32 & (1 << 3)) { unsigned int rd_nonce_mode = hdmitx_rd_reg(HDMITX_TOP_SKP_CNTL_STAT) & 0x1; - pr_info("hdcp22: Nonce %s Vld: %d\n", + pr_info(HW "hdcp22: Nonce %s Vld: %d\n", rd_nonce_mode ? "HW" : "SW", ((hdmitx_rd_reg(HDMITX_TOP_SKP_CNTL_STAT) >> 31) & 1)); if (rd_nonce_mode) @@ -684,7 +680,7 @@ next: } } if (data32 & (1 << 30)) { - pr_info("hdcp22: reg stat: 0x%x\n", + pr_info(HW "hdcp22: reg stat: 0x%x\n", hdmitx_rd_reg(HDMITX_DWC_HDCP22REG_STAT)); hdmitx_wr_reg(HDMITX_DWC_HDCP22REG_STAT, 0xff); } @@ -709,13 +705,6 @@ static signed int to_signed(unsigned int a) return a - 16; } -static void delay_us(int us) -{ - /* udelay(us); */ - if (delay_flag&0x1) - mdelay((us+999)/1000); -} /* delay_us */ - /* * mode: 1 means Progressive; 0 means interlaced */ @@ -1644,63 +1633,52 @@ static void hdmi_tvenc_set(struct hdmitx_vidpara *param) hd_set_reg_bits(P_VPU_HDMI_SETTING, 1, 1, 1); } -static void digital_clk_off(unsigned char flag) -{ - /* TODO */ -} - -static void digital_clk_on(unsigned char flag) -{ -/* clk81_set(); */ - if (flag&4) { - hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 0, 0, 7); - hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 0, 9, 3); - hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 1, 8, 1); - } - if (flag&2) { - /* on hdmi pixel clock */ - hd_write_reg(P_HHI_GCLK_MPEG2, - hd_read_reg(P_HHI_GCLK_MPEG2) | (1<<4)); - hd_write_reg(P_HHI_GCLK_OTHER, - hd_read_reg(P_HHI_GCLK_OTHER)|(1<<17)); - } -} - void phy_pll_off(void) { hdmi_phy_suspend(); } -static void hdmi_audio_init(unsigned int spdif_flag) -{ - return; - /* TODO */ -} - /************************************ * hdmitx hardware level interface *************************************/ - -static void hdmitx_dump_tvenc_reg(int cur_VIC, int pr_info_flag) -{ -} - -static void hdmitx_config_tvenc_reg(int vic, unsigned int reg, - unsigned int val) -{ -} - static void hdmitx_set_pll(struct hdmitx_dev *hdev) { - hdmi_print(IMP, SYS "set pll\n"); - hdmi_print(IMP, SYS "param->VIC:%d\n", hdev->cur_video_param->VIC); - - set_vmode_clk(hdev); + hdmitx_set_clk(hdev); } static void set_phy_by_mode(unsigned int mode) { - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) { + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_M8B: + case MESON_CPU_ID_GXBB: + case MESON_CPU_ID_GXTVBB: + /* other than GXL */ + switch (mode) { + case 1: /* 5.94Gbps, 3.7125Gbsp */ + hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x33353245); + hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0x2100115b); + break; + case 2: /* 2.97Gbps */ + hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x33634283); + hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0xb000115b); + break; + case 3: /* 1.485Gbps, and below */ + default: + hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x33632122); + hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0x2000115b); + break; + } + break; + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + case MESON_CPU_ID_TXL: + case MESON_CPU_ID_TXLX: + case MESON_CPU_ID_AXG: + case MESON_CPU_ID_GXLX: + case MESON_CPU_ID_TXHD: + default: switch (mode) { case 1: /* 5.94Gbps, 3.7125Gbsp */ hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x333d3282); @@ -1719,23 +1697,6 @@ static void set_phy_by_mode(unsigned int mode) hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0x0016315b); break; } - return; - } - - /* other than GXL */ - switch (mode) { - case 1: /* 5.94Gbps, 3.7125Gbsp */ - hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x33353245); - hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0x2100115b); - break; - case 2: /* 2.97Gbps */ - hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x33634283); - hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0xb000115b); - break; - case 3: /* 1.485Gbps, and below */ - default: - hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x33632122); - hd_write_reg(P_HHI_HDMI_PHY_CNTL3, 0x2000115b); break; } } @@ -1745,7 +1706,7 @@ static void hdmitx_set_phy(struct hdmitx_dev *hdev) if (!hdev) return; hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0x0); -#if 1 + /* P_HHI_HDMI_PHY_CNTL1 bit[1]: enable clock bit[0]: soft reset */ #define RESET_HDMI_PHY() \ do { \ @@ -1757,7 +1718,7 @@ do { \ hd_set_reg_bits(P_HHI_HDMI_PHY_CNTL1, 0x0390, 16, 16); hd_set_reg_bits(P_HHI_HDMI_PHY_CNTL1, 0x1, 17, 1); - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXL) + if (hdev->chip_type >= MESON_CPU_ID_GXL) hd_set_reg_bits(P_HHI_HDMI_PHY_CNTL1, 0x0, 17, 1); hd_set_reg_bits(P_HHI_HDMI_PHY_CNTL1, 0x0, 0, 4); msleep(100); @@ -1765,7 +1726,7 @@ do { \ RESET_HDMI_PHY(); RESET_HDMI_PHY(); #undef RESET_HDMI_PHY -#endif + switch (hdev->cur_VIC) { case HDMI_4k2k_24: case HDMI_4k2k_25: @@ -1815,7 +1776,7 @@ do { \ static void set_tmds_clk_div40(unsigned int div40) { - pr_info("hdmitx div40: %d\n", div40); + pr_info(HW "div40: %d\n", div40); if (div40) { hdmitx_wr_reg(HDMITX_TOP_TMDS_CLK_PTTN_01, 0); hdmitx_wr_reg(HDMITX_TOP_TMDS_CLK_PTTN_23, 0x03ff03ff); @@ -1877,99 +1838,75 @@ static void hdmitx_set_scdc(struct hdmitx_dev *hdev) scdc_config(hdev); } -static int hdmitx_set_dispmode(struct hdmitx_dev *hdev) +void hdmitx_set_enc_hw(struct hdmitx_dev *hdev) { struct hdmi_format_para *para = NULL; - if (hdev->cur_video_param == NULL) /* disable HDMI */ - return 0; - if (!hdmitx_edid_VIC_support(hdev->cur_video_param->VIC)) - return -1; - hdev->cur_VIC = hdev->cur_video_param->VIC; + set_vmode_enc_hw(hdev); - hdmitx_set_scdc(hdev); - - if (color_depth_f == 24) - hdev->cur_video_param->color_depth = COLORDEPTH_24B; - else if (color_depth_f == 30) - hdev->cur_video_param->color_depth = COLORDEPTH_30B; - else if (color_depth_f == 36) - hdev->cur_video_param->color_depth = COLORDEPTH_36B; - else if (color_depth_f == 48) - hdev->cur_video_param->color_depth = COLORDEPTH_48B; - hdmi_print(INF, SYS "set mode VIC %d (cd%d,cs%d,pm%d,vd%d,%x)\n", - hdev->cur_video_param->VIC, color_depth_f, COLORSPACE_f, - power_mode, power_off_vdac_flag, serial_reg_val); - if (COLORSPACE_f != 0) - hdev->cur_video_param->color = COLORSPACE_f; - hdmitx_set_pll(hdev); - /*hdmitx_set_phy(hdev);*/ - if (hdev->flag_3dfp) - set_vmode_3dfp_enc_hw(hdev->cur_video_param->VIC); - else - set_vmode_enc_hw(hdev->cur_video_param->VIC); para = hdmi_get_fmt_paras(hdev->cur_video_param->VIC); + if (para == NULL) { pr_info("error at %s[%d] vic = %d\n", __func__, __LINE__, - hdev->cur_video_param->VIC); + hdev->cur_video_param->VIC); } else { hd_write_reg(P_VPP_POSTBLEND_H_SIZE, para->hdmitx_vinfo.width); } if (hdev->flag_3dfp) { hd_write_reg(P_VPU_HDMI_SETTING, 0x8e); - goto next; + } else { + switch (hdev->cur_video_param->VIC) { + case HDMI_480i60: + case HDMI_480i60_16x9: + case HDMI_576i50: + case HDMI_576i50_16x9: + case HDMI_480i60_16x9_rpt: + case HDMI_576i50_16x9_rpt: + hdmi_tvenc480i_set(hdev->cur_video_param); + break; + case HDMI_1080i60: + case HDMI_1080i50: + hdmi_tvenc1080i_set(hdev->cur_video_param); + break; + case HDMI_4k2k_30: + case HDMI_4k2k_25: + case HDMI_4k2k_24: + case HDMI_4k2k_smpte_24: + case HDMI_4096x2160p25_256x135: + case HDMI_4096x2160p30_256x135: + case HDMI_4096x2160p50_256x135: + case HDMI_4096x2160p60_256x135: + case HDMI_3840x2160p50_16x9: + case HDMI_3840x2160p60_16x9: + case HDMI_3840x2160p50_16x9_Y420: + case HDMI_3840x2160p60_16x9_Y420: + case HDMI_4096x2160p50_256x135_Y420: + case HDMI_4096x2160p60_256x135_Y420: + hdmi_tvenc4k2k_set(hdev->cur_video_param); + break; + default: + hdmi_tvenc_set(hdev->cur_video_param); + } } - switch (hdev->cur_video_param->VIC) { - case HDMI_480i60: - case HDMI_480i60_16x9: - case HDMI_576i50: - case HDMI_576i50_16x9: - case HDMI_480i60_16x9_rpt: - case HDMI_576i50_16x9_rpt: - hdmi_tvenc480i_set(hdev->cur_video_param); - break; - case HDMI_1080i60: - case HDMI_1080i50: - hdmi_tvenc1080i_set(hdev->cur_video_param); - break; - case HDMI_4k2k_30: - case HDMI_4k2k_25: - case HDMI_4k2k_24: - case HDMI_4k2k_smpte_24: - case HDMI_4096x2160p25_256x135: - case HDMI_4096x2160p30_256x135: - case HDMI_4096x2160p50_256x135: - case HDMI_4096x2160p60_256x135: - case HDMI_3840x2160p50_16x9: - case HDMI_3840x2160p60_16x9: - case HDMI_3840x2160p50_16x9_Y420: - case HDMI_3840x2160p60_16x9_Y420: - case HDMI_4096x2160p50_256x135_Y420: - case HDMI_4096x2160p60_256x135_Y420: - hdmi_tvenc4k2k_set(hdev->cur_video_param); - break; - default: - hdmi_tvenc_set(hdev->cur_video_param); - } -next: -/* [ 3: 2] chroma_dnsmp. 0=use pixel 0; 1=use pixel 1; 2=use average. */ -/* [ 5] hdmi_dith_md: random noise selector. */ + /* [ 3: 2] chroma_dnsmp. 0=use pixel 0; 1=use pixel 1; 2=use average. */ + /* [ 5] hdmi_dith_md: random noise selector. */ hd_write_reg(P_VPU_HDMI_FMT_CTRL, (((TX_INPUT_COLOR_FORMAT == - COLORSPACE_YUV420) ? 2 : 0) << 0) | (2 << 2) | - (0 << 4) | /* [4]dith_en: disable dithering */ - (0 << 5) | - (0 << 6)); /* [ 9: 6] hdmi_dith10_cntl. */ + COLORSPACE_YUV420) ? 2 : 0) << 0) | (2 << 2) | + (0 << 4) | /* [4]dith_en: disable dithering */ + (0 << 5) | + (0 << 6)); /* [ 9: 6] hdmi_dith10_cntl. */ if (hdev->para->cs == COLORSPACE_YUV420) { hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 2, 0, 2); hd_set_reg_bits(P_VPU_HDMI_SETTING, 0, 4, 4); hd_set_reg_bits(P_VPU_HDMI_SETTING, 1, 8, 1); } + switch (hdev->para->cd) { case COLORDEPTH_30B: case COLORDEPTH_36B: case COLORDEPTH_48B: - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXM) { + if (hdev->chip_type >= MESON_CPU_ID_GXM) { unsigned int hs_flag = 0; /* 12-10 dithering on */ hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 1, 4, 1); @@ -1986,9 +1923,9 @@ next: hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 0, 4, 1); hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 0, 10, 1); } - break; + break; default: - if (get_cpu_type() >= MESON_CPU_MAJOR_ID_GXM) { + if (hdev->chip_type >= MESON_CPU_ID_GXM) { /* 12-10 dithering off */ hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 0, 4, 1); /* 12-10 rounding on */ @@ -2001,17 +1938,9 @@ next: hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 0, 4, 1); hd_set_reg_bits(P_VPU_HDMI_FMT_CTRL, 1, 10, 1); } - break; + break; } - hdmitx_set_hw(hdev); - - /* move hdmitx_set_pll() to the end of this function. */ - /* hdmitx_set_pll(param); */ - hdev->cur_VIC = hdev->cur_video_param->VIC; - /* For 3D, enable phy by SystemControl at last step */ - if ((!hdev->flag_3dfp) && (!hdev->flag_3dtb) && (!hdev->flag_3dss)) - hdmitx_set_phy(hdev); switch (hdev->cur_video_param->VIC) { case HDMI_480i60: case HDMI_480i60_16x9: @@ -2025,38 +1954,27 @@ next: enc_vpu_bridge_reset(1); break; } +} - if (hdev->para->cs == COLORSPACE_YUV420) { - /* change AVI packet */ - hdmitx_set_reg_bits(HDMITX_DWC_FC_AVICONF0, 0x3, 0, 2); - mode420_half_horizontal_para(); - } else { - /* change AVI packet */ - unsigned int indicator = 0; - unsigned int data32 = 0x0; +static int hdmitx_set_dispmode(struct hdmitx_dev *hdev) +{ + if (hdev->cur_video_param == NULL) /* disable HDMI */ + return 0; + if (!hdmitx_edid_VIC_support(hdev->cur_video_param->VIC)) + return -1; + hdev->cur_VIC = hdev->cur_video_param->VIC; - switch (hdev->para->cs) { - case COLORSPACE_RGB444: - indicator = 0x0; - break; - case COLORSPACE_YUV422: - indicator = 0x1; - break; - case COLORSPACE_YUV444: - default: - indicator = 0x2; - break; - case COLORSPACE_YUV420: - indicator = 0x3; - break; - } - data32 = (0x40 | ((indicator&0x4)<<5) | (indicator&0x3)); - hdmitx_wr_reg(HDMITX_DWC_FC_AVICONF0, data32); - } + hdmitx_set_scdc(hdev); - hdmitx_set_reg_bits(HDMITX_DWC_FC_INVIDCONF, 0, 3, 1); - mdelay(1); - hdmitx_set_reg_bits(HDMITX_DWC_FC_INVIDCONF, 1, 3, 1); + hdmitx_set_pll(hdev); + + hdmitx_set_enc_hw(hdev); + + hdmitx_set_hw(hdev); + + /* For 3D, enable phy by SystemControl at last step */ + if ((!hdev->flag_3dfp) && (!hdev->flag_3dtb) && (!hdev->flag_3dss)) + hdmitx_set_phy(hdev); return 0; } @@ -2188,7 +2106,7 @@ static void set_aud_chnls(struct hdmitx_dev *hdev, { int i; - pr_info("hdmitx set channel status\n"); + pr_info(HW "set channel status\n"); for (i = 0; i < 9; i++) /* First, set all status to 0 */ hdmitx_wr_reg(HDMITX_DWC_FC_AUDSCHNLS0+i, 0x00); @@ -2288,7 +2206,7 @@ static void set_aud_acr_pkt(struct hdmitx_dev *hdev, unsigned int char_rate; /* audio packetizer config */ - hdmitx_wr_reg(HDMITX_DWC_AUD_INPUTCLKFS, tx_aud_src ? 4 : 0); + hdmitx_wr_reg(HDMITX_DWC_AUD_INPUTCLKFS, hdev->tx_aud_src ? 4 : 0); if ((audio_param->type == CT_MAT) || (audio_param->type == CT_DTS_HD_MA)) @@ -2312,7 +2230,7 @@ static void set_aud_acr_pkt(struct hdmitx_dev *hdev, default: break; } - pr_info("hdmitx aud_n_para = %d\n", aud_n_para); + pr_info(HW "aud_n_para = %d\n", aud_n_para); /* ACR packet configuration */ data32 = 0; @@ -2417,20 +2335,20 @@ static int hdmitx_set_audmode(struct hdmitx_dev *hdev, return 0; if (!audio_param) return 0; - pr_info("hdmtix: set audio\n"); + pr_info(HW "set audio\n"); audio_mute_op(hdev->tx_aud_cfg); /* PCM & 8 ch */ if ((audio_param->type == CT_PCM) && (audio_param->channel_num == (8 - 1))) - tx_aud_src = 1; + hdev->tx_aud_src = 1; else - tx_aud_src = 0; + hdev->tx_aud_src = 0; /* if hdev->aud_output_ch is true, select I2S as 8ch in, 2ch out */ if (hdev->aud_output_ch) - tx_aud_src = 1; + hdev->tx_aud_src = 1; - pr_info("hdmitx tx_aud_src = %d\n", tx_aud_src); + pr_info(HW "hdmitx tx_aud_src = %d\n", hdev->tx_aud_src); /* set_hdmi_audio_source(tx_aud_src ? 1 : 2); */ set_hdmi_audio_source(2); @@ -2454,7 +2372,7 @@ static int hdmitx_set_audmode(struct hdmitx_dev *hdev, /* [ 5] 0=select SPDIF; 1=select I2S. */ data32 = 0; data32 |= (0 << 7); /* [ 7] sw_audio_fifo_rst */ - data32 |= (tx_aud_src << 5); + data32 |= (hdev->tx_aud_src << 5); data32 |= (0 << 0); /* [3:0] i2s_in_en: enable it later in test.c */ /* if enable it now, fifo_overrun will happen, because packet don't get sent * out until initial DE detected. @@ -2493,8 +2411,8 @@ static int hdmitx_set_audmode(struct hdmitx_dev *hdev, set_aud_chnls(hdev, audio_param); - hdmitx_set_reg_bits(HDMITX_DWC_AUD_CONF0, tx_aud_src, 5, 1); - if (tx_aud_src == 1) { + hdmitx_set_reg_bits(HDMITX_DWC_AUD_CONF0, hdev->tx_aud_src, 5, 1); + if (hdev->tx_aud_src == 1) { if (GET_OUTCHN_MSK(hdev->aud_output_ch)) hdmitx_set_reg_bits(HDMITX_DWC_AUD_CONF0, GET_OUTCHN_MSK(hdev->aud_output_ch), 0, 4); @@ -2527,10 +2445,9 @@ static void hdmitx_setupirq(struct hdmitx_dev *phdev) static void hdmitx_uninit(struct hdmitx_dev *phdev) { free_irq(phdev->irq_hpd, (void *)phdev); - hdmi_print(1, "power off hdmi, unmux hpd\n"); + pr_info(HW "power off hdmi, unmux hpd\n"); phy_pll_off(); - digital_clk_off(7); /* off sys clk */ hdmitx_hpd_hw_op(HPD_UNMUX_HPD); } @@ -2566,7 +2483,7 @@ static int hdmitx_cntl(struct hdmitx_dev *hdev, unsigned int cmd, if (argv == HDMITX_LATE_RESUME) { hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL, 1, 30, 1); hw_reset_dbg(); - pr_info("hdmitx: swrstzreq\n"); + pr_info(HW "swrstzreq\n"); } return 0; } else if (cmd == HDMITX_HWCMD_MUX_HPD_IF_PIN_HIGH) { @@ -2575,9 +2492,9 @@ static int hdmitx_cntl(struct hdmitx_dev *hdev, unsigned int cmd, if (hdmitx_hpd_hw_op(HPD_READ_HPD_GPIO)) { msleep(500); if (hdmitx_hpd_hw_op(HPD_READ_HPD_GPIO)) { - hdmi_print(IMP, HPD "mux hpd\n"); - digital_clk_on(4); - delay_us(1000*100); + pr_info(HPD "mux hpd\n"); + hdmitx_set_sys_clk(hdev, 4); + mdelay(100); hdmitx_hpd_hw_op(HPD_MUX_HPD); } } @@ -2589,15 +2506,13 @@ static int hdmitx_cntl(struct hdmitx_dev *hdev, unsigned int cmd, int unmux_hpd_flag = argv; if (unmux_hpd_flag) { - hdmi_print(IMP, SYS "power off hdmi, unmux hpd\n"); + pr_info(HW "power off hdmi, unmux hpd\n"); phy_pll_off(); - digital_clk_off(4); /* off sys clk */ hdmitx_hpd_hw_op(HPD_UNMUX_HPD); } else { - hdmi_print(IMP, SYS "power off hdmi\n"); - digital_clk_on(6); + pr_info(HW "power off hdmi\n"); + hdmitx_set_sys_clk(hdev, 6); phy_pll_off(); - digital_clk_off(3); /* do not off sys clk */ } } return 0; @@ -2605,21 +2520,12 @@ static int hdmitx_cntl(struct hdmitx_dev *hdev, unsigned int cmd, static void hdmitx_print_info(struct hdmitx_dev *hdev, int pr_info_flag) { - hdmi_print(INF, "------------------\nHdmitx driver version: "); - hdmi_print(INF, "%s\nSerial %x\nColor Depth %d\n", HDMITX_VER, - serial_reg_val, color_depth_f); - hdmi_print(INF, "reset sequence %d\n", new_reset_sequence_flag); - hdmi_print(INF, "power mode %d\n", power_mode); - hdmi_print(INF, "%spowerdown when unplug\n", + pr_info(HW "------------------\nHdmitx driver version: "); + pr_info(HW "%s\n", HDMITX_VER); + pr_info(HW "%spowerdown when unplug\n", hdev->unplug_powerdown?"":"do not "); - hdmi_print(INF, "use_tvenc_conf_flag=%d\n", use_tvenc_conf_flag); - hdmi_print(INF, "vdac %s\n", power_off_vdac_flag?"off":"on"); - hdmi_print(INF, "hdmi audio %s\n", hdmi_audio_off_flag?"off":"on"); - if (!hdmi_audio_off_flag) - hdmi_print(INF, "audio out type %s\n", - i2s_to_spdif_flag?"spdif":"i2s"); - hdmi_print(INF, "delay flag %d\n", delay_flag); - hdmi_print(INF, "------------------\n"); + pr_info(HW "hdmi audio %s\n", hdev->hdmi_audio_off_flag?"off":"on"); + pr_info(HW "------------------\n"); } struct aud_cts_log { @@ -2721,36 +2627,6 @@ do { \ } \ } while (0) -static void hdmitx_dump_all_cvregs(void) -{ -#if 0 - unsigned int addr = 0, val = 0; - - DUMP_CVREG_SECTION(P_STB_TOP_CONFIG, P_CIPLUS_ENDIAN); - DUMP_CVREG_SECTION(P_PREG_CTLREG0_ADDR, P_AHB_BRIDGE_CNTL_REG2); - DUMP_CVREG_SECTION(P_BT_CTRL, P_BT656_ADDR_END); - DUMP_CVREG_SECTION(P_VERSION_CTRL, P_RESET7_LEVEL); - DUMP_CVREG_SECTION(P_SCR_HIU, P_HHI_HDMIRX_AUD_PLL_CNTL6); - DUMP_CVREG_SECTION(P_PARSER_CONTROL, P_PARSER_AV2_WRAP_COUNT); - DUMP_CVREG_SECTION(P_DVIN_FRONT_END_CTRL, P_DVIN_CTRL_STAT); - DUMP_CVREG_SECTION(P_AIU_958_BPF, P_AIU_I2S_CBUS_DDR_ADDR); - DUMP_CVREG_SECTION(P_GE2D_GEN_CTRL0, P_GE2D_GEN_CTRL4); - DUMP_CVREG_SECTION(P_AUDIO_COP_CTL2, P_EE_ASSIST_MBOX3_FIQ_SEL); - DUMP_CVREG_SECTION(P_AUDIN_SPDIF_MODE, P_AUDIN_ADDR_END); - DUMP_CVREG_SECTION(P_VDIN_SCALE_COEF_IDX, P_VDIN0_SCALE_COEF_IDX); - DUMP_CVREG_SECTION(P_VDIN0_SCALE_COEF, P_VDIN1_ASFIFO_CTRL3); - DUMP_CVREG_SECTION(P_L_GAMMA_CNTL_PORT, P_MLVDS_RESET_CONFIG_LO); - DUMP_CVREG_SECTION(P_VPP2_DUMMY_DATA, P_DI_CHAN2_URGENT_CTRL); - DUMP_CVREG_SECTION(P_DI_PRE_CTRL, P_DI_CANVAS_URGENT2); - DUMP_CVREG_SECTION(P_ENCP_VFIFO2VD_CTL, P_VIU2_VD1_FMT_W); - DUMP_CVREG_SECTION(P_VPU_OSD1_MMC_CTRL, P_VPU_PROT3_REQ_ONOFF); - DUMP_CVREG_SECTION(P_D2D3_GLB_CTRL, P_D2D3_RESEV_STATUS2); - DUMP_CVREG_SECTION(P_VI_HIST_CTRL, P_DEMO_CRTL); - DUMP_CVREG_SECTION(P_AO_RTI_STATUS_REG0, P_AO_SAR_ADC_REG12); - DUMP_CVREG_SECTION(P_STB_VERSION, P_DEMUX_SECTION_RESET_3); -#endif -} - #define DUMP_HDMITXREG_SECTION(start, end) \ do { \ if (start > end) { \ @@ -2824,19 +2700,12 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) } tmpbuf[i] = 0; - if ((strncmp(tmpbuf, "dumpreg", 7) == 0) || - (strncmp(tmpbuf, "dumptvencreg", 12) == 0)) { - hdmitx_dump_tvenc_reg(hdev->cur_VIC, 1); - return; - } else if (strncmp(tmpbuf, "testhpll", 8) == 0) { + if (strncmp(tmpbuf, "testhpll", 8) == 0) { ret = kstrtoul(tmpbuf + 8, 10, &value); hdev->cur_VIC = value; set_vmode_clk(hdev); return; - } else if (strncmp(tmpbuf, "testpll", 7) == 0) - return; - else if (strncmp(tmpbuf, "testedid", 8) == 0) { - dd(); + } else if (strncmp(tmpbuf, "testedid", 8) == 0) { hdev->HWOp.CntlDDC(hdev, DDC_RESET_EDID, 0); hdev->HWOp.CntlDDC(hdev, DDC_EDID_READ_DATA, 0); return; @@ -2888,9 +2757,6 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) if (i == 1) hdev->HWOp.CntlDDC(hdev, DDC_HDCP_OP, HDCP14_ON); return; - } else if (strncmp(tmpbuf, "dumpallregs", 11) == 0) { - hdmitx_dump_all_cvregs(); - return; } else if (strncmp(tmpbuf, "chkfmt", 6) == 0) { check_detail_fmt(); return; @@ -2905,10 +2771,10 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) } else if (strncmp(tmpbuf, "hpd_lock", 8) == 0) { if (tmpbuf[8] == '1') { hdev->hpd_lock = 1; - hdmi_print(INF, HPD "hdmitx: lock hpd\n"); + pr_info(HPD "hdmitx: lock hpd\n"); } else { hdev->hpd_lock = 0; - hdmi_print(INF, HPD "hdmitx: unlock hpd\n"); + pr_info(HPD "hdmitx: unlock hpd\n"); } return; } else if (strncmp(tmpbuf, "hpd_stick", 9) == 0) { @@ -2916,18 +2782,16 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) hdev->hdcp_hpd_stick = 1; else hdev->hdcp_hpd_stick = 0; - pr_info("hdmitx: %sstick hpd\n", + pr_info(HPD "hdmitx: %sstick hpd\n", (hdev->hdcp_hpd_stick) ? "" : "un"); } else if (strncmp(tmpbuf, "vic", 3) == 0) { - pr_info("hdmi vic count = %d\n", hdev->vic_count); + pr_info(HW "hdmi vic count = %d\n", hdev->vic_count); if ((tmpbuf[3] >= '0') && (tmpbuf[3] <= '9')) { hdev->vic_count = tmpbuf[3] - '0'; - hdmi_print(INF, SYS "set hdmi vic count = %d\n", + pr_info(HW "set hdmi vic count = %d\n", hdev->vic_count); } - } else if (strncmp(tmpbuf, "cec", 3) == 0) - return; - else if (strncmp(tmpbuf, "dumphdmireg", 11) == 0) { + } else if (strncmp(tmpbuf, "dumphdmireg", 11) == 0) { unsigned char reg_val = 0; unsigned int reg_adr = 0; @@ -2954,7 +2818,9 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) DUMP_HDMITX_SECTION(HDMITX_DWC_DESIGN_ID, HDMITX_DWC_A_KSVMEMCTRL); DUMP_HDMITX_HDCP_SECTION(HDMITX_DWC_HDCP_BSTATUS_0, - HDMITX_DWC_HDCPREG_BKSV0 - 1); + HDMITX_DWC_HDCP_REVOC_LIST_END); + DUMP_HDMITX_HDCP_SECTION(HDMITX_DWC_HDCPREG_BKSV0, + HDMITX_DWC_HDCPREG_BKSV4); DUMP_HDMITX_SECTION(HDMITX_DWC_HDCPREG_ANCONF, HDMITX_DWC_HDCP22REG_MUTE); DUMP_HDMITX_SECTION(HDMITX_DWC_A_HDCPCFG0, @@ -2970,12 +2836,12 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) /* HDMI CEC Regs address range:0xc000~0xc01c;0xc080~0xc094 */ for (cec_adr = 0xc000; cec_adr < 0xc01d; cec_adr++) { cec_val = hdmitx_rd_reg(cec_adr); - hdmi_print(INF, "HDMI CEC Regs[0x%x]: 0x%x\n", + pr_info(CEC "HDMI CEC Regs[0x%x]: 0x%x\n", cec_adr, cec_val); } for (cec_adr = 0xc080; cec_adr < 0xc095; cec_adr++) { cec_val = hdmitx_rd_reg(cec_adr); - hdmi_print(INF, "HDMI CEC Regs[0x%x]: 0x%x\n", + pr_info(CEC "HDMI CEC Regs[0x%x]: 0x%x\n", cec_adr, cec_val); } return; @@ -3008,75 +2874,22 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) i++; } return; - } else if (strncmp(tmpbuf, "pllcalc", 7) == 0) { - /* TODO clk_measure(0xff); */ - return; } else if (strncmp(tmpbuf, "hdmiaudio", 9) == 0) { ret = kstrtoul(tmpbuf+9, 16, &value); - if (value == 1) { - hdmi_audio_off_flag = 0; - hdmi_audio_init(i2s_to_spdif_flag); - } else if (value == 0) + if (value == 1) + hdev->hdmi_audio_off_flag = 0; + else if (value == 0) ; return; } else if (strncmp(tmpbuf, "cfgreg", 6) == 0) { ret = kstrtoul(tmpbuf+6, 16, &adr); ret = kstrtoul(buf+i+1, 16, &value); - hdmitx_config_tvenc_reg(hdev->cur_VIC, adr, value); return; - } else if (strncmp(tmpbuf, "tvenc_flag", 10) == 0) { - use_tvenc_conf_flag = tmpbuf[10]-'0'; - hdmi_print(INF, "set use_tvenc_conf_flag = %d\n", - use_tvenc_conf_flag); - } else if (strncmp(tmpbuf, "reset", 5) == 0) { - if (tmpbuf[5] == '0') - new_reset_sequence_flag = 0; - else - new_reset_sequence_flag = 1; - return; - } else if (strncmp(tmpbuf, "delay_flag", 10) == 0) - delay_flag = tmpbuf[10]-'0'; - else if (tmpbuf[0] == 'v') { + } else if (tmpbuf[0] == 'v') { hdmitx_print_info(hdev, 1); return; - } else if (tmpbuf[0] == 's') { - ret = kstrtoul(tmpbuf+1, 16, &serial_reg_val); - return; - } else if (tmpbuf[0] == 'c') { - if (tmpbuf[1] == 'd') { - ret = kstrtoul(tmpbuf+2, 10, &color_depth_f); - if ((color_depth_f != 24) && (color_depth_f != 30) && - (color_depth_f != 36)) { - pr_info("Color depth %lu is not supported\n", - color_depth_f); - color_depth_f = 0; - } - return; - } else if (tmpbuf[1] == 's') { - ret = kstrtoul(tmpbuf+2, 10, &COLORSPACE_f); - if (COLORSPACE_f > 2) { - pr_info("Color space %lu is not supported\n", - COLORSPACE_f); - COLORSPACE_f = 0; - } - } - } else if (strncmp(tmpbuf, "i2s", 2) == 0) { - if (strncmp(tmpbuf+3, "off", 3) == 0) - i2s_to_spdif_flag = 1; - else - i2s_to_spdif_flag = 0; - } else if (strncmp(tmpbuf, "pattern_on", 10) == 0) { - /* turn_on_shift_pattern(); */ - hdmi_print(INF, "Shift Pattern On\n"); - return; - } else if (strncmp(tmpbuf, "pattern_off", 11) == 0) { - hdmi_print(INF, "Shift Pattern Off\n"); - return; - } else if (strncmp(tmpbuf, "prbs", 4) == 0) - /* int prbs_mode =kstrtoul(tmpbuf+4, NULL, 10); */ - return; - else if (tmpbuf[0] == 'w') { - unsigned int read_back = 0; + } else if (tmpbuf[0] == 'w') { + unsigned long int read_back = 0; ret = kstrtoul(tmpbuf+2, 16, &adr); ret = kstrtoul(buf+i+1, 16, &value); @@ -3084,19 +2897,18 @@ static void hdmitx_debug(struct hdmitx_dev *hdev, const char *buf) hdmitx_wr_reg((unsigned int)adr, (unsigned int)value); read_back = hdmitx_rd_reg(adr); } - hdmi_print(INF, "write %x to %s reg[%x]\n", value, "HDMI", adr); -/* Add read back function in order to judge writing is OK or NG. */ - hdmi_print(INF, "Read Back %s reg[%x]=%x\n", "HDMI", + pr_info(HW "write %lx to %s reg[%lx]\n", value, "HDMI", adr); + /* read back in order to check writing is OK or NG. */ + pr_info(HW "Read Back %s reg[%lx]=%lx\n", "HDMI", adr, read_back); } else if (tmpbuf[0] == 'r') { ret = kstrtoul(tmpbuf+2, 16, &adr); if (buf[1] == 'h') value = hdmitx_rd_reg(adr); - hdmi_print(INF, "%s reg[%x]=%x\n", "HDMI", adr, value); + pr_info(HW "%s reg[%lx]=%lx\n", "HDMI", adr, value); } } - static void hdmitx_getediddata(unsigned char *des, unsigned char *src) { int i = 0; @@ -3139,7 +2951,7 @@ static void hdmitx_read_edid(unsigned char *rx_edid) timeout++; } if (timeout == 3) - pr_info("hdmitx: ddc timeout\n"); + pr_info(HW "ddc timeout\n"); hdmitx_wr_reg(HDMITX_DWC_IH_I2CM_STAT0, 1 << 1); /* Read back 8 bytes */ for (i = 0; i < 8; i++) { @@ -3148,8 +2960,8 @@ static void hdmitx_read_edid(unsigned char *rx_edid) if (byte_num == 126) { blk_no = rx_edid[126] + 1; if (blk_no > 4) { - pr_info("edid extension block number:"); - pr_info(" %d, reset to MAX 3\n", + pr_info(HW "edid extension block number:"); + pr_info(HW " %d, reset to MAX 3\n", blk_no - 1); blk_no = 4; /* Max extended block */ } @@ -3159,8 +2971,6 @@ static void hdmitx_read_edid(unsigned char *rx_edid) } } /* hdmi20_tx_read_edid */ -static unsigned char tmp_edid_buf[128*EDID_MAX_BLOCK] = { 0 }; - #define HDCP_NMOOFDEVICES 127 static int get_hdcp_depth(void) @@ -3434,26 +3244,23 @@ static int hdmitx_cntl_ddc(struct hdmitx_dev *hdev, unsigned int cmd, unsigned char *tmp_char = NULL; if (!(cmd & CMD_DDC_OFFSET)) - hdmi_print(ERR, "ddc: w: invalid cmd 0x%x\n", cmd); - else - hdmi_print(LOW, "ddc: cmd 0x%x\n", cmd); + pr_err(HW "ddc: invalid cmd 0x%x\n", cmd); + else if (cmd != 0x10000007) /* excepte DDC_HDCP_GET_AUTH */ + pr_info(HW "ddc: cmd 0x%x\n", cmd); switch (cmd) { case DDC_RESET_EDID: hdmitx_wr_reg(HDMITX_DWC_I2CM_SOFTRSTZ, 0); - memset(tmp_edid_buf, 0, ARRAY_SIZE(tmp_edid_buf)); - break; - case DDC_IS_EDID_DATA_READY: - + memset(hdev->tmp_edid_buf, 0, ARRAY_SIZE(hdev->tmp_edid_buf)); break; case DDC_EDID_READ_DATA: - hdmitx_read_edid(tmp_edid_buf); + hdmitx_read_edid(hdev->tmp_edid_buf); break; case DDC_EDID_GET_DATA: if (argv == 0) - hdmitx_getediddata(&hdev->EDID_buf[0], tmp_edid_buf); + hdmitx_getediddata(hdev->EDID_buf, hdev->tmp_edid_buf); else - hdmitx_getediddata(&hdev->EDID_buf1[0], tmp_edid_buf); + hdmitx_getediddata(hdev->EDID_buf1, hdev->tmp_edid_buf); break; case DDC_PIN_MUX_OP: if (argv == PIN_MUX) @@ -3510,9 +3317,6 @@ static int hdmitx_cntl_ddc(struct hdmitx_dev *hdev, unsigned int cmd, if (argv == HDCP22_OFF) hdmitx_hdcp_opr(6); break; - case DDC_IS_HDCP_ON: -/* argv = !!((hdmitx_rd_reg(TX_HDCP_MODE)) & (1 << 7)); */ - break; case DDC_HDCP_GET_BKSV: tmp_char = (unsigned char *) argv; for (i = 0; i < 5; i++) @@ -3545,7 +3349,7 @@ static int hdmitx_cntl_ddc(struct hdmitx_dev *hdev, unsigned int cmd, case DDC_HDCP14_GET_BCAPS_RP: return !!(hdmitx_rd_reg(HDMITX_DWC_A_HDCPOBS3) & (1 << 6)); default: - hdmi_print(INF, "ddc: unknown cmd: 0x%x\n", cmd); + pr_info(HW "ddc: unknown cmd: 0x%x\n", cmd); break; } return 1; @@ -3582,9 +3386,9 @@ static int hdmitx_cntl_config(struct hdmitx_dev *hdev, unsigned int cmd, int ret = 0; if (!(cmd & CMD_CONF_OFFSET)) - hdmi_print(ERR, "config: hdmitx: w: invalid cmd 0x%x\n", cmd); + pr_err(HW "config: invalid cmd 0x%x\n", cmd); else - hdmi_print(LOW, "config: hdmitx: conf cmd 0x%x\n", cmd); + pr_info(HW "config: cmd 0x%x\n", cmd); switch (cmd) { case CONF_HDMI_DVI_MODE: @@ -3593,8 +3397,6 @@ static int hdmitx_cntl_config(struct hdmitx_dev *hdev, unsigned int cmd, case CONF_GET_HDMI_DVI_MODE: ret = hdmitx_get_hdmi_dvi_config(hdev); break; - case CONF_SYSTEM_ST: - break; case CONF_AUDIO_MUTE_OP: audio_mute_op(argv == AUDIO_MUTE ? 0 : 1); break; @@ -3648,7 +3450,7 @@ static int hdmitx_cntl_config(struct hdmitx_dev *hdev, unsigned int cmd, hdmitx_set_reg_bits(HDMITX_DWC_FC_AVICONF3, argv, 2, 2); break; default: - hdmi_print(ERR, "config: hdmitx: unknown cmd: 0x%x\n", cmd); + pr_err(HW "config: unknown cmd: 0x%x\n", cmd); } return ret; @@ -3658,9 +3460,10 @@ static int hdmitx_tmds_rxsense(void) { unsigned int curr0, curr3; int ret = 0; + struct hdmitx_dev *hdev = get_hdmitx_device(); - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: curr0 = hd_read_reg(P_HHI_HDMI_PHY_CNTL0); curr3 = hd_read_reg(P_HHI_HDMI_PHY_CNTL3); if (curr0 == 0) @@ -3671,8 +3474,8 @@ static int hdmitx_tmds_rxsense(void) if (curr0 == 0) hd_write_reg(P_HHI_HDMI_PHY_CNTL0, 0); break; - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: default: curr0 = hd_read_reg(P_HHI_HDMI_PHY_CNTL0); curr3 = hd_read_reg(P_HHI_HDMI_PHY_CNTL3); @@ -3693,9 +3496,9 @@ static int hdmitx_cntl_misc(struct hdmitx_dev *hdev, unsigned int cmd, unsigned int argv) { if (!(cmd & CMD_MISC_OFFSET)) - hdmi_print(ERR, "misc: hdmitx: w: invalid cmd 0x%x\n", cmd); + pr_err(HW "misc: w: invalid cmd 0x%x\n", cmd); else - hdmi_print(LOW, "misc: hdmitx: misc cmd 0x%x\n", cmd); + pr_info(HW "misc: cmd 0x%x\n", cmd); switch (cmd) { case MISC_HPD_MUX_OP: @@ -3725,7 +3528,7 @@ static int hdmitx_cntl_misc(struct hdmitx_dev *hdev, unsigned int cmd, return hdmitx_tmds_rxsense(); case MISC_ESM_RESET: if (hdev->hdcp_hpd_stick == 1) { - pr_info("hdcp: stick mode\n"); + pr_info(HW "hdcp: stick mode\n"); break; } hdmitx_hdcp_opr(6); @@ -3750,7 +3553,7 @@ static int hdmitx_cntl_misc(struct hdmitx_dev *hdev, unsigned int cmd, hdmi_hwi_init(hdev); break; default: - hdmi_print(ERR, "misc: hdmitx: unknown cmd: 0x%x\n", cmd); + pr_err(HW "misc: unknown cmd: 0x%x\n", cmd); } return 1; } @@ -3805,9 +3608,9 @@ static int hdmitx_get_state(struct hdmitx_dev *hdev, unsigned int cmd, unsigned int argv) { if (!(cmd & CMD_STAT_OFFSET)) - hdmi_print(ERR, "stat: hdmitx: w: invalid cmd 0x%x\n", cmd); + pr_err(HW "state: invalid cmd 0x%x\n", cmd); else - hdmi_print(LOW, "stat: hdmitx: misc cmd 0x%x\n", cmd); + pr_info(HW "state: cmd 0x%x\n", cmd); switch (cmd) { case STAT_VIDEO_VIC: @@ -3828,7 +3631,6 @@ static void hdmi_phy_suspend(void) static void hdmi_phy_wakeup(struct hdmitx_dev *hdev) { hdmitx_set_phy(hdev); - /* hdmi_print(INF, SYS "phy wakeup\n"); */ } /* CRT_VIDEO SETTING FUNCTIONS @@ -3945,17 +3747,11 @@ static void config_hdmi20_tx(enum hdmi_vic vic, #define GET_TIMING(name) (t->name) - /* Enable clocks and bring out of reset */ - /* Enable hdmitx_sys_clk */ - /* .clk0 ( cts_oscin_clk ), */ - /* .clk1 ( fclk_div4 ), */ - /* .clk2 ( fclk_div3 ), */ - /* .clk3 ( fclk_div5 ), */ - hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 0x0100, 0, 16); + hdmitx_set_cts_sys_clk(hdev); /* Enable clk81_hdmitx_pclk */ - hd_set_reg_bits(P_HHI_GCLK_MPEG2, 1, 4, 1); + hdmitx_set_top_pclk(hdev); /* wire wr_enable = control[3]; */ /* wire fifo_enable = control[2]; */ @@ -3979,7 +3775,6 @@ static void config_hdmi20_tx(enum hdmi_vic vic, hdmitx_wr_reg(HDMITX_DWC_MC_CLKDIS, data32); /* Enable normal output to PHY */ - data32 = 0; data32 |= (1 << 12); data32 |= (0 << 8); @@ -3987,7 +3782,6 @@ static void config_hdmi20_tx(enum hdmi_vic vic, hdmitx_wr_reg(HDMITX_TOP_BIST_CNTL, data32); /* Configure video */ - vid_map = (input_color_format == COLORSPACE_RGB444) ? ((color_depth == COLORDEPTH_24B) ? 0x01 : (color_depth == COLORDEPTH_30B) ? 0x03 : @@ -4021,7 +3815,6 @@ static void config_hdmi20_tx(enum hdmi_vic vic, hdmitx_wr_reg(HDMITX_DWC_TX_BCBDATA1, 0x00); /* Configure Color Space Converter */ - csc_en = (input_color_format != output_color_format) ? 1 : 0; data32 = 0; @@ -4126,7 +3919,7 @@ static void config_hdmi20_tx(enum hdmi_vic vic, */ data32 = 0; data32 |= (0 << 7); - data32 |= (tx_aud_src << 5); + data32 |= (hdev->tx_aud_src << 5); data32 |= (0 << 0); hdmitx_wr_reg(HDMITX_DWC_AUD_CONF0, data32); @@ -4214,6 +4007,9 @@ static void config_hdmi20_tx(enum hdmi_vic vic, data32 = GET_TIMING(v_sync)&0x3f; hdmitx_wr_reg(HDMITX_DWC_FC_VSYNCINWIDTH, data32); + if (hdev->para->cs == COLORSPACE_YUV420) + mode420_half_horizontal_para(); + /* control period duration (typ 12 tmds periods) */ hdmitx_wr_reg(HDMITX_DWC_FC_CTRLDUR, 12); /* extended control period duration (typ 32 tmds periods) */ @@ -4233,7 +4029,6 @@ static void config_hdmi20_tx(enum hdmi_vic vic, hdmitx_wr_reg(HDMITX_DWC_FC_GCP, data32); /* write AVI Infoframe packet configuration */ - data32 = 0; data32 |= (((output_color_format>>2)&0x1) << 7); data32 |= (1 << 6); @@ -4570,9 +4365,12 @@ static void config_hdmi20_tx(enum hdmi_vic vic, hdmitx_wr_reg(HDMITX_DWC_MC_SWRSTZREQ, data32); hdmitx_wr_reg(HDMITX_DWC_FC_VSYNCINWIDTH, hdmitx_rd_reg(HDMITX_DWC_FC_VSYNCINWIDTH)); + + hdmitx_set_reg_bits(HDMITX_DWC_FC_INVIDCONF, 0, 3, 1); + mdelay(1); + hdmitx_set_reg_bits(HDMITX_DWC_FC_INVIDCONF, 1, 3, 1); } /* config_hdmi20_tx */ -/* TODO */ static void hdmitx_csc_config(unsigned char input_color_format, unsigned char output_color_format, unsigned char color_depth) @@ -4723,6 +4521,9 @@ static void hdmitx_set_hw(struct hdmitx_dev *hdev) return; } + pr_info(HW " config hdmitx IP vic = %d cd:%d cs: %d\n", vic, + hdev->para->cd, hdev->para->cs); + config_hdmi20_tx(vic, hdev, hdev->para->cd, TX_INPUT_COLOR_FORMAT, diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_reg.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_reg.h index c8295fdcf7e3..98b5a30ac608 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_reg.h +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hdmi_tx_reg.h @@ -906,22 +906,22 @@ int hdmitx_hdcp_opr(unsigned int val); /* [ 0] ksv_mem_request */ #define HDMITX_DWC_A_KSVMEMCTRL (DWC_OFFSET_MASK + 0x5016) -#define HDMITX_DWC_HDCP_BSTATUS_0 (DWC_OFFSET_MASK + 0x5020) -#define HDMITX_DWC_HDCP_BSTATUS_1 (DWC_OFFSET_MASK + 0x5021) -#define HDMITX_DWC_HDCP_M0_0 (DWC_OFFSET_MASK + 0x5022) -#define HDMITX_DWC_HDCP_M0_1 (DWC_OFFSET_MASK + 0x5023) -#define HDMITX_DWC_HDCP_M0_2 (DWC_OFFSET_MASK + 0x5024) -#define HDMITX_DWC_HDCP_M0_3 (DWC_OFFSET_MASK + 0x5025) -#define HDMITX_DWC_HDCP_M0_4 (DWC_OFFSET_MASK + 0x5026) -#define HDMITX_DWC_HDCP_M0_5 (DWC_OFFSET_MASK + 0x5027) -#define HDMITX_DWC_HDCP_M0_6 (DWC_OFFSET_MASK + 0x5028) -#define HDMITX_DWC_HDCP_M0_7 (DWC_OFFSET_MASK + 0x5029) -#define HDMITX_DWC_HDCP_KSV (DWC_OFFSET_MASK + 0x502A) -#define HDMITX_DWC_HDCP_VH (DWC_OFFSET_MASK + 0x52A5) -#define HDMITX_DWC_HDCP_REVOC_SIZE_0 (DWC_OFFSET_MASK + 0x52B9) -#define HDMITX_DWC_HDCP_REVOC_SIZE_1 (DWC_OFFSET_MASK + 0x52BA) -#define HDMITX_DWC_HDCP_REVOC_LIST (DWC_OFFSET_MASK + 0x52BB) -#define HDMITX_DWC_HDCP_REVOC_LIST_END (DWC_OFFSET_MASK + 0x667E) +#define HDMITX_DWC_HDCP_BSTATUS_0 (TOP_OFFSET_MASK + 0x2000) +#define HDMITX_DWC_HDCP_BSTATUS_1 (TOP_OFFSET_MASK + 0x2001) +#define HDMITX_DWC_HDCP_M0_0 (TOP_OFFSET_MASK + 0x2002) +#define HDMITX_DWC_HDCP_M0_1 (TOP_OFFSET_MASK + 0x2003) +#define HDMITX_DWC_HDCP_M0_2 (TOP_OFFSET_MASK + 0x2004) +#define HDMITX_DWC_HDCP_M0_3 (TOP_OFFSET_MASK + 0x2005) +#define HDMITX_DWC_HDCP_M0_4 (TOP_OFFSET_MASK + 0x2006) +#define HDMITX_DWC_HDCP_M0_5 (TOP_OFFSET_MASK + 0x2007) +#define HDMITX_DWC_HDCP_M0_6 (TOP_OFFSET_MASK + 0x2008) +#define HDMITX_DWC_HDCP_M0_7 (TOP_OFFSET_MASK + 0x2009) +#define HDMITX_DWC_HDCP_KSV (TOP_OFFSET_MASK + 0x200A) +#define HDMITX_DWC_HDCP_VH (TOP_OFFSET_MASK + 0x2285) +#define HDMITX_DWC_HDCP_REVOC_SIZE_0 (TOP_OFFSET_MASK + 0x2299) +#define HDMITX_DWC_HDCP_REVOC_SIZE_1 (TOP_OFFSET_MASK + 0x229A) +#define HDMITX_DWC_HDCP_REVOC_LIST (TOP_OFFSET_MASK + 0x229B) +#define HDMITX_DWC_HDCP_REVOC_LIST_END (TOP_OFFSET_MASK + 0x365E) /* HDCP BKSV Registers */ #define HDMITX_DWC_HDCPREG_BKSV0 (DWC_OFFSET_MASK + 0x7800) diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c index 737d2ef7c0a5..1899fff1504c 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.c @@ -19,16 +19,11 @@ #include #include #include -#include +#include #include "common.h" #include "mach_reg.h" #include "hw_clk.h" -/* local frac_rate flag */ -static uint32_t frac_rate; -/* enable or disable HDMITX SSPLL, enable by default */ -static int sspll_en = 1; - /* * HDMITX Clock configuration */ @@ -59,14 +54,92 @@ static inline int check_div(unsigned int div) return div; } -static void set_hdmitx_sys_clk(void) +void hdmitx_set_sys_clk(struct hdmitx_dev *hdev, unsigned char flag) { + if (flag&4) + hdmitx_set_cts_sys_clk(hdev); + + if (flag&2) { + hdmitx_set_top_pclk(hdev); + hdmitx_set_vclk2_encp(hdev); + } +} + +void hdmitx_set_vclk2_encp(struct hdmitx_dev *hdev) +{ + hd_write_reg(P_HHI_GCLK_OTHER, + hd_read_reg(P_HHI_GCLK_OTHER)|(1<<17)); +} + +void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev) +{ + hd_set_reg_bits(P_HHI_GCLK_OTHER, 1, 8, 1); +} + +void hdmitx_set_cts_sys_clk(struct hdmitx_dev *hdev) +{ + /* Enable cts_hdmitx_sys_clk */ + /* .clk0 ( cts_oscin_clk ), */ + /* .clk1 ( fclk_div4 ), */ + /* .clk2 ( fclk_div3 ), */ + /* .clk3 ( fclk_div5 ), */ + /* [10: 9] clk_sel. select cts_oscin_clk=24MHz */ + /* [ 8] clk_en. Enable gated clock */ + /* [ 6: 0] clk_div. Divide by 1. = 24/1 = 24 MHz */ hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 0, 9, 3); hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 0, 0, 7); hd_set_reg_bits(P_HHI_HDMI_CLK_CNTL, 1, 8, 1); } -static void set_gxb_hpll_clk_out(unsigned int clk) +void hdmitx_set_top_pclk(struct hdmitx_dev *hdev) +{ + /* top hdmitx pixel clock */ + hd_write_reg(P_HHI_GCLK_MPEG2, + hd_read_reg(P_HHI_GCLK_MPEG2) | (1<<4)); +} + +void hdmitx_set_cts_hdcp22_clk(struct hdmitx_dev *hdev) +{ + switch (hdev->chip_type) { + case MESON_CPU_ID_TXLX: + /* Enable cts_hdcp22_skpclk */ + /* .clk0 ( cts_oscin_clk ), */ + /* .clk1 ( fclk_div4 ), */ + /* .clk2 ( fclk_div3 ), */ + /* .clk3 ( fclk_div5 ), */ + /* [26: 25] clk_sel. select cts_oscin_clk=24MHz */ + /* [ 24] clk_en. Enable gated clock */ + /* [22: 16] clk_div. Divide by 1. = 24/1 = 24 MHz */ + clk_set_rate(hdev->hdmitx_clk_tree.hdcp22_tx_skp, 24000000); + clk_prepare_enable(hdev->hdmitx_clk_tree.hdcp22_tx_skp); + + /* Enable cts_hdcp22_esmclk */ + /* .clk0 ( fclk_div7 ), */ + /* .clk1 ( fclk_div4 ), */ + /* .clk2 ( fclk_div3 ), */ + /* .clk3 ( fclk_div5 ), */ + /* [10: 9] clk_sel. select fclk_div7*/ + /* [ 8] clk_en. Enable gated clock */ + /* [ 6: 0] clk_div. Divide by 1.*/ + clk_set_rate(hdev->hdmitx_clk_tree.hdcp22_tx_esm, 285714285); + clk_prepare_enable(hdev->hdmitx_clk_tree.hdcp22_tx_esm); + break; + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + default: + hd_write_reg(P_HHI_HDCP22_CLK_CNTL, 0x01000100); + break; + } +} + +void hdmitx_set_hdcp_pclk(struct hdmitx_dev *hdev) +{ + /* top hdcp pixel clock */ + hd_set_reg_bits(P_HHI_GCLK_MPEG2, 1, 3, 1); + +} + +static void set_gxb_hpll_clk_out(unsigned int frac_rate, unsigned int clk) { switch (clk) { case 5940000: @@ -191,7 +264,7 @@ static void set_gxb_hpll_clk_out(unsigned int clk) } } -static void set_gxtvbb_hpll_clk_out(unsigned int clk) +static void set_gxtvbb_hpll_clk_out(unsigned int frac_rate, unsigned int clk) { switch (clk) { case 5940000: @@ -311,18 +384,23 @@ static void set_gxtvbb_hpll_clk_out(unsigned int clk) static void set_hpll_clk_out(unsigned int clk) { - pr_info("config HPLL = %d\n", clk); + uint32_t frac_rate; + struct hdmitx_dev *hdev = get_hdmitx_device(); - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: - set_gxb_hpll_clk_out(clk); + frac_rate = hdev->frac_rate_policy; + + pr_info("config HPLL = %d frac_rate = %d\n", clk, frac_rate); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: + set_gxb_hpll_clk_out(frac_rate, clk); break; - case MESON_CPU_MAJOR_ID_GXTVBB: - set_gxtvbb_hpll_clk_out(clk); + case MESON_CPU_ID_GXTVBB: + set_gxtvbb_hpll_clk_out(frac_rate, clk); break; - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: - case MESON_CPU_MAJOR_ID_TXLX: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + case MESON_CPU_ID_TXLX: set_gxl_hpll_clk_out(frac_rate, clk); break; default: @@ -335,13 +413,15 @@ static void set_hpll_clk_out(unsigned int clk) /* HERE MUST BE BIT OPERATION!!! */ static void set_hpll_sspll(enum hdmi_vic vic) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: break; - case MESON_CPU_MAJOR_ID_GXTVBB: + case MESON_CPU_ID_GXTVBB: break; - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: set_hpll_sspll_gxl(vic); break; default: @@ -351,9 +431,11 @@ static void set_hpll_sspll(enum hdmi_vic vic) static void set_hpll_od1(unsigned int div) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: - case MESON_CPU_MAJOR_ID_GXTVBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: + case MESON_CPU_ID_GXTVBB: switch (div) { case 1: hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL2, 0, 16, 2); @@ -371,8 +453,8 @@ static void set_hpll_od1(unsigned int div) break; } break; - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: default: set_hpll_od1_gxl(div); break; @@ -381,9 +463,11 @@ static void set_hpll_od1(unsigned int div) static void set_hpll_od2(unsigned int div) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: - case MESON_CPU_MAJOR_ID_GXTVBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: + case MESON_CPU_ID_GXTVBB: switch (div) { case 1: hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL2, 0, 22, 2); @@ -401,8 +485,8 @@ static void set_hpll_od2(unsigned int div) break; } break; - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: default: set_hpll_od2_gxl(div); break; @@ -411,9 +495,11 @@ static void set_hpll_od2(unsigned int div) static void set_hpll_od3(unsigned int div) { - switch (get_cpu_type()) { - case MESON_CPU_MAJOR_ID_GXBB: - case MESON_CPU_MAJOR_ID_GXTVBB: + struct hdmitx_dev *hdev = get_hdmitx_device(); + + switch (hdev->chip_type) { + case MESON_CPU_ID_GXBB: + case MESON_CPU_ID_GXTVBB: switch (div) { case 1: hd_set_reg_bits(P_HHI_HDMI_PLL_CNTL2, 0, 18, 2); @@ -431,8 +517,8 @@ static void set_hpll_od3(unsigned int div) break; } break; - case MESON_CPU_MAJOR_ID_GXL: - case MESON_CPU_MAJOR_ID_GXM: + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: default: set_hpll_od3_gxl(div); break; @@ -744,13 +830,35 @@ static struct hw_enc_clk_val_group setting_3dfp_enc_clk_val[] = { 3450000, 1, 2, 2, VID_PLL_DIV_5, 1, 1, 1, -1}, }; -static void hdmitx_set_clk_(enum hdmi_vic vic, enum hdmi_color_depth cd) +static void hdmitx_set_clk_(struct hdmitx_dev *hdev) { int i = 0; int j = 0; struct hw_enc_clk_val_group *p_enc = NULL; + enum hdmi_vic vic = hdev->cur_VIC; + enum hdmi_color_space cs = hdev->para->cs; + enum hdmi_color_depth cd = hdev->para->cd; - if (cd == COLORDEPTH_24B) { + /* YUV 422 always use 24B mode */ + if (cs == COLORSPACE_YUV422) + cd = COLORDEPTH_24B; + + if (hdev->flag_3dfp) { + p_enc = &setting_3dfp_enc_clk_val[0]; + for (j = 0; j < sizeof(setting_3dfp_enc_clk_val) + / sizeof(struct hw_enc_clk_val_group); j++) { + for (i = 0; ((i < GROUP_MAX) && (p_enc[j].group[i] + != HDMI_VIC_END)); i++) { + if (vic == p_enc[j].group[i]) + goto next; + } + } + if (j == sizeof(setting_3dfp_enc_clk_val) + / sizeof(struct hw_enc_clk_val_group)) { + pr_info("Not find VIC = %d for hpll setting\n", vic); + return; + } + } else if (cd == COLORDEPTH_24B) { p_enc = &setting_enc_clk_val_24[0]; for (j = 0; j < sizeof(setting_enc_clk_val_24) / sizeof(struct hw_enc_clk_val_group); j++) { @@ -800,9 +908,11 @@ static void hdmitx_set_clk_(enum hdmi_vic vic, enum hdmi_color_depth cd) return; } next: - set_hdmitx_sys_clk(); + hdmitx_set_cts_sys_clk(hdev); set_hpll_clk_out(p_enc[j].hpll_clk_out); - if ((cd == COLORDEPTH_24B) && sspll_en) + /* 4K mode doesn't enable SS*/ + if ((cd == COLORDEPTH_24B) && (hdev->sspll) + && (p_enc[j].hpll_clk_out != 5940000)) set_hpll_sspll(vic); set_hpll_od1(p_enc[j].od1); set_hpll_od2(p_enc[j].od2); @@ -815,41 +925,6 @@ next: set_enci_div(p_enc[j].enci_div); } -static void hdmitx_set_3dfp_clk(enum hdmi_vic vic) -{ - int i = 0; - int j = 0; - struct hw_enc_clk_val_group *p_enc = NULL; - - p_enc = &setting_3dfp_enc_clk_val[0]; - for (j = 0; j < sizeof(setting_3dfp_enc_clk_val) - / sizeof(struct hw_enc_clk_val_group); j++) { - for (i = 0; ((i < GROUP_MAX) && (p_enc[j].group[i] - != HDMI_VIC_END)); i++) { - if (vic == p_enc[j].group[i]) - goto next; - } - } - if (j == sizeof(setting_3dfp_enc_clk_val) - / sizeof(struct hw_enc_clk_val_group)) { - pr_info("Not find VIC = %d for hpll setting\n", vic); - return; - } -next: - set_hdmitx_sys_clk(); - set_hpll_clk_out(p_enc[j].hpll_clk_out); - set_hpll_sspll(vic); - set_hpll_od1(p_enc[j].od1); - set_hpll_od2(p_enc[j].od2); - set_hpll_od3(p_enc[j].od3); - set_hpll_od3_clk_div(p_enc[j].vid_pll_div); - pr_info("j = %d vid_clk_div = %d\n", j, p_enc[j].vid_clk_div); - set_vid_clk_div(p_enc[j].vid_clk_div); - set_hdmi_tx_pixel_div(p_enc[j].hdmi_tx_pixel_div); - set_encp_div(p_enc[j].encp_div); - set_enci_div(p_enc[j].enci_div); -} - static int likely_frac_rate_mode(char *m) { if (strstr(m, "24hz") || strstr(m, "30hz") || strstr(m, "60hz") @@ -859,32 +934,26 @@ static int likely_frac_rate_mode(char *m) return 0; } -void hdmitx_set_clk(struct hdmitx_dev *hdev) +static void hdmitx_check_frac_rate(struct hdmitx_dev *hdev) { enum hdmi_vic vic = hdev->cur_VIC; struct hdmi_format_para *para = NULL; - frac_rate = hdev->frac_rate_policy; - pr_info("hdmitx: set clk: VIC = %d cd = %d frac_rate = %d\n", vic, - hdev->para->cd, frac_rate); para = hdmi_get_fmt_paras(vic); if (para && (para->name) && likely_frac_rate_mode(para->name)) ; else { - pr_info("hdmitx: %s doesn't have frac_rate\n", para->name); - frac_rate = 0; + pr_info("%s doesn't have frac_rate\n", para->name); + hdev->frac_rate_policy = 0; } - if (hdev->flag_3dfp) { - hdmitx_set_3dfp_clk(vic); - return; - } - if (hdev->para->cs != COLORSPACE_YUV422) - hdmitx_set_clk_(vic, hdev->para->cd); - else - hdmitx_set_clk_(vic, COLORDEPTH_24B); + pr_info("frac_rate = %d\n", hdev->frac_rate_policy); } -MODULE_PARM_DESC(sspll_en, "\n hdmitx sspll_en\n"); -module_param(sspll_en, int, 0664); +void hdmitx_set_clk(struct hdmitx_dev *hdev) +{ + hdmitx_check_frac_rate(hdev); + + hdmitx_set_clk_(hdev); +} diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h index c5befc65fa80..029a4e157310 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_clk.h @@ -53,6 +53,14 @@ struct hw_enc_clk_val_group { }; void hdmitx_set_clk(struct hdmitx_dev *hdev); +void hdmitx_set_cts_sys_clk(struct hdmitx_dev *hdev); +void hdmitx_set_top_pclk(struct hdmitx_dev *hdev); +void hdmitx_set_hdcp_pclk(struct hdmitx_dev *hdev); +void hdmitx_set_cts_hdcp22_clk(struct hdmitx_dev *hdev); +void hdmitx_set_sys_clk(struct hdmitx_dev *hdev, unsigned char flag); +void hdmitx_set_vclk2_encp(struct hdmitx_dev *hdev); +void hdmitx_set_vclk2_enci(struct hdmitx_dev *hdev); + #endif diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_txlx.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_txlx.c index beeb6e3a45b0..6df79d769e01 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_txlx.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/hw_txlx.c @@ -16,8 +16,28 @@ */ #include +#include #include "common.h" -#include "mach_reg.h" +#include "reg_ops.h" +#include "txlx_reg.h" + +unsigned int hdmitx_get_format_txlx(void) +{ + return hd_read_reg(P_ISA_DEBUG_REG0); +} + +/* + * hdmitx apb reset + * P_RESET0_REGISTER bit19 : hdmitx capb + * P_RESET2_REGISTER bit15 : hdmi system reset + * P_RESET2_REGISTER bit2 : hdmi tx + */ +void hdmitx_sys_reset_txlx(void) +{ + hd_set_reg_bits(P_RESET0_REGISTER, 1, 19, 1); + hd_set_reg_bits(P_RESET2_REGISTER, 1, 15, 1); + hd_set_reg_bits(P_RESET2_REGISTER, 1, 2, 1); +} /* * NAME PAD PINMUX GPIO @@ -30,30 +50,45 @@ int hdmitx_hpd_hw_op_txlx(enum hpd_op cmd) { int ret = 0; + struct hdmitx_dev *hdev = get_hdmitx_device(); + + if (hdev->pdev == NULL) { + pr_info("exit for null device of hdmitx!\n"); + return -ENODEV; + } + + if (hdev->pdev->pins == NULL) { + pr_info("exit for null pins of hdmitx device!\n"); + return -ENODEV; + } + + if (hdev->pdev->pins->p == NULL) { + pr_info("exit for null pinctrl of hdmitx device pins!\n"); + return -ENODEV; + } + switch (cmd) { case HPD_INIT_DISABLE_PULLUP: - hd_set_reg_bits(P_PAD_PULL_UP_REG1, 0, 21, 1); break; case HPD_INIT_SET_FILTER: hdmitx_wr_reg(HDMITX_TOP_HPD_FILTER, ((0xa << 12) | (0xa0 << 0))); break; case HPD_IS_HPD_MUXED: - ret = !!(hd_read_reg(P_PERIPHS_PIN_MUX_0) & (1 << 23)); + ret = 1; break; case HPD_MUX_HPD: - hd_set_reg_bits(P_PREG_PAD_GPIO1_EN_N, 1, 21, 1); - hd_set_reg_bits(P_PERIPHS_PIN_MUX_0, 1, 23, 1); + pinctrl_select_state(hdev->pdev->pins->p, + hdev->pinctrl_default); break; case HPD_UNMUX_HPD: - hd_set_reg_bits(P_PERIPHS_PIN_MUX_0, 0, 23, 1); - hd_set_reg_bits(P_PREG_PAD_GPIO1_EN_N, 1, 21, 1); + pinctrl_select_state(hdev->pdev->pins->p, hdev->pinctrl_i2c); break; case HPD_READ_HPD_GPIO: - ret = !!(hd_read_reg(P_PREG_PAD_GPIO1_I) & (1 << 21)); + ret = hdmitx_rd_reg(HDMITX_DWC_PHY_STAT0) & (1 << 1); break; default: - pr_info("error hpd cmd %d\n", cmd); + pr_err("error hpd cmd %d\n", cmd); break; } return ret; @@ -61,28 +96,41 @@ int hdmitx_hpd_hw_op_txlx(enum hpd_op cmd) int read_hpd_gpio_txlx(void) { - return !!(hd_read_reg(P_PREG_PAD_GPIO1_I) & (1 << 21)); + return hdmitx_rd_reg(HDMITX_DWC_PHY_STAT0) & (1 << 1); } int hdmitx_ddc_hw_op_txlx(enum ddc_op cmd) { int ret = 0; + struct hdmitx_dev *hdev = get_hdmitx_device(); + + if (hdev->pdev == NULL) { + pr_info("exit for null device of hdmitx!\n"); + return -ENODEV; + } + + if (hdev->pdev->pins == NULL) { + pr_info("exit for null pins of hdmitx device!\n"); + return -ENODEV; + } + + if (hdev->pdev->pins->p == NULL) { + pr_info("exit for null pinctrl of hdmitx device pins!\n"); + return -ENODEV; + } switch (cmd) { case DDC_INIT_DISABLE_PULL_UP_DN: - hd_set_reg_bits(P_PAD_PULL_UP_EN_REG1, 0, 22, 2); - hd_set_reg_bits(P_PAD_PULL_UP_REG1, 0, 22, 2); break; case DDC_MUX_DDC: - hd_set_reg_bits(P_PREG_PAD_GPIO1_EN_N, 3, 22, 2); - hd_set_reg_bits(P_PERIPHS_PIN_MUX_0, 3, 21, 2); + pinctrl_select_state(hdev->pdev->pins->p, + hdev->pinctrl_default); break; case DDC_UNMUX_DDC: - hd_set_reg_bits(P_PREG_PAD_GPIO1_EN_N, 3, 22, 2); - hd_set_reg_bits(P_PERIPHS_PIN_MUX_0, 0, 21, 2); + pinctrl_select_state(hdev->pdev->pins->p, hdev->pinctrl_i2c); break; default: - pr_info("error ddc cmd %d\n", cmd); + pr_err("error ddc cmd %d\n", cmd); } return ret; } diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/mach_reg.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/mach_reg.h index 87dff173a988..96c78d9b0579 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/mach_reg.h +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/mach_reg.h @@ -17,7 +17,7 @@ #ifndef __MACH_REG_H__ #define __MACH_REG_H__ -#include + #include struct reg_s { @@ -273,7 +273,7 @@ void init_reg_map(unsigned int type); #define AIU_HDMI_CLK_DATA_CTRL 0x152a /* register.h:2466 */ #define P_AIU_HDMI_CLK_DATA_CTRL CBUS_REG_ADDR(AIU_HDMI_CLK_DATA_CTRL) -#define ISA_DEBUG_REG0 0x2600 +#define ISA_DEBUG_REG0 0x00 #define P_ISA_DEBUG_REG0 CBUS_REG_ADDR(ISA_DEBUG_REG0) diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.c b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.c index f4d8b845f5f8..e3efb421f571 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.c +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.c @@ -30,19 +30,10 @@ #include #include #include -#include "mach_reg.h" +#include +#include "common.h" #include "hdmi_tx_reg.h" - -static int dbg_en; - -/* - * RePacket HDMI related registers rd/wr - */ -struct reg_map { - unsigned int phy_addr; - unsigned int size; - void __iomem *p; -}; +#include "reg_ops.h" /* For gxb/gxl/gxm */ static struct reg_map reg_maps_def[] = { @@ -87,7 +78,7 @@ static struct reg_map reg_maps_def[] = { /* For txlx */ static struct reg_map reg_maps_txlx[] = { [CBUS_REG_IDX] = { /* CBUS */ - .phy_addr = 0xffd00000, + .phy_addr = 0xffd0f000, .size = 0xa00000, }, [PERIPHS_REG_IDX] = { /* PERIPHS */ @@ -131,23 +122,22 @@ void init_reg_map(unsigned int type) int i; switch (type) { - case 1: + case MESON_CPU_ID_TXLX: map = reg_maps_txlx; break; default: map = reg_maps_def; - break; - } - - for (i = 0; i < REG_IDX_END; i++) { - map[i].p = ioremap(map[i].phy_addr, map[i].size); - if (!map[i].p) { - pr_info("hdmitx20: failed Mapped PHY: 0x%x\n", - map[i].phy_addr); - } else { - pr_info("hdmitx20: Mapped PHY: 0x%x\n", - map[i].phy_addr); + for (i = 0; i < REG_IDX_END; i++) { + map[i].p = ioremap(map[i].phy_addr, map[i].size); + if (!map[i].p) { + pr_info("hdmitx20: failed Mapped PHY: 0x%x\n", + map[i].phy_addr); + } else { + pr_info("hdmitx20: Mapped PHY: 0x%x\n", + map[i].phy_addr); + } } + break; } } @@ -170,11 +160,46 @@ unsigned int hd_read_reg(unsigned int addr) { unsigned int val = 0; unsigned int paddr = TO_PHY_ADDR(addr); + unsigned int index = (addr) >> BASE_REG_OFFSET; - val = readl(TO_PMAP_ADDR(addr)); + struct hdmitx_dev *hdev = get_hdmitx_device(); - if (dbg_en) - pr_info("Rd[0x%x] 0x%x\n", paddr, val); + switch (hdev->chip_type) { + case MESON_CPU_ID_TXLX: + switch (index) { + case CBUS_REG_IDX: + case RESET_CBUS_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + val = aml_read_cbus(addr); + break; + case VCBUS_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + val = aml_read_vcbus(addr); + break; + case AOBUS_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + val = aml_read_aobus(addr); + break; + case HHI_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + val = aml_read_hiubus(addr); + break; + default: + break; + } + break; + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + default: + val = readl(TO_PMAP_ADDR(addr)); + break; + } + + pr_debug(REG "Rd[0x%x] 0x%x\n", paddr, val); return val; } @@ -182,11 +207,46 @@ unsigned int hd_read_reg(unsigned int addr) void hd_write_reg(unsigned int addr, unsigned int val) { unsigned int paddr = TO_PHY_ADDR(addr); + unsigned int index = (addr) >> BASE_REG_OFFSET; - writel(val, TO_PMAP_ADDR(addr)); + struct hdmitx_dev *hdev = get_hdmitx_device(); - if (dbg_en) - pr_info("Wr[0x%x] 0x%x\n", paddr, val); + switch (hdev->chip_type) { + case MESON_CPU_ID_TXLX: + switch (index) { + case CBUS_REG_IDX: + case RESET_CBUS_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + aml_write_cbus(addr, val); + break; + case VCBUS_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + aml_write_vcbus(addr, val); + break; + case AOBUS_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + aml_write_aobus(addr, val); + break; + case HHI_REG_IDX: + addr &= ~(index << BASE_REG_OFFSET); + addr >>= 2; + aml_write_hiubus(addr, val); + break; + default: + break; + } + break; + case MESON_CPU_ID_GXL: + case MESON_CPU_ID_GXM: + default: + writel(val, TO_PMAP_ADDR(addr)); + break; + } + + pr_debug(REG "Wr[0x%x] 0x%x\n", paddr, val); } void hd_set_reg_bits(unsigned int addr, unsigned int value, @@ -218,8 +278,7 @@ unsigned int hdmitx_rd_reg(unsigned int addr) ); data = (unsigned int)(x0&0xffffffff); - if (dbg_en) - pr_info("%s rd[0x%x] 0x%x\n", offset ? "DWC" : "TOP", + pr_debug(REG "%s rd[0x%x] 0x%x\n", offset ? "DWC" : "TOP", addr, data); return data; } @@ -227,6 +286,7 @@ unsigned int hdmitx_rd_reg(unsigned int addr) void hdmitx_wr_reg(unsigned int addr, unsigned int data) { unsigned long offset = (addr & DWC_OFFSET_MASK) >> 24; + register long x0 asm("x0") = 0x82000019; register long x1 asm("x1") = (unsigned long)addr; register long x2 asm("x2") = data; @@ -239,8 +299,7 @@ void hdmitx_wr_reg(unsigned int addr, unsigned int data) : : "r"(x0), "r"(x1), "r"(x2) ); - if (dbg_en) - pr_info("%s wr[0x%x] 0x%x\n", offset ? "DWC" : "TOP", + pr_debug("%s wr[0x%x] 0x%x\n", offset ? "DWC" : "TOP", addr, data); } @@ -265,7 +324,7 @@ void hdmitx_poll_reg(unsigned int addr, unsigned int val, unsigned long timeout) mdelay(2); } if (time_after(jiffies, time + timeout)) - pr_info("hdmitx poll:0x%x val:0x%x T1=%lu t=%lu T2=%lu timeout\n", + pr_info(REG "hdmitx poll:0x%x val:0x%x T1=%lu t=%lu T2=%lu timeout\n", addr, val, time, timeout, jiffies); } @@ -273,15 +332,12 @@ void hdmitx_rd_check_reg(unsigned int addr, unsigned int exp_data, unsigned int mask) { unsigned long rd_data; + rd_data = hdmitx_rd_reg(addr); if ((rd_data | mask) != (exp_data | mask)) { - pr_info("HDMITX-DWC addr=0x%04x rd_data=0x%02x\n", + pr_info(REG "HDMITX-DWC addr=0x%04x rd_data=0x%02x\n", (unsigned int)addr, (unsigned int)rd_data); - pr_info("Error: HDMITX-DWC exp_data=0x%02x mask=0x%02x\n", + pr_info(REG "Error: HDMITX-DWC exp_data=0x%02x mask=0x%02x\n", (unsigned int)exp_data, (unsigned int)mask); } } - -MODULE_PARM_DESC(dbg_en, "\n debug_level\n"); -module_param(dbg_en, int, 0664); - diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.h new file mode 100644 index 000000000000..189c8fc72e00 --- /dev/null +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.h @@ -0,0 +1,85 @@ +/* + * drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/reg_ops.h + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef __REG_OPS_H__ +#define __REG_OPS_H__ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +/* + * RePacket HDMI related registers rd/wr + */ +struct reg_map { + unsigned int phy_addr; + unsigned int size; + void __iomem *p; +}; + +#define CBUS_REG_IDX 0 +#define PERIPHS_REG_IDX 1 +#define VCBUS_REG_IDX 2 +#define AOBUS_REG_IDX 3 +#define HHI_REG_IDX 4 +#define RESET_CBUS_REG_IDX 5 +#define HDMITX_REG_IDX 6 +#define HDMITX_SEC_REG_IDX 7 +#define ELP_ESM_REG_IDX 8 +#define REG_IDX_END 9 + +#define BASE_REG_OFFSET 24 + +#define CBUS_REG_ADDR(reg) \ + ((CBUS_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define PERIPHS_REG_ADDR(reg) \ + ((PERIPHS_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define VCBUS_REG_ADDR(reg) \ + ((VCBUS_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define AOBUS_REG_ADDR(reg) \ + ((AOBUS_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define HHI_REG_ADDR(reg) \ + ((HHI_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define RESET_CBUS_REG_ADDR(reg) \ + ((RESET_CBUS_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define HDMITX_SEC_REG_ADDR(reg) \ + ((HDMITX_SEC_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define HDMITX_REG_ADDR(reg) \ + ((HDMITX_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) +#define ELP_ESM_REG_ADDR(reg) \ + ((ELP_ESM_REG_IDX << BASE_REG_OFFSET) + (reg << 2)) + +extern unsigned int hd_read_reg(unsigned int addr); +extern void hd_write_reg(unsigned int addr, unsigned int val); +extern void hd_set_reg_bits(unsigned int addr, unsigned int value, + unsigned int offset, unsigned int len); +extern void init_reg_map(unsigned int type); + +#endif diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/tvenc_conf.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/tvenc_conf.h index a02bc53f7bb7..dd709654f01a 100644 --- a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/tvenc_conf.h +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/tvenc_conf.h @@ -15,7 +15,7 @@ * */ -#include +#include -void set_vmode_enc_hw(enum hdmi_vic vic); -void set_vmode_3dfp_enc_hw(enum hdmi_vic vic); /* For 3D Frame Packing */ + +void set_vmode_enc_hw(struct hdmitx_dev *hdev); diff --git a/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/txlx_reg.h b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/txlx_reg.h new file mode 100644 index 000000000000..c1107c34e8f3 --- /dev/null +++ b/drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/txlx_reg.h @@ -0,0 +1,30 @@ +/* + * drivers/amlogic/media/vout/hdmitx/hdmi_tx_20/hw/txlx_reg.h + * + * Copyright (C) 2017 Amlogic, Inc. All rights reserved. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, but WITHOUT + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + * more details. + * + */ + +#ifndef __TXLX_REG_H__ +#define __TXLX_REG_H__ +#include "reg_ops.h" + +#define RESET0_REGISTER 0x1001 +#define P_RESET0_REGISTER RESET_CBUS_REG_ADDR(RESET0_REGISTER) +#define RESET2_REGISTER 0x1003 +#define P_RESET2_REGISTER RESET_CBUS_REG_ADDR(RESET2_REGISTER) + +#define ISA_DEBUG_REG0 0x3c00 +#define P_ISA_DEBUG_REG0 CBUS_REG_ADDR(ISA_DEBUG_REG0) + +#endif diff --git a/include/linux/amlogic/media/vout/hdmi_tx/hdmi_info_global.h b/include/linux/amlogic/media/vout/hdmi_tx/hdmi_info_global.h index ec4e1ecc05d8..0f831e6ed069 100644 --- a/include/linux/amlogic/media/vout/hdmi_tx/hdmi_info_global.h +++ b/include/linux/amlogic/media/vout/hdmi_tx/hdmi_info_global.h @@ -20,8 +20,6 @@ #include "hdmi_common.h" -/* old definitions move to hdmi_common.h */ - enum hdmi_rx_video_state { STATE_VIDEO__POWERDOWN = 0, STATE_VIDEO__MUTED = 1, @@ -271,16 +269,6 @@ struct vsdb_phyaddr { unsigned char valid; }; -struct hdmitx_clk { - enum hdmi_vic vic; - uint64_t clk_sys; - uint64_t clk_phy; - uint64_t clk_vid; - uint64_t clk_encp; - uint64_t clk_enci; - uint64_t clk_pixel; -}; - #define Y420CMDB_MAX 32 struct hdmitx_info { struct hdmi_rx_audioinfo audio_info; diff --git a/include/linux/amlogic/media/vout/hdmi_tx/hdmi_tx_module.h b/include/linux/amlogic/media/vout/hdmi_tx/hdmi_tx_module.h index b44bc42fb49b..1380998f6f9f 100644 --- a/include/linux/amlogic/media/vout/hdmi_tx/hdmi_tx_module.h +++ b/include/linux/amlogic/media/vout/hdmi_tx/hdmi_tx_module.h @@ -24,7 +24,22 @@ #include #include #include -/* #include */ +#include + +/* HDMITX driver version */ +#define HDMITX_VER "20171127" + +/* chip type */ +#define MESON_CPU_ID_M8B 0 +#define MESON_CPU_ID_GXBB 1 +#define MESON_CPU_ID_GXTVBB 2 +#define MESON_CPU_ID_GXL 3 +#define MESON_CPU_ID_GXM 4 +#define MESON_CPU_ID_TXL 5 +#define MESON_CPU_ID_TXLX 6 +#define MESON_CPU_ID_AXG 7 +#define MESON_CPU_ID_GXLX 8 +#define MESON_CPU_ID_TXHD 9 /***************************** * hdmitx attr management @@ -194,10 +209,17 @@ enum hdmi_hdr_color { C_BT2020, }; +struct hdmitx_clk_tree_s { + /* hdmitx clk tree */ + struct clk *hdcp22_tx_skp; + struct clk *hdcp22_tx_esm; +}; + #define EDID_MAX_BLOCK 4 #define HDMI_TMP_BUF_SIZE 1024 struct hdmitx_dev { struct cdev cdev; /* The cdev structure */ + dev_t hdmitx_id; struct proc_dir_entry *proc_file; struct task_struct *task; struct task_struct *task_monitor; @@ -206,6 +228,9 @@ struct hdmitx_dev { struct workqueue_struct *hdmi_wq; struct workqueue_struct *rxsense_wq; struct device *hdtx_dev; + struct device *pdev; /* for pinctrl*/ + struct pinctrl_state *pinctrl_i2c; + struct pinctrl_state *pinctrl_default; struct delayed_work work_hpd_plugin; struct delayed_work work_hpd_plugout; struct delayed_work work_rxsense; @@ -216,15 +241,19 @@ struct hdmitx_dev { struct delayed_work cec_work; #endif struct timer_list hdcp_timer; - const char *hpd_pin; - const char *ddc_pin; - int chip_type; int hdcp_try_times; + int chip_type; + int hdmi_init; + int hpdmode; /* -1, no hdcp; 0, NULL; 1, 1.4; 2, 2.2 */ int hdcp_mode; int hdcp_bcaps_repeater; int ready; /* 1, hdmi stable output, others are 0 */ int hdcp_hpd_stick; /* 1 not init & reset at plugout */ + int hdcp_tst_sig; + bool hdcp22_type; + unsigned int div40; + unsigned int lstore; struct { void (*SetPacket)(int type, unsigned char *DB, unsigned char *HB); @@ -263,28 +292,28 @@ struct hdmitx_dev { struct hdmi_config_platform_data config_data; enum hdmi_event_t hdmitx_event; unsigned int irq_hpd; - /* wait_queue_head_t wait_queue;*/ /*EDID*/ unsigned int cur_edid_block; unsigned int cur_phy_block_ptr; unsigned char EDID_buf[EDID_MAX_BLOCK * 128]; unsigned char EDID_buf1[EDID_MAX_BLOCK*128]; /* for second read */ + unsigned char tmp_edid_buf[128*EDID_MAX_BLOCK]; unsigned char *edid_ptr; unsigned int edid_parsing; /* Indicator that RX edid data integrated */ unsigned char EDID_hash[20]; struct rx_cap RXCap; struct hdmitx_vidpara *cur_video_param; int vic_count; + struct hdmitx_clk_tree_s hdmitx_clk_tree; /*audio*/ struct hdmitx_audpara cur_audio_param; int audio_param_update_flag; - /*status*/ -#define DISP_SWITCH_FORCE 0 -#define DISP_SWITCH_EDID 1 - unsigned char disp_switch_config; /* 0, force; 1,edid */ unsigned char unplug_powerdown; unsigned short physical_addr; unsigned int cur_VIC; + char fmt_attr[16]; + atomic_t kref_video_mute; + atomic_t kref_audio_mute; /**/ unsigned char hpd_event; /* 1, plugin; 2, plugout */ unsigned char hpd_state; /* 1, connect; 0, disconnect */ @@ -309,9 +338,17 @@ struct hdmitx_dev { /* 0.1% clock shift, 1080p60hz->59.94hz */ unsigned int frac_rate_policy; unsigned int rxsense_policy; + unsigned int sspll; /* configure for I2S: 8ch in, 2ch out */ /* 0: default setting 1:ch0/1 2:ch2/3 3:ch4/5 4:ch6/7 */ unsigned int aud_output_ch; + unsigned int hdmi_ch; + unsigned int tx_aud_src; /* 0: SPDIF 1: I2S */ +/* if set to 1, then HDMI will output no audio */ +/* In KTV case, HDMI output Picture only, and Audio is driven by other + * sources. + */ + unsigned char hdmi_audio_off_flag; enum hdmi_hdr_transfer hdr_transfer_feature; enum hdmi_hdr_color hdr_color_feature; unsigned int sdr_hdr_feature; @@ -337,7 +374,6 @@ struct hdmitx_dev { #define HDCP14_OFF 0x2 #define HDCP22_ON 0x3 #define HDCP22_OFF 0x4 -#define DDC_IS_HDCP_ON (CMD_DDC_OFFSET + 0x04) #define DDC_HDCP_GET_AKSV (CMD_DDC_OFFSET + 0x05) #define DDC_HDCP_GET_BKSV (CMD_DDC_OFFSET + 0x06) #define DDC_HDCP_GET_AUTH (CMD_DDC_OFFSET + 0x07) @@ -345,7 +381,6 @@ struct hdmitx_dev { #define PIN_MUX 0x1 #define PIN_UNMUX 0x2 #define DDC_EDID_READ_DATA (CMD_DDC_OFFSET + 0x0a) -#define DDC_IS_EDID_DATA_READY (CMD_DDC_OFFSET + 0x0b) #define DDC_EDID_GET_DATA (CMD_DDC_OFFSET + 0x0c) #define DDC_EDID_CLEAR_RAM (CMD_DDC_OFFSET + 0x0d) #define DDC_HDCP_MUX_INIT (CMD_DDC_OFFSET + 0x0e) @@ -358,23 +393,9 @@ struct hdmitx_dev { * CONFIG CONTROL //CntlConfig **********************************************************************/ /* Video part */ -#define CONF_VIDEO_BLANK_OP (CMD_CONF_OFFSET + 0x00) -#define VIDEO_BLANK 0x1 -#define VIDEO_UNBLANK 0x2 #define CONF_HDMI_DVI_MODE (CMD_CONF_OFFSET + 0x02) #define HDMI_MODE 0x1 #define DVI_MODE 0x2 -#define CONF_SYSTEM_ST (CMD_CONF_OFFSET + 0x03) -/* Audio part */ -#define CONF_CLR_AVI_PACKET (CMD_CONF_OFFSET + 0x04) -#define CONF_CLR_VSDB_PACKET (CMD_CONF_OFFSET + 0x05) -#define CONF_VIDEO_MAPPING (CMD_CONF_OFFSET + 0x06) -#define CONF_GET_HDMI_DVI_MODE (CMD_CONF_OFFSET + 0x07) - -#define CONF_AUDIO_MUTE_OP (CMD_CONF_OFFSET + 0x1000 + 0x00) -#define AUDIO_MUTE 0x1 -#define AUDIO_UNMUTE 0x2 -#define CONF_CLR_AUDINFO_PACKET (CMD_CONF_OFFSET + 0x1000 + 0x01) #define CONF_AVI_BT2020 (CMD_CONF_OFFSET + 0X2000 + 0x00) #define CLR_AVI_BT2020 0x0 #define SET_AVI_BT2020 0x1 @@ -393,6 +414,17 @@ struct hdmitx_dev { #define VIDEO_MUTE 0x1 #define VIDEO_UNMUTE 0x2 +/* Audio part */ +#define CONF_CLR_AVI_PACKET (CMD_CONF_OFFSET + 0x04) +#define CONF_CLR_VSDB_PACKET (CMD_CONF_OFFSET + 0x05) +#define CONF_VIDEO_MAPPING (CMD_CONF_OFFSET + 0x06) +#define CONF_GET_HDMI_DVI_MODE (CMD_CONF_OFFSET + 0x07) + +#define CONF_AUDIO_MUTE_OP (CMD_CONF_OFFSET + 0x1000 + 0x00) +#define AUDIO_MUTE 0x1 +#define AUDIO_UNMUTE 0x2 +#define CONF_CLR_AUDINFO_PACKET (CMD_CONF_OFFSET + 0x1000 + 0x01) + /*********************************************************************** * MISC control, hpd, hpll //CntlMisc **********************************************************************/ @@ -451,12 +483,9 @@ struct hdmitx_dev { /* reduce a little time, previous setting is 4000/10 */ #define AUTH_PROCESS_TIME (1000/100) -#define HDMITX_VER "20170622" - /*********************************************************************** * hdmitx protocol level interface **********************************************************************/ -extern void hdmitx_init_parameters(struct hdmitx_info *info); extern enum hdmi_vic hdmitx_edid_vic_tab_map_vic(const char *disp_mode); extern int hdmitx_edid_parse(struct hdmitx_dev *hdmitx_device); @@ -532,7 +561,7 @@ extern int hdmi_set_3d(struct hdmitx_dev *hdmitx_device, int type, unsigned int param); extern int hdmitx_set_audio(struct hdmitx_dev *hdmitx_device, - struct hdmitx_audpara *audio_param, int hdmi_ch); + struct hdmitx_audpara *audio_param); /* for notify to cec */ #define HDMITX_PLUG 1 @@ -553,7 +582,7 @@ static inline struct hdmitx_dev *get_hdmitx_device(void) } static inline int get_hpd_state(void) { - return -1; + return 0; } static inline int hdmitx_event_notifier_regist(struct notifier_block *nb) { @@ -566,28 +595,17 @@ static inline int hdmitx_event_notifier_unregist(struct notifier_block *nb) } #endif -extern int hdmi_print_buf(char *buf, int len); - extern void hdmi_set_audio_para(int para); - -extern void hdmitx_output_rgb(void); - extern int get_cur_vout_index(void); extern struct vinfo_s *hdmi_get_current_vinfo(void); -void phy_pll_off(void); - +extern void phy_pll_off(void); extern int get_hpd_state(void); -void hdmitx_hdcp_do_work(struct hdmitx_dev *hdev); +extern void hdmitx_hdcp_do_work(struct hdmitx_dev *hdev); /*********************************************************************** * hdmitx hardware level interface ***********************************************************************/ -/* #define DOUBLE_CLK_720P_1080I */ -extern unsigned char hdmi_pll_mode; /* 1, use external clk as hdmi pll source */ - extern void HDMITX_Meson_Init(struct hdmitx_dev *hdmitx_device); - -extern unsigned char hdmi_audio_off_flag; extern unsigned int get_hdcp22_base(void); /* * hdmitx_audio_mute_op() is used by external driver call @@ -637,34 +655,4 @@ struct Hdcp_Sub { unsigned int hdcp_sub_len; }; -/*********************************************************************** - * hdmi debug printk - * level: 0 ~ 4 Default is 2 - * 0: ERRor 1: IMPortant 2: INFormative 3: DETtal 4: LOW - * hdmi_print(ERR, EDID "edid bad\"); - * hdmi_print(IMP, AUD "set audio format: AC-3\n"); - * hdmi_print(DET) - **********************************************************************/ -#define HD "hdmitx: " -#define VID HD "video: " -#define AUD HD "audio: " -#define CEC HD "cec: " -#define EDID HD "edid: " -#define HDCP HD "hdcp: " -#define SYS HD "system: " -#define HPD HD "hpd: " - -#define ERR 1 -#define IMP 2 -#define INF 3 -#define LOW 4 -#define DET (5, "%s[%d]", __func__, __LINE__) - -extern void hdmi_print(int level, const char *fmt, ...); - -#define dd() -#ifndef dd -#error delete debug information #endif -#endif -