diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 694c927d19f0..5aa34b06d3a4 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -995,6 +995,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) += \
 	rv1106g-evb1-v10-dual-cam.dtb \
 	rv1106g-evb1-v11-dual-cam.dtb \
 	rv1106g-evb1-v10-facial-gate.dtb \
+	rv1106g-evb1-v11-facial-gate.dtb \
 	rv1106g-evb1-v10-spi-nand.dtb \
 	rv1106g-evb1-v10-spi-nor.dtb \
 	rv1106g-evb2-v10.dtb \
diff --git a/arch/arm/boot/dts/rv1106g-evb1-v11-facial-gate.dts b/arch/arm/boot/dts/rv1106g-evb1-v11-facial-gate.dts
new file mode 100644
index 000000000000..69dbb494033d
--- /dev/null
+++ b/arch/arm/boot/dts/rv1106g-evb1-v11-facial-gate.dts
@@ -0,0 +1,29 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+/*
+ * Copyright (c) 2023 Rockchip Electronics Co., Ltd.
+ */
+
+/dts-v1/;
+
+#include "rv1106g-evb1-rgb-display-v11.dts"
+
+/ {
+	model = "Rockchip RV1106G EVB1 V11 Board For Facial Gate";
+	compatible = "rockchip,rv1106g-evb1-v11-spi-nor-facial-gate", "rockchip,rv1106";
+};
+
+&emmc {
+	status = "disabled";
+};
+
+&sfc {
+	status = "okay";
+
+	flash@0 {
+		compatible = "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <80000000>;
+		spi-rx-bus-width = <4>;
+		spi-tx-bus-width = <1>;
+	};
+};